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ADC MLN7400 manual

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Table of contents for the manual

  • Page 1

    Cost Effective Network Processor for TCP/IP with ARM7TDMI ™ MLN7400 Evaluation Board Manual Version 0.20 December 31, 2003 MCS Logic Inc. Copyright © 2003 MCS LOGIC Limited. All righ ts reserved EVB7400[...]

  • Page 2

    EVB7 400 Revision History Version Date Revision Description V 0.10 December 30, 2003 First Release User’s Manual V.0.10 2/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 3

    EVB7 400 User’s Manual V.0.10 3/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 4

    EVB7 400 Table of Contents CHAPTER 1 INTRODUCTION .................................................................................................................. 6 1.1 S YSTEM R EQUIREMENTS ............................................................................................................................................ 6 1.2 B OARD C O[...]

  • Page 5

    EVB7 400 List of Figures [FIGURE 1 ] EVB7400 BLOCK DIAGRAM ....................................................................................................................... 6 [FIGURE 2 ] MEMORY MAP .......................................................................................................................................... 7 [FIGU[...]

  • Page 6

    EVB7 400 Chapter 1 Introduction EVB7400 is a MLN7400 evaluation board and MCS-uClinux training kit t hat is suitable for code development and exploration of MN7 400 with MCS-uClinux. It includes much of the hardware and softwar e required completing your application development. It supports v arious function related with network, communication such[...]

  • Page 7

    EVB7 400 ADDRESS MLN7400 MAP EVB7400 0x000_0000 ~ 0x0FF_FFFF ROM/Flash bank 0 (16Mbytes) FLASH(512KB) 0x100_0000 ~ 0x1FF_FFFF ROM/Flash bank 1 (16Mbytes) SRAM(128KB) 0x200_0000 ~ 0x2FF_FFFF ROM/Flash bank 2 (16Mbytes) FLASH(2MB) 0x300_0000 ~ 0x3FF_FFFF ROM/Flash bank 3 (16Mbytes) PCMCIA Card 0x400_0000 ~ 0x5FF_FFFF Cacheable SDRAM area (32Mbytes) S[...]

  • Page 8

    EVB7 400 1.2 Board Components The arrangement of major components on the board is shown in Figure 3. The major components include: [Figure 3 ] B LOCK D IAGRAM (T OP VIEW ) User’s Manual V.0.10 8/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 9

    EVB7 400 A Flash ROM There is a socket(U9) which accept 512Kb yte size of 8 bit Flash Memory(AT29C010 ~ 40). This is for diagano stic program(include s all pheriperal device driver and TCP/IP protocol stack) and BIOS(MCS-uClinux Boot loader) program. User Flash memory(Selectabl e Boot ROM) A mounted 48 TSOP type flash(AM29LV160BB), U8, is mounted f[...]

  • Page 10

    EVB7 400 Four buttons(SW5, SW8, SW11, SW14) are connected to ADIN1(ADC channel 1). Three buttons(SW5, SW8, SW11, SW14) are connected to ADIN2(ADC channel 2). External Interrrupt Key There are two button to use external interrupts. Each button(S1,S2) is connected to External interrupt0 and 2. External Timer0 Clock Timer0 can be supplied by the exter[...]

  • Page 11

    EVB7 400 Chapter 2 Board Configuration The EVB7400 is set with default configuration. You can use the board with the defualt settings direclty. However, you can also change the settings according to your nedds. 2.1 Endian Selection (SW1) Status Description BIG LITTLE BIG Endian BIG LITTLE Little Endian 2.2 Boot ROM and ROM Ban k0 length Selection ([...]

  • Page 12

    EVB7 400 2.4 GPIO Setting < 128-TQFP/ 144 -LQFP Common I/O> <144 -LQFP Extended I/O> PIN Shared Initial Board Setting Setting Value PIN Shared Initial Board Setting Setting Value GP00 CUTXD1 N,I UART1 S, O GP27 EXT_TCLK0 N,I Ext Timer0 Clk S, I GP01 CURXD1 N,I UART1 S, O GP28 EXT_TCLK1 N,I LED 2 N, O GP02 CUTXD2 N,I UART2 S, O GP29 EXT_[...]

  • Page 13

    EVB7 400 Chapter 3 Setup EVB7400 Environments 3.1 Ethernet 10/100 BASE-T Connector Same connector and pin for both 10Base-T and 100 Base-Tx < At the network interface card/hubs > < At the cables > RJ45 female connetor at the network interface cards and hubs RJ45 male connector at the cable Pin Name Descriptions 1 TX+ Tranmit Data+ 2 TX-[...]

  • Page 14

    EVB7 400 [Figure 4 ] UTP C ABLE C ONNECTION User’s Manual V.0.10 14/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 15

    EVB7 400 Chapter 4 Connection Configurations for Debug Console 4.1 Configuration the Hyper Terminal To configure the Hyper Terminal, which is a Windows utility program for serial communications, refer to following steps: 1. Run the Hyper Terminal program -. Window 95/98/2000/XP start tool bar -> Program -> Accessories -> Hyper Terminal Gro[...]

  • Page 16

    EVB7 400 [Figur e 6 ] C HOOSE S ETTING P AGE 6. Re-connect Hyper Terminal to run at new properties Disconnect : Call -> Disconnect Connect: Call -> Call 7. Power-On Reset or push the reset button on EVB7400 board Now, the diagnostic program menu is showed on the Hyper Terminal 4.2 Downloading Binary Image and Flash Write 4.2.1 Downloading Bin[...]

  • Page 17

    EVB7 400 2. Type “8” at Flash Program Menu and type address to download. User’s Manual V.0.10 17/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 18

    EVB7 400 3. select the Send File from the Transfer menu File Name : Select the file name, which you want too download. Protocol : Select the Xmodem or 1K Xmodem. 4. Click O k. Then, the file that you selected will be downloaded. User’s Manual V.0.10 18/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 19

    EVB7 400 4.2.2 Flash Write You can write downloaded binary image at User flash memory(AM29LV160BB, U8). Type “2” to write an executable binary file at User Flash memory. Then, you can execute your image by changing Boot Rom selection switch(SW2) to X16(default is X8). User’s Manual V.0.10 19/36 Copyright © 2004 MCS LOGIC Limited. All rights [...]

  • Page 20

    EVB7 400 Chapter 5 Opennice32 Installation 5.1 OPENice32 The OPENice32 can also be connected with the EVB7400 as a debuggi ng syste m for software applications development. OPENice32 is a JTAG-based, nonintrusive, debugging system for ARM-based controllers or processors. JTAG prov ides the interface between a debugger and the ARM-based controller d[...]

  • Page 21

    EVB7 400 Chapter 6 EVB7400 1.0 Schemetic and BOM 6.1 EVB7400 BOM No. PART NO GEOMETRY COUNT DESCRIPTION REFERENCE Vendor 1 MLN7400 144LQFP 1 Microprocessor U1 MCS Logic 2 MLN7400P 128TQFP 1 Microprocessor U2 MCS Logic 3 AT24C256 8 SOIC 1 EEPROM(IIC) U3 Atmel 4 AT25040 8 SOIC 1 EEPROM(SPI) U4 Atmel 5 DS1629 8 SOIC 1 RTC U5 Dallas 6 K6R1016V1D 44TSOP[...]

  • Page 22

    EVB7 400 38 DB9 FEMAIL 5 UART0~4 P1,P2,P3,P4,P5 39 DB9 MAIL 1 HUART Option P6 40 HEADER 13X2 4 DATA, MII, ADDRESS, MEMORY JP3,JP4,JP6,JP8 41 HEADER 24X2 1 GPIO heaser JP7 42 HEADER 4X2 1 IIC & SPI JP2 43 HEADER 6X2 1 HUART header JP5 44 HEADER 1 7 Test Pin JP1,TP1,TP2,TP3,TP4 TP5, TP6 45 Beads(100Mhz) 2012 1 L L1 46 0 0603(1608) 68 R R8,R9,R10,[...]

  • Page 23

    EVB7 400 65 100K 0603(1608) 3 R R165,R169,R170 66 1M 0603(1608) 1 R R1 67 0.01uF_2kV DIP 1 C56 68 0.01uF 0603(1608) 9 C C47,C57,C58,C59,C60, C61,C62,C83,C87 69 0.1uF 0603(1608) 65 C C1,C2,C3,C4,C5, C6,C7,C8,C9,C10, C11,C12,C15,C17,C18, C19,C20,C21,C22,C23, C24,C25,C26,C27,C28, C29,C32,C33,C34,C35, C36,C37,C38,C39,C40, C41,C42,C43,C44,C45, C46,C48,C[...]

  • Page 24

    EVB7 400 6.2 EVB7400 Schematic User’s Manual V.0.10 24/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved[...]

  • Page 25

    DATE REMARK UPDATE SHEET REV. CUSTOMER 1 / 14 MCS LOGIC 45 2003.11.18 MLN7400EV MLN7400 Evaluation Board 2 12 3 1 34 567 6 A B C D BLOCK DIAGRAM E A B C D E DESIGN CHECK-1 CHECK-2[...]

  • Page 26

    7 BIG LITTLE B CUSTOMER C MLN7400_144LQFP 3 D MCS LOGIC 4 D 2 DATE 5 Main CPU MLN7400 1 6 DESIGN 2 FGND 6 A C UPDATE 5 CHECK-1 3 E 1 SHEET REV. E Endian Setting A 2003.11.18 SYSTEM CLOCK CHECK-2 B 4 MLN7400EV REMARK 2/14 OPTIONAL GROUND GROUND R205 0_3216 33 R5 C11 0.1uF VCC_33 GROUND 0 VCC_33 GROUND 15 R207 0_3216 0.1uF C184 1 12 20 0_3216 R204 X1[...]

  • Page 27

    REMARK UPDATE SHEET REV. 3/14 MCS LOGIC 45 12 3 1 5 23 567 6 4 A B C D MLN7400P_128TQFP 2003.11.18 MLN7400EV Main CPU MLN7400P 128TQFP E A B C CHECK-2 DATE D E DESIGN CHECK-1 CUSTOMER 0.1uF C19 13 AGND VCC_33 0.1uF 15 7 4 13 TX_D1 TX_D2 92 91 TX_D3 TX_EN 95 UDQM_AD16 41 8 VDD33_00 VDD33_01 23 38 VDD33_02 VDD33_04 66 85 VDD33_05 106 VDD33_06 52 VSS3[...]

  • Page 28

    DESIGN GPIO 3 MLN7400P and need to use I/F CHECK-1 CHECK-2 1 Only use when CPU is 7 D CUART B 5 4 A TIMER 0 6 NAND FLASH I/F E 4/14 3 DAC I/F MLN7400P DAC I/F C UPDATE SHEET MCS LOGIC Do not install 4 DATE 2003.11.18 2 Install to use NAND Flash C I/F EXTERNAL CLOCK REV. I/F SRAM OPTIONAL B LED I/F SPI I/F PCMCIA E 56 D A MLN7400EV REMARK DAC CUSTOM[...]

  • Page 29

    REV. B IIC EEPROM D RTC External Interrupt Test CUSTOMER REMARK B 45 2003.11/18 MLN7400EV 5/14 MCS LOGIC UPDATE 5 23 1 EXTINT 0 EXTINT 2 7 4 6 A 23 1 6 C SPI EEPROM C DESIGN DATE D CHECK-1 E A EEPROM & RTC CHECK-2 E SHEET D1 1 2 VCC_33 GROUND R70 2K 2K R69 R71 4.7K TACT_SW S2 12 GROUND GROUND 1N4004 VCC_33 GROUND 4.7K R68 GROUND VCC_33 GROUND S[...]

  • Page 30

    A B E DESIGN C D 67 6 A UPDATE SHEET REV. CUSTOMER 6/14 MCS LOGIC 45 12 BANK0 SDRAM BANK BANK1 2003.11.18 MLN7400EN 8 9 MEMORY 3 X8 X16 FLASH 12 3 AMD Flash BANK Selection BANK2 REMARK CHECK-1 CHECK-2 BOSIZE : 8 Bit BOSIZE : 16Bit 45 DATE B C D E R80 0 13 14 C40 0.1uF 14 I_O6 I_O7 15 16 I_O8 I_O9 29 LB* 39 NC1 22 23 NC2 NC3 28 41 OE* 40 UB* VCC1 11[...]

  • Page 31

    7 6 A B C D C A B 5 23 DESIGN CHECK-1 CHECK-2 DATE REMARK UPDATE D E 1 SHEET REV. AC101L ETHERNET PHY 4 CUSTOMER 5 2003.11.18 0.01uF C62 1 MLN7400EV Place close to pin32 0f AC101L Place close to pins 0f AC101L 7/14 MCS LOGIC 4 E 3 2 6 4.7K VCC_25 33 R107 R81 4.7K 4.7K R98 4.7K R108 R109 TXP 35 VCC1 1 VCC2 7 36 VCC25OUT VCC3 18 41 VCC33IN VCC4 25 32[...]

  • Page 32

    B C 2 3 1 6 1 D A A UPDATE 6 5 B 7 RS232 C D E CUSTOMER DESIGN REMARK SHEET REV. 4 UART1 UART2 UART3 UART4 HUART OPTION CHECK-2 DATE CHECK-1 MCS LOGIC 2 UART0 8/14 E 45 2003.11.18 MLN7400EV VCC 1uF TC12 21 TC13 1uF 21 3 C1+ 1 3 C1- C2+ 4 5 C2- GND 15 R1I 13 12 R1O R2I 8 9 R2O T1I 11 14 T1O T2I 10 7 T2O V+ 2 6 V- 16 21 VCC_33 TC18 1uF 21 U12 MAX3232[...]

  • Page 33

    9/14 2 MCS LOGIC 3 5 MLN7400EV 3 2003.11.18 56 PCMCIA INTERFACE E 7 6 4 D A 1 1 B C C E DESIGN A 15 R123 4.7K CHECK-2 DATE B UPDATE SHEET CHECK-1 CUSTOMER BANK3 4 REV. D REMARK 2 4.7K R136 4.7K R137 8 9 14 R132 4.7K 4.7K R133 3 R141 4.7K 8 4.7K R129 VCC_33 0.1uF C79 R134 4.7K R135 4.7K 4.7K R140 4.7K R143 GROUND 2 GROUND R202 0 R128 4.7K 0 4.7K R12[...]

  • Page 34

    3 5 7 Pin : Ground 23 5 4 E POWER&RESET JTAG CONNECTOR 6 POWER LED SHEET A 7 10/14 C E REV. 4 MCS LOGIC D 1 DESIGN B DATE UPDATE CHECK-1 CHECK-2 MLN7400EV CUSTOMER 1 2003.11.18 RESET SYSTEM 6 B C 2 A D TC33 21 GROUND AMS1086 U17 1 GND IN 3 OUT 2 4 TAB REMARK 14 Pin : VCC_33 14 Pin : VCC_33 7 Pin : Ground GPIO LED VCC_33 VCC_33 10uF TC26 21 SW_T[...]

  • Page 35

    HEADER HIGH SPEED MLN7400EV CHECK-2 CHECK-1 CUSTOMER REV. DATA HEADER GPIO 3 11/14 C B A 2003.11.18 HEADER MEMORY D C B A E D GPIO GP1~ ODD GPIO 6 DESIGN E Test Header Pin 1 UART HEADER 2 1 3 2 6 7 HEADER MII I/F HEADER IIC & SPI REMARK DATE HEADER ADDRESS GP0~ EVEN 5 4 MCS LOGIC 5 4 SHEET UPDATE 4 56 78 9 GROUND GROUND VCC_33 13 14 15 16 17 18[...]

  • Page 36

    DESIGN 12/14 MCS LOGIC CHECK-1 UPDATE MUTE REV. 5 C A 6 JACK DATE 6 3 2 1 1 5 2 KEY MATRIX & MIC IN 3 7 MLN7400EV C MUTE SW MIC CHECK-2 REMARK B A D 4 2003.11.18 Disable MUTE CUSTOMER E D E MAX4468EKA_SOP8 U18 1 GND 3 INN INP 2 MBIAS 45 NC OUT 8 SHDN 6 7 VCC VCC_33A SHEET Enable B 4 R160 390 PGM SW5 TACT_SW 12 AGND 1K R168 2 VCC_33A J5 MICIN 1 [...]

  • Page 37

    D 4 MCS LOGIC MLN7400EV DAC 2 5 2003.11.18 B 13/14 3 2 1 5 67 1 34 A REMARK REV. UPDATE 6 DESIGN DATE CHECK-1 CHECK-2 B A AGND AGND SHEET E C E CUSTOMER D C LINE_OUT_JACK J6 1 2 3 AGND R177 0 R178 100 AGND 13 AOUTL 15 12 AOUTR 8 DEM0 DIF0 7 6 DIF1 FILT+ 9 4 LRCK MCLK 5 16 MUTEC REF_GND 11 RST* 1 SCLK 3 2 SDATA 14 VA 10 VQ C90 1uF_1608 R172 560 AGND[...]

  • Page 38

    A E C D E A B C D 2 DESIGN CHECK-1 CHECK-2 DATE REMARK UPDATE SHEET 4 REV. 2 3 1 NAND FLASH NAND_Flash B MLN7400 0.1uF C96 GROUND 5 2003.11.18 CUSTOMER MCS LOGIC 14/14 1 567 6 34 3K R179 VCC_33 C95 100pF GROUND GROUND VCC_33 25 NC3 3 4 NC4 NC5 5 10 NC6 NC7 11 14 NC8 NC9 15 8 REN R_BN 7 12 VCC1 VCC2 37 VSS1 13 36 VSS2 18 WEN WPN 19 23 24 NC14 48 NC1[...]