Omron C200HE manual

Cat.No. W303–E1–4 C200HX/C200HG/C200HE Programmable Controllers OPERA TION MANUAL[...]

C200HX/C200HG/C200HE Programmable Controllers Operation Manual Revised June 2000[...]

! ! ! v Notice: OMRON products are manufactured for use according to proper procedures by a qualified operator and only for the purposes described in this manual. The following conventions are used to indicate and classify precautions in this manual. Always heed the information provided with them. Failure to heed precautions can result in injury to[...]

T ABLE OF CONTENTS vii PRECAUTIONS xiii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Intended Audience xiv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 General Precautions xiv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

T ABLE OF CONTENTS viii 4-8 Controlling Bit Status 120 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 W ork Bits (Internal Relays) 122 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10 Programming Precautions 124 . . . . . . . . . . . .[...]

T ABLE OF CONTENTS ix SECTION 8 Serial Communications 417 . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 Introduction 418 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Host Link Communications 419 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

xi About this Manual: This manual describes the operation of the C200HX/HG/HE Programmable Controllers, and it includes the sections described below . Installation information is provided in the C200HX/HG/HE Programmable Controller Installation Guide . A table of other manuals that can be used in conjunction with this manual is provided in Section [...]

xiii PRECAUTIONS This section provides general precautions for using the Programmable Controller (PC) and related devices. The information contained in this section is important for the safe and r eliable application of the PC. Y ou must read this section and understand the information contained before attempting to set up or operate a PC system. 1[...]

! ! ! ! xiv 1 Intended Audience This manual is intended for the following personnel, who must also have knowl- edge of electrical systems (an electrical engineer or the equivalent). • Personnel in charge of installing F A systems. • Personnel in charge of designing F A systems. • Personnel in charge of managing F A systems and facilities. 2 G[...]

! ! ! ! ! xv such problems, external safety measures must be provided to ensure safety in the system. • When the 24-VDC output (service power supply to the PC) is overloaded or short-circuited, the voltage may drop and result in the outputs being turned OF F . As a countermeasure for such problems, external safety measures must be provided to ens[...]

! ! xvi • Connecting or disconnecting any cables or wiring. Caution Failure t o abide by the following precautions could lead to faulty operation of the PC or the system or could damage the PC or PC Units. Always heed these pre- cautions. • Us e the Units only with the power supplies and voltages specified in the opera- tion manuals. Other powe[...]

xvii 6 Conformance to EC Directives Observe the following precautions when installing the C200HX/HG/HE PCs that conform to the EC Directives. Provide reinforced insulation or double insulation for the DC power source con- nected to the DC I/O Unit and for the Power Supply Unit. Us e a separate power source for the DC I/O Unit from the external powe[...]

1 SECTION 1 Intr oduction This section gives a brief overview of the history of Programmable Controllers and explains terms commonly used in ladder - diagram programming. It also provides an overview of the process of programming and operating a PC and explains basic terminology used with OMRON PCs. Descriptions of peripheral devices used with the [...]

2 1-1 Overview A PC (Programmable Controller) is basically a CPU (Central Processing Unit) containing a program and connected to input and output (I/O) devices. The pro- gram controls the PC so that when an input signal from an input device turns ON, the appropriate response is made. The response normally involves turning ON an output signal to som[...]

3 Actually there is not a total equivalence between these terms. The term condi- tion is only used to describe ladder diagram programs in general and is specifi- cally equivalent to one of a certain set of basic instructions. The terms input a nd output are not used in programming per se, except in reference to I/O bits that are assigned to input a[...]

4 1-4 OMRON Product T erminology OMRON products are divided into several functional groups that have generic names. Appendix A Standard Models list products according to these groups. T h e term Unit is used to refer to all of the OMRON PC products. Although a Unit is any one of the building blocks that goes together to form a C200HX/HG/HE PC , its[...]

5 7. Wire the PC to the controlled system. This step can actually be started as soon a s step 3 has been completed. Refer to the C200HX/HG/HE PC Instal- lation Guide and to Operation Manuals and System Manuals for details on individual Units. 8. T est the program in an actual control situation and carry out fine tuning as required. ( Section 7 Prog[...]

6 PC programs can be written on-screen in ladder-diagram form as well as in mne- monic form. As the program is written, it is displayed on a display , making con- firmation and modification quick and easy . Syntax checks may also be per- formed on the programs before they are downloaded to the PC. The SSS comes on 3.5 ” disks. A computer running [...]

7 Name Contents Cat. No. PID Control Unit Operation Manual W241 Information on PID Control Unit Cam Positioner Unit Operation Manual W224 Information on Cam Positioner Unit 1-8 C200HX/HG/HE Features Th e C200HX/HG/HE CPU Units have a number of new features, but C200H and C200HS programs can be used in the new CPU Units. 1-8-1 C200HS and C200HX/HG/H[...]

8 Function Capability Function C200HS C200HX/HG/HE CPU Unit functions RS-232C port Available in the C200HX/HG/HE-CPU4  -E/6  -E Available in the C200HS-CPU2  -E /3  -E Clock function Available in all except the C200HE-CPU1 1-E A vailable in all models SYSMAC NET Link and SYSMAC LINK functions Communications Boards can be installed in al[...]

9 • If the C200H program accesses the C200H ’ s error log in DM 0969 to DM 0999, the addresses of the words being accessed must be changed to DM 6000 to DM 6030, which is the error log area for the C200HX/HG/HE. • An y programs that rely on the execution cycle time (i.e., on the time required to execute any one part of all of the program) mus[...]

10 2. Go offline if the SSS is not already of fline. 3. Change the PC setting for the SSS to the C200HX/HG/HE. 4. If you want to transfer I/O comments together with the program to the C200HX/HG/HE, allocate UM area for I/O comments. 5. Allocate expansion DM words DM 7000 to DM 7999 in the UM area using t he UM allocation operation from the SSS. 6. [...]

11 SECTION 2 Hardwar e Considerations This section provides information on hardware aspects of the C200HX/HG/HE that are relevant to programming and software operation. These include CPU Unit Components, the basic PC configuration, CPU Unit capabilities, and Memory Cassettes. This information is covered in detail in the C200HX/HG/HE Installation Gu[...]

12 2-1 CPU Unit Components The following diagram shows the main CPU Unit components. Communications Board (The C200HW-COM06-E is mounted to this CPU Unit.) Indicators Memory Cassette DIP switch Peripheral port RS-232C port Memory Cassette The CPU Unit has a compartment to connect the Memory Cassette to the CPU Unit. The Memory Cassette works as a R[...]

13 2-1-1 CPU Unit Indicators CPU Unit indicators provide visual information on the general operation of the PC. Although not substitutes for proper error programming using the flags and other error indicators provided in the data areas of memory , these indicators pro- vide ready confirmation of proper operation. Indicator Meaning RUN (green) Lit w[...]

14 IBM PC/A T with SSS An IBM PC/A T or compatible computer with SYSMAC Support Software can be connected as shown in the diagram. C200HX/HG/HE Mounted directly RS-232C port Host Link Unit C200H-LK201-V1 Connecting Cables Peripheral port C200H-CN222/422 (2 m/4 m) Programming Console Connecting Cable Connecting Cable IBM PC/A T or Compatible SYSMAC [...]

15 2-2 PC Configuration The basic PC configuration consists of two types of Rack: a CPU Rack and Ex- pansion I/O Racks. The Expansion I/O Racks are not a required part of the basic system. They are used to increase the number of I/O points. An illustration of these Racks is provided in 3-3 IR Area. A third type of Rack, called a Slave Rack, can be [...]

16 2-4 Memory Cassettes The C200HX/HG/HE comes equipped with a built-in RAM for the user ’ s pro- gram, so a normal program be created even without installing a Memory Cas- sette. An optional Memory Cassette can be used to store the program, PC Set- up , I/O comments, DM area and other data area contents. Refer to the C200HX/ HG/HE Installation G[...]

17 2-4-1 Hardware and Software Settings Th e hardware and software settings related to Memory Cassette operations are described below . Switch Settings Switch 1 on the Memory Cassette is turned OFF when the Memory Cassette is shipped. Check the setting on switch 1 before installation. Memory Cassette Switch 1 setting Function EEPROM ON The data in [...]

18 Use the following procedure to the UM data on an Memory Cassette to the UM data in the PC. 1, 2, 3... 1. Switch the C200HX/HG/HE to PROGRAM mode. 2. Use a host computer running SSS or a Programming Console to turn ON SR 27002 (the Compare UM to Cassette Bit). The data will be compared be- tween the PC and the Memory Cassette. SR 27002 will be tu[...]

19 2. T urn ON the C200HX/HG/HE and switch it to PROGRAM mode. 3. Use a host computer running SSS or a Programming Console to turn ON SR 27300 (the Save IOM to Cassette Bit). The data will be written from the PC to the Memory Cassette. SR 27300 will be turned OFF automatically af- ter the data transfer has been completed. 4. If you want to write-pr[...]

20 2-5 CPU Unit D I P S w i t c h The 6 pins on the DIP switch control 6 of the CPU Unit ’ s operating parameters. Pin Item Setting Function 1 Memory protect ON The UM area 1 cannot be overwritten from a Peripheral Device. OFF The UM area 1 can be overwritten from a Peripheral Device. 2 Automatic transfer of Memory Cassette contents ON The conten[...]

21 2-6 Operating without a Backup Battery An EEPROM or EPROM Memory Cassette can be used together with various memory settings to enable operation without a backup battery . The following conditions must be met. 1, 2, 3... 1. The user program must be written to an EPROM or EEPROM Memory Cas- sette. 2. The clock cannot be used. (A battery is require[...]

22 1, 2, 3... 1. Allocate U M area using the SYSMAC Support Software (SSS) if you want to us e Expansion DM for Special I/O Units or if you want to store I/O comments in the PC. 2. Write and transfer the user program, including a line using the Always OFF Flag (SR 25314) to ensure that the Output OFF Bit (SR 25215) remains OFF . 25314 (Always OFF F[...]

23 SECTION 3 Memory Ar eas V arious types of data are required to achieve ef fective and correct control. T o facilitate managing this data, the PC is provided with various memory ar eas for data, each of which performs a different function. The areas generally accessible by the user for use in programming are classified as data areas . The other m[...]

24 3-1 Introduction 3-1-1 Data Area Overview Details, including the name, size, and range of each area are summarized in the following table. Data and memory areas are normally referred to by their acro- nyms, e.g., the IR Area, the SR Area, etc. Area Size Range Comments Internal Relay Area 1 3,776 bits IR 000 to IR 235 Refer to 3-1-2 IR/SR Area Ov[...]

25 some flags can be turned ON and OFF by the user , most flags are read only; they cannot be controlled directly . Control b its are bits turned ON and OFF by the user to control specific aspects o f operation. Any bit given a name using the word bit rather than the word flag is a control bit, e.g., Restart bits are control bits. 3-1-2 IR/SR Area [...]

26 An actual data location within any data area but the TC area is designated by its address. The address designates the bit or word within the area where the de- sired data is located. The TC area consists of TC numbers, each of which is used for a specific timer or counter defined in the program. Refer to 3-8 TC Area for more details on TC number[...]

27 When inputting data into data areas, it must be input in the proper form for the intended purpose. This is no problem when designating individual bits, which ar e merely turned ON (equivalent to a binary value of 1) or OFF (a binary value of 0). When inputting word data, however , it i s important to input it either as decimal or as hexadecimal,[...]

28 Signed Binary Signed binary data can have either a positive and negative value. The sign is indicated b y the status of bit 15. If bit 15 is OFF , the number is positive and if bit 15 is ON, the number is negative. Positive signed binary values range from 0 ($0000) to 32,767 ($7FFF), and negative signed binary values range from – 32,768 ($8000[...]

29 Bit number Contents 0011000000111001 15 14 13 12 1 1 10 09 08 07 06 05 04 03 02 01 00 1. First take the absolute value (12345) and convert to unsigned binary: Bit number Contents 1100111111000110 15 14 13 12 1 1 10 09 08 07 06 05 04 03 02 01 00 2. Next take the complement: Bit number Contents 1100111111000111 15 14 13 12 1 1 10 09 08 07 06 05 04[...]

30 instructions that control bit status, e.g., the OUTPUT , DIFFERENTIA TION UP , and KEEP instructions. Output Bit Usage Output bits are used to output program execution results and can be used in any order in programming. Because outputs are refreshed only once during each cycle (i.e., once each time the program is executed), any output bit can b[...]

31 Unit number PC Restrictions I/O words A IR 400 to IR 409 Not available in C200HE-CPU  -E and   B IR 410 to IR 419  C200HG/HX-CPU3  -E/4  -E PCs. C IR 420 to IR 429 D IR 430 to IR 439 E IR 440 to IR 449 F IR 450 to IR 459 Note I/O words that aren ’ t allocated to Special I/O Units can be used as work words. Up to five Sl[...]

32 Group-2 High-density I/O Units and B7A Interface Units are allocated words be- tween I R 030 and IR 049 according to I/O number settings made on them and do no t use the words allocated to the slots in which they are mounted. For 32-point Units, each Unit is allocated two words; for 64-point Units, each Unit is allocated four words. The words al[...]

33 3-4 SR (Special Relay) Area The SR area contains flags and control bits used for monitoring PC operation, accessing clock pulses, and signalling errors. SR area word addresses range from 236 through 299; bit addresses, from 23600 through 29915. The SR areas is divided into two sections. The first section ends at SR 255 and th e second section be[...]

34 Word(s) Function Bit(s) 252 00 SEND(90)/RECV(98) Error Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System or CMCR( –– ) Error Flag for PC Card 01 SEND(90)/RECV(98) Enable Flag for operating level 0 of SYSMAC LINK or SYSMAC NET Link System or CMCR( –– ) Enable Flag for PC Card 02 Operating Level 0 Data Link Operating Flag[...]

35 Word(s) Function Bit(s) 255 00 0.1-second clock pulse bit 01 0.2-second clock pulse bit 02 1.0-second clock pulse bit 03 Instruction Execution Error (ER) Flag These flags are turned OFF when the END(01) 04 Carry (CY) Flag instruction is executed, so their status can ’ t be 05 Greater Than (GR) Flag monitored from a Programming Console. 06 Equa[...]

36 Word(s) Function Bit(s) 270 00 Save UM to Cassette Bit Data transferred when the Bit is turned ON in PROGRAM mode. Bit will automatically turn OFF . 01 Load UM from Cassette Bit PROGRAM mode. Bit will automatically turn OFF . A non-fatal error will occur if these bits are turned ON in RUN or MONITOR modes. 02 Compare UM to Cassette Bit 03 Compar[...]

37 Word(s) Function Bit(s) 274 00 Special I/O Unit #0 Restart Flag These flags will turn ON during restart processing. 01 Special I/O Unit #1 Restart Flag These flags will not turn ON for Units on Slave 02 Special I/O Unit #2 Restart Flag Racks. 03 Special I/O Unit #3 Restart Flag 04 Special I/O Unit #4 Restart Flag 05 Special I/O Unit #5 Restart F[...]

38 3-4-1 SYSMAC NET/SYSMAC LINK System Loop Status SR 236 provides the local node loop status for SYSMAC NET Systems, as shown below . --- Bit in SR 236 Level 0 07 06 05 04 03 02 01 00 Level 1 15 14 13 12 11 10 09 08 Status/ Meaning 11 Central Power Supply 0: Connected 1: Not connected 1 Loop Status 1 1: Normal loop 10: Downstream backloop 01: Upst[...]

39 Data Link Status Flags SR 238 to SR 245 contain the data link status for SYSMAC LINK/SYSMAC NET Systems. The data structure depends on the system used to create the data link. SYSMAC LINK Operating Operating Bit level 0 level 1 12 to 15 1 1 to 08 04 to 07 00 to 03 SR 238 SR 242 Node 4 Node 3 Node 2 Node 1 SR 239 SR 243 Node 8 Node 7 Node 6 Node [...]

40 3-4-3 Link System Flags and Control Bits Us e of the following SR bits depends on the configuration of any Link Systems to which your PC belongs. These flags and control bits are used when Link Units, such as P C Link Units, Remote I/O Units, or Host Link Units, are mounted to the PC Racks or to the CPU Unit. For additional information, consult [...]

41 Flag type Bit no. SR 247 SR 248 SR 249 SR 250 Run flags 00 Unit #8, level 1 Unit #0, level 1 Unit #8, level 0 Unit #0, level 0 01 Unit #9, level 1 Unit #1, level 1 Unit #9, level 0 Unit #1, level 0 02 Unit #10, level 1 Unit #2, level 1 Unit #10, level 0 Unit #2, level 0 03 Unit #1 1, level 1 Unit #3, level 1 Unit #1 1, level 0 Unit #3, level 0 0[...]

42 The status of SR 2521 1 and thus the status of force-set and force-reset bits can be maintained when power is turned OFF and ON by enabling the Forced Status Hold Bit in the PC Setup. If the Forced Status Hold Bit is enabled, the status of SR 2521 1 will be preserved when power is turned OFF and ON. If this is done an d SR 2521 1 is ON, then the[...]

43 This bit can be programmed to activate an external warning for a low battery volt- age. The operation of the battery alarm can be disabled in the PC Setup if desired. Refer to 3-6-4 PC Setup for details. 3-4-9 Cycle T ime Error Flag SR bit 25309 turns ON if the cycle time exceeds 100 ms. The ALM/ERR indicator on the front of the CPU Unit will al[...]

44 3-4-13 Step Flag SR bit 25407 turns ON for one cycle when step execution is started with the STEP(08) instruction. 3-4-14 Group-2 Error Flag SR bit 25414 turns ON for any of the following errors for Group-2 High-density I/O Units and B7A Interface Units: the same I/O number set twice, the same words allocated to more than one Unit, refresh error[...]

45 Negative Flag, N SR bit 25402 turns ON when the result of a calculation is negative. Overflow Flag, OF SR bit 25404 turns ON when the result of a binary addition or subtraction ex- ceeds 7FFF or 7FFFFFFF . Underflow Flag, UF S R bit 25405 turns ON when the result of a signed binary addition or subtraction exceeds 8000 or 80000000. Carry Flag, CY[...]

46 SR bit 26705 turns ON when the PC is ready to transmit to the Host Link Unit. SR bit 26713 turns ON when the PC is ready to transmit to the Host Link. 3-4-20 Peripheral Port Communications Areas Peripheral Port Error Code S R bits 26408 to 2641 1 are set when there is a peripheral port error in the Gener- al I/O Mode. Error code Error type Error[...]

47 Memory Cassette Flag SR bit 26915 turns ON when a Memory Cassette is mounted. Save UM to Cassette Flag S R bit 27000 turns ON when UM data is read to a Memory Cassette in Program Mode. Bit will automatically turn OFF . An error will be produced if turned ON in any other mode. SR bit 27001 turns ON when data is loaded into UM from a Memory Casset[...]

48 SR bit 27215 turns ON when an autoboot error occurs. 3-4-25 Data Save Flags Data transferred to Memory Cassette when Bit is turned ON in PROGRAM mode. Bit will automatically turn OFF . An error will be produced if turned ON in any other mode. Save IOM to Cassette Bit SR bit 27300 turns ON when IOM is saved to a Memory Cassette. Load IOM from Cas[...]

49 uses, such as transmission counters, flags, and control bits, and words AR 00 through A R 0 7 and AR 23 through AR 27 cannot be used for any other purpose. Words and bits from AR 08 to AR 17 are available as work words and work bits if not used for the following assigned purposes. Word Use AR 08 to AR 15 SYSMAC LINK Units AR 16, AR 17 SYSMAC LIN[...]

50 Word(s) Function Bit(s) 19 00 to 07 Hours: 00 to 23 (24-hour system) 08 to 15 Day of Month: 01 to 31 (adjusted by month and for leap year) 20 00 to 07 Month: 1 to 12 08 to 15 Y ear: 00 to 99 (Rightmost two digits of year) 21 00 to 07 Day of Week: 00 to 06 (00: Sunday; 01: Monday; 02: T uesday; 03: Wednesday; 04: Thursday; 05: Friday; 06: Saturda[...]

51 3-5-2 Slave Rack Error Flags AR bits 0200 to AR 0204 correspond to the unit numbers of Remote I/O Slave Units #0 t o #4. These flags will turn ON if the same number is allocated to more then one Slave or if a transmission error occurs when starting the System. Refer to SR 251 for errors that occur after the System has started normally . 3-5-3 Gr[...]

52 3-5-5 SYSMAC LINK System Data Link Settings A R 0700 to AR 0703 and AR 0704 to AR 0707 are used to designate word alloca- tions for operating levels 0 and 1 of the SYSMAC LINK System. Allocation can be set to occur either according to settings from the SSS or automatically in the LR and/or DM areas. If automatic allocation is designated, the num[...]

53 3-5-8 SYSMAC LINK/SYSMAC NET Link System Service Time AR 16 provides the time allocated to servicing operating level 0 of the SYSMAC LINK System and/or SYSMAC NET Link System during each cycle when a SYS- MAC LINK Unit and/or SYSMAC NET Link Unit is mounted to a Rack. AR 17 provides the time allocated to servicing operating level 1 of the SYSMAC[...]

54 3-5-10 TERMINAL Mode Key Bits If the Programming Console is mounted to the PC and is in TERMINAL mode, any inputs on keys 0 through 9 (including characters A through F , i.e., keys 0 through 5 with SHIFT) will turn on a corresponding bit in AR 22. TERMINAL mode is entered by a Programming Console operation. The bits in AR 22 correspond to Progra[...]

55 3-5-13 Cycle Time Flag AR 2405 turns ON when the cycle time set with SCAN(18) is shorter than the actual cycle time. AR 2405 is refreshed every cycle while the PC is in RUN or MONITOR mode. 3-5-14 Link Unit Mounted Flags The following flags indicate when the specified Link Units are mounted to the Racks. (Refer to 3-5-15 CPU Unit-mounting Device[...]

56 3-6 DM (Data Memory) Area The DM area is divided into various parts as described in the following table. A portion o f U M (up to 3,000 words in 1,000-word increments) can be allocated as Expansion DM. Addresses User read/write Usage DM 0000 to DM 0999 Read/Write Normal DM. DM 1000 to DM 2599 Special I/O Unit Area 1 DM 2600 to DM 5999 Normal DM.[...]

57 be used as the operand in the instruction, and the content of DM 0324 will be moved to LR 00. MOV(21)  DM 0100 LR 00 Word Content DM 0099 4C59 DM 0100 0324 DM 0101 F35A DM 0324 5555 DM 0325 2506 DM 0326 D541 5555 moved to LR 00. Indicates DM 0324 Indirect address 3-6-1 Expansion DM Area The expansion DM area is designed to provide memory spac[...]

58 3-6-2 Special I/O Unit Data Special I/O Units are allocated 1000 or 1600 words in the DM Area depending on the value set in word DM 6602 of the PC Setup. The DM 6602 setting determines whether the Special I/O Unit Data area is setup for 10 or 16 Units and whether the data is stored in read/write DM (DM 1000 to DM 2599) or read-only DM (DM 7000 t[...]

59 Although each of them contains a dif ferent record, the structure of each record is th e same: the first word contains the error code; the second and third words, the day and time. The error code will be either one generated by the system or by F AL(06)/F ALS(07); the time and date will be the date and time from AR 18 and AR 19 (Calender/date Ar[...]

60 The Error History Area can be reset by turning ON and then OFF AR 0714 (Error History Reset Bit). When this is done, the Record Pointer will be reset to 0000, the Error History Area will be reset (i.e., cleared), and any further error codes will be recorded from the beginning of the Error History Area. AR 0715 (Error History Enable Bit) must be [...]

61 Word(s) Default Function Bit(s) DM 6602 00 to 07 Not used. --- 08 to 15 00: C200H-compatible RAM Mode (Default) Use DM 1000 through DM 2599 for the initial data area for the Special I/O Unit Area. • Data in the Special I/O Unit Area can be read/written. • The data cannot be converted to ROM. 01: C200H-compatible ROM Mode 1 T ransfer the cont[...]

62 Word(s) Default Function Bit(s) DM 6614 00 to 07 Servicing time for Communications Board port A (effective when bits 08 to 15 are set to 01) 00 to 99 (BCD): Percentage of cycle time used to service port A. Minimum: 0.26 ms; maximum 58.254 ms No setting (0000) 08 to 15 Communications Board port A servicing setting enable 00: Do not set service ti[...]

63 Word(s) Default Function Bit(s) DM 6621 00 to 07 Reserved --- 08 to 15 Special I/O Unit refresh (PC Link Units included) 00: Enable refresh for all Special I/O Units 01: Disable refresh for all Special I/O Units (but, not valid on Slave Racks) A setting of 1 (Disable) is not valid for Special I/O Units mounted in Slave Racks. Enable DM 6622 00 t[...]

64 Word(s) Default Function Bit(s) DM 6648 00 to 07 Node number (Host Link) 00 to 31 (BCD) 0 08 to 1 1 Start code enable (RS-232C) 0: Disable; 1: Set Disabled 12 to 15 End code enable (RS-232C) 0: Disable (number of bytes received) 1: Set (specified end code) 2: CR, LF Disabled DM 6649 00 to 07 Start code (RS-232C) 00 to FF (binary) Not used (0000)[...]

65 Word(s) Default Function Bit(s) DM 6654 00 to 07 Start code (RS-232C) 00 to FF (binary) 0000 08 to 15 12 to 15 of DM 6653 set to 0: Number of bytes received 00: Default setting (256 bytes) 01 to FF: 1 to 255 bytes 12 to 15 of DM 6653 set to 1: End code (RS-232C) 00 to FF (binary) Error Settings (DM 6655) The following settings are accessed conti[...]

66 Word(s) Default Function Bit(s) DM 6551 00 to 07 Baud rate 00: 1.2K, 01: 2.4K, 02: 4.8K, 03: 9.6K, 04: 19.2K 1.2 K 08 to 15 Frame format Start Length Stop Parity 00: 1 bit 7 bits 1 bit Even 01: 1 bit 7 bits 1 bit Odd 02: 1 bit 7 bits 1 bit None 03: 1 bit 7 bits 2 bit Even 04: 1 bit 7 bits 2 bit Odd 05: 1 bit 7 bits 2 bit None 06: 1 bit 8 bits 1 [...]

67 Word(s) Default Function Bit(s) DM 6556 00 to 07 Baud rate 00: 1.2K, 01: 2.4K, 02: 4.8K, 03: 9.6K, 04: 19.2K 1.2 K 08 to 15 Frame format Start Length Stop Parity 00: 1 bit 7 bits 1 bit Even 01: 1 bit 7 bits 1 bit Odd 02: 1 bit 7 bits 1 bit None 03: 1 bit 7 bits 2 bit Even 04: 1 bit 7 bits 2 bit Odd 05: 1 bit 7 bits 2 bit None 06: 1 bit 8 bits 1 [...]

68 Setting Function Mode 11 C200H-compatible ROM Mode 2 The contents of DM 7000 through DM 8599 are transferred to DM 1000 through DM 2599 at startup and DM 1000 through DM 2599 are used for the Special I/O Unit Area. • The UM Area Allocation operation must be performed beforehand. • ROM conversion is possible indirectly by converting DM 7000 t[...]

69 Once defined, a TC number can be designated as an operand in one or more of certain set of instructions other than those listed above. When defined as a timer , a TC number designated as an operand takes a TIM prefix. The TIM prefix is used regardless of the timer instruction that was used to define the timer . Once defined as a counter , the TC[...]

70 3-10 UM Area With the C200HX/HG/HE PCs, the UM area contains the ladder program. Part of the UM area can be allocated for use as expansion DM or the I/O comment area. Th e usable size of the UM area ranges from 3.2 KW in the C200HE-CPU1 1-E to 31.2 KW in the C200HX-CPU  4-E. A Programming Console or SYSMAC Support Software (SSS) can be used t[...]

71 3-1 1 TR (T emporary Relay) Area Th e TR area provides eight bits that are used only with the LD and OUT instruc- tions t o enable certain types of branching ladder diagram programming. The use of TR bits is described in Section 4 Writing and Inputting the Program . TR addresses range from TR 0 though TR 7. Each of these bits can be used as many[...]

72 access words in EM bank 1 and not the DM area. In this case, the second oper- and in the MOV(21) instruction transfers #1234 to a word in the EM bank. (For example, #1234 will be moved to EM 0100 if DM 0000 contains 0100.) Later in the program, the destination for indirect addressing (  DM) is switched back to the DM area by executing IEMS( ?[...]

73 SECTION 4 W riting and Inputting the Pr ogram This section explains the basic steps and concepts involved in writing a basic ladder diagram program, inputting the program into memory , and executing it. It introduces the instructions that are used to build the basic structure of the ladder diagram and control its execution. The entire set of ins[...]

74 4-1 Basic Procedure There are several basic steps involved in writing a program. Sheets that can be copied to aid in programming are provided in Appendix F Word Assignment Re- cording Sheets and Appendix G Program Coding Sheet . 1, 2, 3... 1. Obtain a l i s t o f a l l I / O d e v i ces and the I/O points that have been assigned to them and prep[...]

75 4-3 Program Capacity The maximum user program size varies with the amount of UM allocated to ex- pansion DM and the I/O Comment Area. Approximately 10.1 KW are available fo r the ladder program when 3 KW are allocated to expansion DM and 2 KW are allocated t o I/O comments as shown below . Refer to the 3-10 UM Area for further information on UM [...]

76 4-4-1 Basic T erms Each condition in a ladder diagram is either ON or OFF depending on the status of the operand bit that has been assigned to it. A normally open condition is ON if the operand bit is ON; OFF if the operand bit is OFF . A normally closed condition is ON if the operand bit is OFF; OFF if the operand bit is ON. Generally speaking,[...]

77 Program Memory addresses start at 00000 and run until the capacity of Program Memory has been exhausted. The first word at each address defines the instruc- tion. Any definers used by the instruction are also contained in the first word. Also, if an instruction requires only a single bit operand (with no definer), the bit operand i s also progra[...]

78 LOAD and LOAD NOT The first condition that starts any logic block within a ladder diagram corre- sponds to a LOAD or LOAD NOT instruction. Each of these instruction requires one line of mnemonic code. “ Instruction ” is used as a dummy instruction in the following examples and could be any of the right-hand instructions described lat- er in [...]

79 OR and OR NOT When two or more conditions lie on separate instruction lines which run in paral- lel and then join together , the first condition corresponds to a LOAD or LOAD NO T instruction; the other conditions correspond to OR or OR NOT instructions. The following example shows three conditions which correspond (in order from the top) to a L[...]

80 4-4-4 OUTPUT and OUTPUT NOT The simplest way to output the results of combining execution conditions is to output it directly with the OUTPUT and OUTPUT NOT . These instructions are used to control the status of the designated operand bit according to the execu- tion condition. With the OUTPUT instruction, the operand bit will be turned ON as lo[...]

81 Now you have all of the instructions required to write simple input-output pro- grams. Before we finish with ladder diagram basic and go onto inputting the pro- gram into the PC, let ’ s look at logic block instruction (AND LOAD and OR LOAD), which are sometimes necessary even with simple diagrams. 4-4-6 Logic Block Instructions Logic block in[...]

82 Analyzing the above ladder diagram in terms of mnemonic instructions, the condition for IR 00000 is a LOAD instruction and the condition below it is an OR instruction between the status of IR 00000 and that of IR 00001. The condition at IR 00002 is another LOAD instruction and the condition below is an OR NOT instruction, i.e., an OR between the[...]

83 The following diagram requires AND LOAD to be converted to mnemonic code because three pairs of parallel conditions lie in series. The two options for coding the programs are also shown. 00000 00002 00004 00001 00003 00005 00500 Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 OR NOT 00001 00002 LD NOT 00002 00003 O[...]

84 Both o f the coding methods described above can also be used when using AND LOAD and OR LOAD, as long as the number of blocks being combined does no t exceed eight. The following diagram contains only two logic blocks as shown. It is not neces- sary to further separate block b components, because it can be coded directly using only AND and OR. 0[...]

85 Complicated Diagrams When determining what logic block instructions will be required to code a dia- gram, i t i s sometimes necessary to break the diagram into large blocks and then continue breaking the large blocks down until logic blocks that can be coded without logic block instructions have been formed. These blocks are then coded, combinin[...]

86 Th e following diagram requires an OR LOAD followed by an AND LOAD to code th e top of the three blocks, and then two more OR LOADs to complete the mne- monic code. 00002 00003 LR 0000 00000 00001 00004 00005 00006 00007 Address Instruction Operands 00000 LD 00000 00001 LD 00001 00002 LD 00002 00003 AND NOT 00003 00004 OR LD –– 00005 AND LD [...]

87 Again, this diagram can be redrawn as follows to simplify program structure and coding and to save memory space. 00006 00007 LR 0000 00005 00001 00002 00003 00004 00000 Address Instruction Operands 00000 LD 00006 00001 AND 00007 00002 OR 00005 00003 AND 00003 00004 AND 00004 00005 LD 00001 00006 AND 00002 00007 OR LD –– 00008 AND 00000 00009[...]

88 4-4-7 Coding Multiple Right-hand Instructions If there is more than one right-hand instruction executed with the same execu- tion condition, they are coded consecutively following the last condition on the instruction line. In the following example, the last instruction line contains one more condition that corresponds to an AND with IR 00004. 0[...]

89 Y ellow: Operation Keys Th e yellow keys are used for writing and correcting programs. Detailed explana- tions of their functions are given later in this section. Except for the SHIFT key on the upper right, the gray keys are used to input instructions and designate data area prefixes when inputting or changing a pro- gram. The SHIFT key is simi[...]

90 The gray keys other than the SHIFT key have either the mnemonic name of the instruction or the abbreviation of the data area written on them. The functions of these keys are described below . Pressed before the function code when inputting an instruction via its function code. Pressed to enter SFT (the Shift Register instruction). Input either a[...]

! ! 91 4-5-2 PC Modes T he Programming Console is equipped with a switch to control the PC mode. T o select one of the three operating modes — RUN, MONITOR, or PROGRAM — use the mode switch. The mode that you select will determine PC operation as well as the procedures that are possible from the Programming Console. RUN mode is the mode used fo[...]

92 4. Confirm that the CPU Unit ’ s POWER LED is lit and the following display ap- pears on the Programming Console screen. (If the PC mode is not dis- played, turn OFF and restart the power supply . If the ALM/ERR LED is lit or flashing o r a n error message is displayed, clear the error that has occurred.) <PROGRAM> PASSWORD! 5. Enter the[...]

93 4-6-3 Clearing Memory Using the Memory Clear operation it is possible to clear all or part of the UM area (RAM or EEPROM), and the IR, HR, AR, DM, EM and TC areas. Unless other- wise specified, the clear operation will clear all of the above memory areas. The UM area will not be cleared if the write-protect switch (pin 1 of the CPU Unit ’ s DI[...]

94 The following procedure is used to clear memory completely . Continue pressing the CLR key once for each error message until “ 00000 ” appears on the display All clear MEMORY ERR I/O VER ERR 00000 00000MEMORY CLR? HR CNT DM EM~ 00000MEM ALLCLR? 00000 00000MEM ALLCLR END Partial Clear I t is possible to retain the data in specified areas or p[...]

95 T o leave the TC area uncleared and retain Program Memory addresses 00000 through 00122, input as follows: 00000 00000 00000 00000MEMORY CLR? HR CNT DM EM~ 00000MEMORY CLR? HR DM EM~ 00123MEMORY CLR? HR DM EM~ 00000MEMORY CLR END HR DM EM Clearing Selected EM Banks When a partial memory clear operation is being performed, specific banks can be s[...]

96 Memory Clear The memory clear operation clears all memory areas except the I/O comments and UM Allocation information. The Programming Console will display the following screens: 00000 00000 00000 00000MEMORY CLR? HR CNT DM EM~ 00000MEMORY CLR END Note When the write-protect switch (pin 1 of the CPU Unit ’ s DIP switch) is set to ON the UM are[...]

97 Initial I/O T able Registration Register I/O table 00000 00000 FUN (??) 00000IOTBL ? ?Ć?U= 00000IOTBL WRIT ???? 00000IOTBL WRIT 9713 00000IOTBL WRIT OK 4-6-5 Clearing Error Messages After the I/O table has been registered, any error messages recorded in memory should be cleared. It is assumed here that the causes of any of the errors for which [...]

98 Example (No errors) (A verification error occurred) Actual I/O words Registered I/O table words I/O slot number Rack number 00000 00000 FUN (??) 00000IOTBL ? ?Ć?U= 00000IOTBL CHK OK 00000IOTBL CHK 0Ć1U=O*** I*** Meaning of Displays The following display indicates a C500, C1000H, or C2000H and C200H, C200HS, o r C200HX/HG/HE have the same unit [...]

99 4-6-7 Reading the I/O T able The I/O T able Read operation is used to access the I/O table that is currently registered i n the CPU Unit memory . This operation can be performed in any PC mode. Key Sequence [0 to 3] [0 to 9] Rack number Unit number Press the EXT key to select Remote I/O Slave Racks or Optical I/O Units. 00000 00000 FUN (??) 0000[...]

100 Meaning of Displays I/O Unit Designations for Displays (see I/O Units Mounted in Remote Slave Racks , page 101) No. of points 16 32 64 Input Unit Output Unit C500, 1000H/C2000H I/O Units No. of points 8 16 Input Unit Output Unit O O O O O O * * O * * * I * * * I I * * I I I I i(*)* * i i * * o o * * o * * * C200H, C200HS I/O Units Note: ( ∗ )[...]

101 I/O word number I/O type: I, O i, o (see tables on previous page) Unit number (0 to 9) Remote I/O Slave Unit number (0 to 4) Remote I/O Master Unit number (0 or 1) Indicates a Remote I/O Rack 00000IOTBL READ R**Ć*U=**** *** Unit number (0 to F) Indicates Group-2 HIgh-density I/O Unit 00000IOTBL READ *Ć*U=#*** 2: 2 words (32 points) 4: 4 words[...]

102 Key Sequence 00000 00000 FUN (??) 00000IOTBL ?Ć?U= 00000IOTBL CANC ???? 00000IOTBL CANC 9713 00000IOTBL CANC OK 00000IOTBL WRIT ???? 4-6-9 SYSMAC NET Link T able T ransfer The SYSMAC NET Link T able T ransfer operation transfers a copy of the SYS- MA C NET Link Data Link table to the UM Area program memory . This allows the user program and SY[...]

103 Key Sequence 00000LINK TBL~UM (SYSMACĆNET)???? 00000LINK TBL~UM OK 00000LINK TBL~UM (SYSMACĆNET)9713 00000LINK TBL~UM DISABLED The following indicates that the I/O table cannot be transferred. 00000 00000 FUN(??) Example Preparation for Operation Section 4-6[...]

104 4-7 Inputting, Modifying, and Checking the Program Once a program is written in mnemonic code, it can be input directly into the PC from a Programming Console. Mnemonic code is keyed into Program Memory addresses from the Programming Console. Checking the program involves a syntax check to see that the program has been written according to synt[...]

105 If the following mnemonic code has already been input into Program Memory , the key inputs below would produce the displays shown. 00000 00200 00200READ OFF LD 00000 00201READ ON AND 00001 00202READ OFF TIM 000 00202 TIM #0123 00203READ ON LD 00100 Address Instruction Operands 00200 LD 00000 00201 AND 00001 00202 TIM 000 # 0123 00203 LD 00100 4[...]

! 106 The SV (set value) for a timer or counter is generally entered as a constant, although inputting the address of a word that holds the SV is also possible. When inputting an SV as a constant, CONT/# is not required; just input the numeric value and press WRITE. T o designate a word, press CLR and then input the word address as described above.[...]

107 Example The following program can be entered using the key inputs shown below . Dis- plays will appear as indicated. 00000 00200 00200 LD 00002 00201READ NOP (00) 00201 TIM 000 00201 TIM DATA #0000 00201 TIM #0123 00202READ NOP (00) 00202 FUN (??) 00202 TIMH (15) 000 00202 TIMH DATA #0000 00202 TIMH #0500 00203READ NOP (00) Address Instruction [...]

108 Error Messages The following error messages may appear when inputting a program. Correct th e error as indicated and continue with the input operation. The asterisks in the displays shown below will be replaced with numeric data, normally an address, in the actual display . Message Cause and correction ****REPL ROM An attempt was made to write [...]

109 Many o f the following errors are for instructions that have not yet been described yet. Refer to 4-8 Controlling Bit Status or to Section 5 Instruction Set for details on these. T ype Message Meaning and appropriate response T ype A ????? The program has been lost. Re-enter the program. NO END INSTR There is no END(01) in the program. Write EN[...]

11 0 Example Th e following example shows some of the displays that can appear as a result of a program check. Display #2 Display #3 Halts program check Check continues until END(01) When errors are found Display #1 00699CHK ABORTD 02000PROG CHK END (01)(02.7KW) 00178CIRCUIT ERR OUT 00200 00200ILĆILC ERR ILC (03) 02000NO END INST END 00000 00000PR[...]

111 4-7-5 Program Searches The program can be searched for occurrences of any designated instruction or data area address used in an instruction. Searches can be performed from any currently displayed address or from a cleared display . T o designate a bit address, press SHIFT , press CONT/#, then input the address, including any data area designat[...]

11 2 00000 00000 LD 00000 00200SRCH LD 00000 00202SRCH LD 00000 02000SRCH END (01)(02.7KW) 00000 00100 00100 TIM 001 00203SRCH TIM 001 00203 TIM DATA #0123 00000 00000CNT CONT 00005 00200CONT SRCH LD 00005 00203CONT SRCH AND 00005 02000 END (01)(02.7K) 4-7-6 Inserting and Deleting Instructions In PROGRAM mode, any instruction that is currently disp[...]

! 11 3 T o delete an instruction, display the instruction word of the instruction to be deleted and then press DEL and the up key . All the words for the designated instruction will be deleted. Caution Be careful not to inadvertently delete instructions; there is no way to recover them without re-inputting them completely . Key Sequences When an in[...]

11 4 Find the address prior to the inser- tion point Insert the instruction Program After Insertion Inserting an Instruction 00000 00000 OUT 00000 00000 OUT 00201 00207SRCH OUT 00201 00206READ AND NOT 00104 00206 AND 00000 00206 AND 00105 00206INSERT? AND 00105 00207INSERT END AND NOT 00104 00206READ AND 00105 Address Instruction Operands 00000 LD [...]

11 5 4-7-7 Branching Instruction Lines When a n instruction line branches into two or more lines, it is sometimes neces- sary to use either interlocks or TR bits to maintain the execution condition that existed at a branching point. This is because instruction lines are executed across to a right-hand instruction before returning to the branching p[...]

11 6 Th e previous diagram B can be written as shown below to ensure correct execu- tion. I n mnemonic code, the execution condition is stored at the branching point using the TR bit as the operand of the OUTPUT instruction. This execution condition i s then restored after executing the right-hand instruction by using the same TR bit as the operand[...]

11 7 When drawing a ladder diagram, be careful not to use TR bits unless necessary . Often the number of instructions required for a program can be reduced and ease of understanding a program increased by redrawing a diagram that would otherwise required TR bits. In both of the following pairs of diagrams, the bottom versions require fewer instruct[...]

11 8 When an INTERLOCK instruction is placed before a section of a ladder pro- gram, the execution condition for the INTERLOCK instruction will control the execution o f all instruction up to the next INTERLOCK CLEAR instruction. If the execution condition for the INTERLOCK instruction is OFF , all right-hand instructions through the next INTERLOCK[...]

11 9 If IR 00000 in the above diagram is OFF (i.e., if the execution condition for the first INTERLOCK instruction is OFF), instructions 1 through 4 would be executed with OFF execution conditions and execution would move to the instruction following the INTERLOCK CLEAR instruction. If IR 00000 is ON, the status of IR 00001 would be loaded as the e[...]

120 The other type of jump is created with a jump number of 00. As many jumps as desired can be created using jump number 00 and JUMP instructions using 00 can be used consecutively without a JUMP END using 00 between them. It is even possible for all JUMP 00 instructions to move program execution to the same JUMP END 00, i.e., only one JUMP END 00[...]

121 4-8-1 DIFFERENTIA TE UP and DIFFERENTIA TE DOWN DIFFERENTIA TE UP and DIFFERENTIA TE DOWN instructions are used to turn the operand bit ON for one cycle at a time. The DIFFERENTIA TE UP instruction turns ON the operand bit for one cycle after the execution condition for it goes from OFF to ON; the DIFFERENTIA TE DOWN instruction turns ON th e o[...]

122 T o create a self-maintaining bit, the operand bit of an OUTPUT instruction is used a s a condition for the same OUTPUT instruction in an OR setup so that the operand bit of the OUTPUT instruction will remain ON or OFF until changes occur in other bits. At least one other condition is used just before the OUTPUT instruction to function as a res[...]

123 Work bits can be used to simplify programming when a certain combination of conditions i s repeatedly used in combination with other conditions. In the follow- ing example, IR 00000, IR 00001, IR 00002, and IR 00003 are combined in a logic block that stores the resulting execution condition as the status of IR 24600. IR 24600 is then combined w[...]

124 This action is easily programmed by using IR 22500 as a work bit as the operand of the DIFFERENTIA TE UP instruction (DIFU(13)). When IR 00000 turns ON, IR 22500 will be turned ON for one cycle and then be turned OFF the next cycle by DIFU(13). Assuming the other conditions controlling IR 00100 are not keeping it ON, the work bit IR 22500 will [...]

125 Except for instructions for which conditions are not allowed (e.g., INTERLOCK CLEAR and JUMP END, see below), every instruction line must also have at least one condition on it to determine the execution condition for the instruction at the right. Again, diagram A , below , must be drawn as diagram B. If an instruc- tion must be continuously ex[...]

126 4-1 1 Program Execution When program execution is started, the CPU Unit cycles the program from top to bottom, checking all conditions and executing all instructions accordingly as it moves down the bus bar . It is important that instructions be placed in the proper order so that, for example, the desired data is moved to a word before that wor[...]

127 4-12-2 Special I/O Unit Error Processing Program Us e a program like the one shown below to restart a Special I/O Unit in which an error has occurred. This example program restarts Unit 1. Disables calculations during Ini- tialization. DIFU(13) AR0101 JMP(04) 00 JME(05) 00 AR 0001 (Unit #0 Error Flag) SR 27401 (Unit #1 Restart Flag) Restart Cal[...]

128 5. Perform the Expansion Instruction Function Code Assignment operation to assign a function code to XDMR( –– ). 6. Input the program. The following program changes the Special I/O Unit Area settings for Unit 2, restarts the Unit, and disables calculations using data from Unit 2 while the Unit is initializing. @XDMR #0100 #8200 DM1200 DIFU([...]

129 4-12-5 Reducing the Cycle Time When a Special I/O Unit is mounted in a C200HX/HG/HE PC, END refreshing is performed automatically each cycle without making any special settings. When several Special I/O Units are being used, the cycle time might become too long because of the time required for this automatic I/O refreshing. T o reduce the time [...]

130 The following program example is relevant for Special I/O Units mounted to the CP U Rack or Expansion I/O Racks only , because END refreshing is always per- formed o n Special I/O Units mounted to Slave Racks regardless of the PC Setup settings. 30000 30001 30002 30003 30000 30001 30000 30001 30002 30003 30000 30001 30002 30003 30000 30001 3000[...]

131 Refer to the Analog T imer Unit ’ s Operation Manual for details on switching between internal and external timer SV settings, connecting a variable resistor , and switch settings. Bits 08 to 1 1 of n Timer Start Input Completion Flags Timer Set Bits (Bits 00 to 03 of n) Time-up Output Timer Start Input Time-up Output Timer interval 4-13-2 Bi[...]

132 4-13-3 Example Program The following table shows the word allocations for the Units in this example. Item Word IR word allocated to the Analog T imer Unit IR 002 IR word allocated to the Input Unit IR 000 IR word allocated to the Output Unit IR 005 The Analog T imer Unit ’ s SV settings and external variable resistor control con- nections are[...]

133 The following diagram shows the switch settings and wiring connections required to achieve the Unit configuration shown above. The settings on these two variable resistor controls are valid because timers 0 and 1 are set for internal SV settings. Use the screwdriver included with the Unit to set the variable resistor . The settings on these two[...]

134 The following diagram shows the example ladder program. 1, 2, 3... 1. Output IR 00500 will go ON about 0.6 s (T0) after input IR 00002 goes ON. 2. Output IR 00501 will go ON about 3 s (T1) after input IR 00003 goes ON. 3. Output IR 00502 will go ON about 20 s (T2) after input IR 00004 goes ON an d IR 00503 will go ON about 8 minutes (T3) after [...]

135 SECTION 5 Instruction Set The C200HX/HG/HE PCs have large programming instruction sets that allow for easy programming of complicated control processes. This section explains instructions individually and provides the ladder diagram symbol, data areas, and flags used with each. Th e C200HX/HG/HS PCs can process more than 100 instructions that r[...]

136 5-16-3 BLOCK SET – BSET(71) 181 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16-4 BLOCK TRANSFER – XFER(70) 182 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16-5 DA T A EXCHANGE – XCHG(73) 183 . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

137 5-21 Special Math Instructions 257 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21-1 FIND MAXIMUM – MAX( –– ) 257 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21-2 FIND MINIMUM – MIN( –– ) 258 . . . . . . . . . . . . .[...]

138 5-1 Notation In the remainder of this manual, all instructions will be referred to by their mne- monics. For example, the Output instruction will be called OUT ; the AND Load instruction, AND LD. If you ’ re not sure of the instruction a mnemonic is used for , refer to Appendix B Programming Instructions . If an instruction is assigned a func[...]

! 139 Caution Th e IR and SR areas are considered as separate data areas. If an operand has access to one area, it doesn ’ t necessarily mean that the same operand will have access to the other area. The border between the IR and SR areas can, howev- er , be crossed for a single operand, i.e., the last bit in the IR area may be speci- fied for an[...]

140 5-4 Differentiated Instructions Most instructions are provided in both differentiated and non-differentiated forms. Differentiated instructions are distinguished by an @ in front of the instruction mnemonic. A non-differentiated instruction is executed each time it is cycled as long as its execution condition is ON. A differentiated instruction[...]

141 5-5 Expansion Instructions The C200HX/HG/HE PCs have more instructions that require function codes (121) than function codes (100), so some instructions do not have fixed function codes. These instructions, called expansion instructions, are listed in the follow- ing table. Default function codes are given for the instructions that have them. A[...]

142 Code Page Name Mnemonic --- (@)MIN FIND MINIMUM 258 --- MTR MA TRIX INPUT 348 --- (@)NEG 2 ’ S COMPLEMENT 226 --- (@)NEGL DOUBLE 2 ’ S COMPLEMENT 227 --- PID PID CONTROL 266 --- (@)PMCR PROTOCOL MACRO 335 --- (@)RXD RECEIVE 329 --- (@)SBBL DOUBLE BINARY SUBTRACT 251 --- (@)SCL SCALING 222 --- (@)SRCH DA T A SEARCH 314 --- (@)STUP CHANGE RS-[...]

143 The following diagram and corresponding mnemonic code illustrates the points described above. Address Instruction Data 00000 LD 00000 00001 AND 00001 00002 OR 00002 00003 DIFU(13) 22500 00004 LD 00100 00005 AND NOT 00200 00006 LD 01001 00007 AND NOT 01002 00008 AND NOT LR 6300 00009 OR LD –– 00010 AND 22500 0001 1 BCNT(67) –– # 0001 004[...]

144 Multiple Instruction Lines If a right-hand instruction requires multiple instruction lines (such as KEEP(1 1)), all of the lines for the instruction are entered before the right-hand instruction. Each o f the lines for the instruction is coded, starting with LD or LD NOT , to form ‘ logic blocks ’ that are combined by the right-hand instruc[...]

Instruction Set Lists Section 5-7 145 5-7 Instruction Set Lists This section provides tables of the instructions available in the C200HX/HG/HE. Th e first table can be used to find instructions by function code. The second table can be used to find instruction by mnemonic. In both tables, the @ symbol indi- cates instructions with differentiated va[...]

Instruction Set Lists Section 5-7 146 Mnemonic Page Name Words Code ASFT(@) 17 4 ASYNCHRONOUS SHIFT REGISTER 178 ASL (@) 25 2 ARITHMETIC SHIFT LEFT 175 ASR (@) 26 2 ARITHMETIC SHIFT RIGHT 175 A VG (@) –– 4 A VERAGE V ALUE 259 BCD (@) 24 3 BINAR Y TO BCD 205 BCDL (@) 59 3 DOUBLE BINARY -TO-DOUBLE BCD 206 BCMP (@) 68 4 BLOCK COMP ARE 197 BCNT (@)[...]

Instruction Set Lists Section 5-7 147 Mnemonic Page Name Words Code IORD (@) –– 4 SPECIAL I/O UNIT READ 350 IORF (@) 97 3 I/O REFRESH 306 IOWR (@) –– 4 SPECIAL I/O UNIT WRITE 351 JME 05 2 JUMP END 157 JMP 04 2 JUMP 157 KEEP 11 2 KEEP 154 LD None 1 LOAD 149 LD NOT None 1 LOAD NOT 149 LINE (@) 63 4 COLUMN TO LINE 224 LMSG (@) 47 4 32-CHARACTE[...]

Instruction Set Lists Section 5-7 148 Mnemonic Page Name Words Code SCAN (@) 18 4 CYCLE TIME 301 SCL (@) –– 4 SCALING 222 SDEC (@) 78 4 7-SEGMENT DECODER 215 SEC (@) 65 4 HOURS TO SECONDS 207 SEND (@) 90 4 NETWORK SEND 318 SET None 2 SET 153 SFT 10 3 SHIFT REGISTER 171 SFTR (@) 84 4 REVERSIBLE SHIFT REGISTER 173 SLD (@) 74 3 ONE DIGIT SHIFT LEF[...]

149 5-8 Ladder Diagram Instructions Ladder Diagram instructions include Ladder instructions and Logic Block instructions and correspond to the conditions on the ladder diagram. Logic block instructions are used to relate more complex parts. 5-8-1 LOAD, LOAD NOT , AND, AND NOT , OR, and OR NOT B : Bit IR, SR, AR, HR, TC, LR, TR Ladder Symbols Operan[...]

150 5-8-2 AND LOAD and OR LOAD Ladder Symbol AND LOAD – AND LD 00002 00003 00000 00001 Ladder Symbol OR LOAD – OR LD 00000 00001 00002 00003 Description When instructions are combined into blocks that cannot be logically combined using only OR and AND operations, AND LD and OR LD are used. Whereas AND and OR operations logically combine a bit s[...]

151 OUT turns ON the designated bit for an ON execution condition, and turns OFF th e designated bit for an OFF execution condition. With a TR bit, OUT appears at a branching point rather than at the end of an instruction line. Refer to 4-7-7 Branching Instruction Lines for details. OUT NOT turns ON the designated bit for a OFF execution condition,[...]

152 Precautions DIFU(13) and DIFD(14) operation can be uncertain when the instructions are programmed between IL and ILC, between JMP and JME, or in subroutines. Re- fer to 5-10 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) , 5-1 1 JUMP and JUMP END – JMP(04) and JME(05) , and 5-23 Subroutines and Inter- rupt Control for details. In diagra[...]

153 5-9-3 SET and RESET – SET and RSET B : Bit IR, SR, AR, HR, LR Ladder Symbols Operand Data Areas SET B B : Bit IR, SR, AR, HR, LR RSET B Description SE T turns the operand bit ON when the execution condition is ON, and does not affect the status of the operand bit when the execution condition is OFF . RSET turns the operand bit OFF when the ex[...]

154 5-9-4 KEEP – KEEP(1 1) B : Bit IR, AR, HR, LR Ladder Symbol Operand Data Areas S R KEEP(1 1) B Limitations Any output bit can generally be used in only one instruction that controls its sta- tus. Refer to 3-3 IR Area for details. Description KEEP(1 1) is used to maintain the status of the designated bit based on two execution conditions. Thes[...]

155 th e input device) can cause the designated bit of KEEP(1 1) to be reset. This situ- ation is shown below . A Input Unit A NEVER S R KEEP(1 1) B Bits used in KEEP are not reset in interlocks. Refer to the 5-10 INTERLOCK – and INTERLOCK CLEAR IL(02) and ILC(03) for details. Example If a HR bit or an AR bit is used, bit status will be retained [...]

156 Instruction T reatment OUT and OUT NOT Designated bit turned OFF . SET and RSET Bit status maintained. TIM and TIMH(15) Reset. TTIM(87) PV maintained. CNT , CNTR(12) PV maintained. KEEP(1 1) Bit status maintained. DIFU(13) and DIFD(14) Not executed (see the following DIFU(13) and DIFD(14) in Interlocks ). All others Not executed. IL(02) and ILC[...]

157 Example The following diagram shows IL(02) being used twice with one ILC(03). Address Instruction Operands 00000 LD 00000 00001 IL(02) 00002 LD 00001 00003 TIM 51 1 # 0015 00004 LD 00002 00005 IL(02) 00006 LD 00003 00007 AND NOT 00004 00008 LD 00100 00009 CNT 001 010 00010 LD 00005 0001 1 OUT 00502 00012 ILC(03) 00000 00001 ILC(03) IL(02) 00004[...]

158 If the jump number for JMP(04) is 00, the CPU Unit will look for the next JME(05) with a jump number of 00. T o do so, it must search through the program, causing a longer cycle time (when the execution condition is OFF) than for other jumps. The status of timers, counters, bits used in OUT , bits used in OUT NOT , and all other status controll[...]

159 Any one TC number cannot be defined twice, i.e., once it has been used as the definer i n any of the timer or counter instructions, it cannot be used again. Once defined, TC numbers can be used as many times as required as operands in instructions other than timer and counter instructions. TC numbers run from 000 through 51 1. No prefix is requ[...]

160 If the execution condition remains ON long enough for TIM to time down to zero, the Completion Flag for the TC number used will turn ON and will remain ON until TIM is reset (i.e., until its execution condition is goes OFF). The following figure illustrates the relationship between the execution condition for TIM and the Completion Flag assigne[...]

161 ON. When the SV in 005 has expired, 00201 is turned OFF . This bit will also be turned OFF when TIM 001 is reset, regardless of whether or not SV has expired. 00000 TIM 000 00001 TIM 001 00200 00201 015.0 s TIM 000 #0150 TIM 001 IR 005 IR 005 Address Instruction Operands 00000 LD 00000 00001 TIM 000 # 0150 00002 LD TIM 000 00003 OUT 00200 00004[...]

162 002; 00000 in an inverse condition is necessary to reset TIM 002 when 00000 goes ON and 00500 is necessary to activate TIM 002 (when 00000 is OFF). 00000 00500 00000 TIM 001 TIM 002 005.0 s 003.0 s 00000 00500 5.0 s 3.0 s TIM 001 #0050 S R KEEP(1 1) 00500 TIM 002 #0030 Address Instruction Operands 00000 LD 00000 00001 TIM 001 # 0050 00002 LD 00[...]

163 The following one-shot timer may be used to save memory . 00000 TIM 001 00100 00100 001.5 s TIM 001 #0015 Address Instruction Operands 00000 LD 00000 00001 OR 00100 00002 TIM 001 # 0015 00003 AND NOT TIM 001 00004 OUT 00100 Bits can be programmed to turn ON and OFF at regular intervals while a desig- nated execution condition is ON by using TIM[...]

164 5-14-2 HIGH-SPEED TIMER – TIMH(15) N : TC number # (000 through 51 1, although 000 through 015 preferred) Ladder Symbol Definer V alues SV : Set value (word, BCD) IR, AR, DM, HR, LR, # Operand Data Areas TIMH(15) N SV Limitations SV is between 00.00 and 99.99. (Although 00.00 and 00.01 may be set, 00.00 will disable the timer , i.e., turn ON [...]

165 5-14-3 T OT ALIZING TIMER – TTIM(87) SV : Set value (word, BCD) IR, AR, DM, HR, LR RB : Reset bit IR, SR, AR, HR, LR Ladder Symbol Operand Data Areas TTIM(87) N SV RB N : TC number # (000 through 51 1) Definer V alues Limitations SV is between 0000 and 9999 (000.0 and 999.9 s) and must be in BCD. The dec- imal point is not entered. Each TC nu[...]

166 Example Th e following figure illustrates the relationship between the execution conditions for a totalizing timer with a set value of 2 s, its PV , and the Completion Flag. Address Instruction Operands 00000 LD 00000 00001 TTIM(87) TIM 000 # 0020 LR 2100 00000 TTIM(87) TIM 000 #0020 LR 2100 T imer input (I: IR 00000) Reset bit (RB: LR 2100) Co[...]

167 Changes in execution conditions, the Completion Flag, and the PV are illus- trated below . PV line height is meant only to indicate changes in the PV . Execution condition on count pulse (CP) Execution condition on reset (R) ON OFF ON OFF Completion Flag ON OFF PV SV SV – 1 SV – 2 0002 0001 0000 SV Precautions Program execution will continu[...]

168 Th e previously-shown CNT can be modified to restart from SV each time power is turned ON to the PC. This is done by using the First Cycle Flag in the SR area (25315) to reset CNT as shown below . 00000 CP R CNT 004 #0150 00002 00001 00205 CNT 004 25315 Address Instruction Operands 00000 LD 00000 00001 AND 00001 00002 LD 00002 00003 OR 25315 00[...]

169 tween when the Completion Flag for TIM 001 goes ON and TIM 001 is reset by its Completion Flag). TIM 001 is also reset by the Completion Flag for CNT 002 so that the extended timer would not start again until CNT 002 was reset by 00001, which serves as the reset for the entire extended timer . Because i n this example the SV for TIM 001 is 5.0 [...]

170 Limitations Each TC number can be used as the definer in only one TIMER or COUNTER instruction. Description The CNTR(12) is a reversible, up/down circular counter , i.e., it is used to count between zero and SV according to changes in two execution conditions, those in the increment input (II) and those in the decrement input (DI). The present [...]

171 5-15 Data Shifting Al l of the instructions described in this section are used to shift data, but in diffe r- ing amounts and directions. The first shift instruction, SFT(10), shifts an execu- tion condition into a shift register; the rest of the instructions shift data that is al- ready in memory . 5-15-1 SHIFT REGISTER – SFT(10) St : Starti[...]

172 The following example uses the 1-second clock pulse bit (25502) so that the execution condition produced by 00005 is shifted into a 3-word register between IR 010 and IR 012 every second. I P SFT(10) 010 012 R 00005 25502 00006 Address Instruction Operands 00000 LD 00005 00001 LD 25502 00002 LD 00006 00003 SFT(10) 010 012 Th e following program[...]

173 The program is set up so that a rotary encoder (00000) controls execution of SFT(10) through a DIFU(13), the rotary encoder is set up to turn ON and OFF each time a product passes the first sensor . Another sensor (00002) is used to detect faulty products in the shoot so that the pusher output and HR 0003 of the shift register can be reset as r[...]

174 Description SFTR(84) is used to create a single- or multiple-word shift register that can shift data to either the right or the left. T o create a single-word register , designate the same word for St and E. The control word provides the shift direction, the status to be put into the register , the shift pulse, and the reset input. The control [...]

175 5-15-3 ARITHMETIC SHIFT LEFT – ASL(25) Wd : Shift word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas ASL(25) Wd @ASL(25) Wd Description When the execution condition is OFF , ASL(25) is not executed. When the execu- tion condition is ON, ASL(25) shifts a 0 into bit 00 of Wd, shifts the bits of Wd one bit to the left, and shifts the [...]

176 5-15-5 ROT A TE LEFT – ROL(27) Wd : Rotate word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas ROL(27) Wd @ROL(27) Wd Description When the execution condition is OFF , ROL(27) is not executed. When the execution condition is ON, ROL(27) shifts all Wd bits one bit to the left, shifting CY into bit 00 of Wd and shifting bit 15 of Wd i[...]

177 5-15-7 ONE DIGIT SHIFT LEFT – SLD(74) Ladder Symbols Operand Data Areas SLD(74) St E @SLD(74) St E St : Starting word IR, SR, AR, DM, HR, LR E : End word IR, SR, AR, DM, HR, LR Limitations St and E must be in the same data area, and St must be less than or equal to E. Description When the execution condition is OFF , SLD(74) is not executed. [...]

178 Precautions If a power failure occurs during a shift operation across more than 50 words, the shift operation might not be completed. Set the range between E and St to a maximum of 50 words. Flags ER: The St and E words are in different areas, or St is less than E. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD[...]

179 Description When the execution condition is OFF , ASFT(17) does nothing and the program moves to t h e n e x t instruction. When the execution condition is ON, ASFT(17) is used to create and control a reversible asynchronous word shift register be- tween S t and E. This register only shifts words when the next word in the register is zero, e.g.[...]

180 5-16 Data Movement This section describes the instructions used for moving data between different addresses in data areas. These movements can be programmed to be within th e same data area or between different data areas. Data movement is essential fo r utilizing all of the data areas of the PC. Ef fective communications i n Link Sys- tems als[...]

181 Precautions TC numbers cannot be designated as D to change the PV of the timer or counter . However , these can be easily changed using BSET(71). Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ : ON when all zeros are transferred to D. N: ON when bit 15 o[...]

182 Example Th e following example shows how to use BSET(71) to change the PV of a timer depending on the status of IR 00003 and IR 00004. When IR 00003 is ON, TIM 010 will operate as a 50-second timer; when IR 00004 is ON, TIM 010 will oper- ate as a 30-second timer . TIM 010 #9999 @BSET(71) #0500 TIM 010 TIM 010 @BSET(71) #0300 TIM 010 TIM 010 00[...]

183 Flags ER: N is not BCD between 0000 and 2000. S and S+N or D and D+N are not in the same data area. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) 5-16-5 DA T A EXCHANGE – XCHG(73) E1 : Exchange word 1 IR, SR, AR, DM, HR, TC, LR E2 : Exchange word 2 IR, SR, AR, DM,[...]

184 When the execution condition is OFF , DIST(80) is not executed. When the execution condition is ON, DIST(80) operates a stack from DBs to DBs+C – 9000. DBs is the stack pointer , so S is copied to the word indicated by DBs and DBs is incremented by 1. The Negative Flag also changes. Specifies the stack length (000 to 999). A value of 9 indica[...]

185 5-16-7 DA T A COLLECT – COLL(81) SBs : Source base word IR, SR, AR, DM, HR, TC, LR C : Of fset data (BCD) IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D : Destination word IR, SR, AR, DM, HR, TC, LR COLL(81) SBs C D @COLL(81) SBs C D Limitations C must be a BCD. If C ≤ 6655, SBs must be in the same data area as SBs+C. If [...]

186 Example In the following example, the content of C (HR 00) is 9010, and COLL(81) is used to copy the oldest entries from a10-word stack (IR 001 to IR 010) to LR 20. Stack pointer decremented After one execution After two executions DIST(80) 001 HR 00 LR 20 00001 Address Instruction Operands 00000 LD 00001 00001 COLL(81) 001 HR 00 LR 20 IR 001 B[...]

187 Example In the following example, the content of C (HR 00) is 8010, and COLL(81) is used to copy the most recent entries from a 10-word stack (IR 001 to IR 010) to LR 20. Stack pointer decremented After one execution After two executions COLL(81) 001 HR 00 LR 20 00001 Address Instruction Operands 00000 LD 00001 00001 COLL(81) 001 HR 00 LR 20 IR[...]

188 Description When the execution condition is OFF , MOVB(82) is not executed. When the execution condition is ON, MOVB(82) copies the specified bit of S to the speci- fied bit in D. The bits in S and D are specified by Bi. The rightmost two digits of Bi designate the source bit; the leftmost two bits designate the destination bit. 1 Bi 120 Source[...]

189 Digit Designator The following show examples of the data movements for various values of Di. 0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3 S Di: 0031 Di: 0023 Di: 0030 Di: 0010 S S S 0 1 2 3 D 0 1 2 3 D 0 1 2 3 D 0 1 2 3 D Flags ER: At least one of the rightmost three digits of Di is not between 0 and 3. Indirectly addressed DM word is non-existent. (Content[...]

190 Example In the following example, XFRB(62) is used to transfer 5 bits from IR 020 to LR 2 1 when IR 00001 is ON. The starting bit in IR 020 is 0, and the starting bit in LR 21 is 4, so IR 02000 to IR 02004 are copied to LR 2104 to LR 2108. XFRB(62) #0540 IR 020 LR 21 00001 Address Instruction Operands 00000 LD 00001 00001 XFRB(62) # 0540 020 LR[...]

191 Example The following example copies the contents of the 300 words from DM 0000 through DM 0299 to EM 2000 through EM 2299 in the current EM bank. XFR2( –– ) #0300 DM 0000 #2000 00000 Address Instruction Operands 00200 LD 00000 00201 XFR2( –– ) # 0300 DM 0000 # 2000 5-16-12 EM BANK TRANSFER – BXF2( –– ) C : FIrst control word IR, [...]

192 Example The following example copies the contents of the 300 words from DM 0000 through DM 0299 to EM 2000 through EM 2299 in the EM bank 01. (EM bank 00 isn ’ t used as the source because S isn ’ t a constant.) BXF2( –– ) DM 1000 DM 0000 #2000 00000 Address Instruction Operands 00200 LD 00000 00201 BXF2( –– ) DM 1000 DM 0000 # 2000[...]

193 Example The following example shows the comparisons made and the results provided for MCMP(19). Here, the comparison is made during each cycle when 00000 is ON. IR 100 0100 DM 0200 0100 DM 030000 0 IR 101 0200 DM 0201 0200 DM 030001 0 IR 102 0210 DM 0202 0210 DM 030002 0 IR 103 ABCD DM 0203 0400 DM 030003 1 IR 104 ABCD DM 0204 0500 DM 030004 1 [...]

194 Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ : ON if Cp1 equals Cp2. LE : ON if Cp1 is less than Cp2. GR : ON if Cp1 is greater than Cp2. Flag Address C1 < C2 C1 = C2 C1 > C2 GR 25505 OFF OFF ON EQ 25506 OFF ON OFF LE 25507 ON OFF OFF The followi[...]

195 The branching structure of this diagram is important in order to ensure that 00200, 00201, and 00202 are controlled properly as the timer counts down. Be - cause all of the comparisons here use to the timer ’ s PV as reference, the other operand for each CMP(20) must be in 4-digit BCD. #2000 CMP(20) TIM 010 #3000 CMP(20) TIM 010 CMP(20) TIM 0[...]

196 5-17-3 DOUBLE COMP ARE – CMPL(60) Cp2 : First word of second compare word pair IR, SR, AR, DM, HR, TC, LR Cp1 : First word of first compare word pair IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas CMPL(60) Cp1 Cp2 000 (fixed) Limitations Cp1 and Cp1+1 must be in the same data area, as must Cp2 and Cp2+1. Description When the exe[...]

197 The following example shows how to save the comparison result immediately . If th e content of HR 10, HR 09 is greater than that of 01 1, 010, then 00200 is turned ON; if the two contents are equal, 00201 is turned ON; if content of HR 10, HR 0 9 is less than that of 01 1, 010, then 00202 is turned ON. In some applications, only on e of the thr[...]

198 Description When the execution condition is OFF , BCMP(68) is not executed. When the execution condition is ON, BCMP(68) compares CD to the ranges defined by a block consisting of of CB, CB+1, CB+2, ..., CB+31. Each range is defined by two words, the first one providing the lower limit and the second word providing the upper limit. If CD is fou[...]

199 Example The following example shows the comparisons made and the results provided for BCMP(68). Here, the comparison is made during each cycle when 00000 is ON. CD 001 Lower limits Upper limits R: HR 05 001 0210 HR 10 0000 HR 1 1 0100 HR 0500 0 HR 12 0101 HR 13 0200 HR 0501 0 HR 14 0201 HR 15 0300 HR 0502 1 HR 16 0301 HR 17 0400 HR 0503 0 HR 18[...]

200 Example The following example shows the comparisons made and the results provided for TCMP(85). Here, the comparison is made during each cycle when 00000 is ON. CD: 001 Upper limits R: HR 05 001 0210 HR 10 0100 HR 0500 0 HR 1 1 0200 HR 0501 0 HR 12 0210 HR 0502 1 HR 13 0400 HR 0503 0 HR 14 0500 HR 0504 0 HR 15 0600 HR 0505 0 HR 16 0210 HR 0506 [...]

201 Precautions Placing other instructions between ZCP(88) and the operation which accesses the EQ, LE, and GR flags may change the status of these flags. Be sure to ac- cess them before the desired status is changed. Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceede[...]

202 Description When the execution condition is OFF , ZCPL( –– ) is not executed. When the execution condition is ON, ZCPL( –– ) compares the 8-digit value in CD, CD+1 to the range defined by lower limit LL+1,LL and upper limit UL+1,UL and outputs th e result to the GR, EQ, and LE flags in the SR area. The resulting flag status is shown in [...]

203 Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ : ON if Cp1 equals Cp2. LE : ON if Cp1 is less than Cp2. GR : ON if Cp1 is greater than Cp2. Comparison result Flag status GR (SR 25505) EQ (SR 25506) LE (SR 25507) Cp1 < Cp2 001 Cp1 = Cp2 010 Cp1 > Cp[...]

204 5-18 Data Conversion The conversion instructions convert word data that is in one format into another format and output the converted data to specified result word(s). Conversions are available to convert between binary (hexadecimal) and BCD, to 7-segment display data, to ASCII, and between multiplexed and non-multiplexed data. All of these ins[...]

205 5-18-2 DOUBLE BCD-TO-DOUBLE BINAR Y – BINL(58) S : First source word (BCD) IR, SR, AR, DM, HR, TC, LR R : First result word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas BINL(58) S R @BINL(58) S R Description When the execution condition is OFF , BINL(58) is not executed. When the execution condition is ON, BINL(58) converts an eig[...]

206 Note If the content of S exceeds 270F , the converted result would exceed 9999 and BCD(24) will not be executed. When the instruction is not executed, the content of R remains unchanged. Signed Binary Data BCD(24) cannot be used to convert signed binary data directly to BCD. T o con- vert signed binary data, first determine whether the data is [...]

207 5-18-5 HOURS-TO-SECONDS – SEC(65) S : Beginning source word (BCD) IR, SR, AR, DM, HR, TC, LR R : Beginning result word (BCD) IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas 000 : Set to 000. --- SEC(65) S R 000 @SEC(65) S R 000 Limitations S and S+1 must be within the same data area. R and R+1 must be within the same data area. S[...]

208 5-18-6 SECONDS-TO-HOURS – HMS(66) S : Beginning source word (BCD) IR, SR, AR, DM, HR, TC, LR R : Beginning result word (BCD) IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas 000 : Set to 000. --- HMS(66) S R 000 @HMS(66) S R 000 Limitations S and S+1 must be within the same data area. R and R+1 must be within the same data area. S[...]

209 5-18-7 4-TO-16/8-TO-256 DECODER – MLPX(76) S : Source word IR, SR, AR, DM, HR, TC, LR C : Control word IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR, LR MLPX(76) S C R @MLPX(76) S C R Limitations When the leftmost digit of C is 0, the rightmost two digits of C must each be be- tween 0[...]

210 Some example C values and the digit-to-word conversions that they produce are shown below . 0 1 2 3 R R + 1 R R + 1 R + 2 0 1 2 3 0 1 2 3 0 1 2 3 R R + 1 R + 2 R + 3 R R + 1 R + 2 R + 3 S C: 0031 C: 0023 C: 0030 C: 0010 S S S Th e following is an example of a one-digit decode operation from digit number 1 of S, i.e., here C would be 0001. Sourc[...]

21 1 The 4 possible C values and the conversions that they produce are shown be- low . (In S, 0 indicates the rightmost byte and 1 indicates the leftmost byte.) 0 1 R to R+15 R+16 to R+31 S C: 1000 0 1 R to R+15 R+16 to R+31 S C: 1010 0 1 R to R+15 R+16 to R+31 S C: 101 1 0 1 R to R+15 R+16 to R+31 S C: 1001 The following is an example of a one-byt[...]

212 The following program converts three digits of data from LR 20 to bit positions and turns ON the corresponding bits in three consecutive words starting with HR 10. 00000 MLPX(76) DM 0020 #0021 HR 10 Address Instruction Operands 00000 LD 00000 00001 MLPX(76) LR 20 # 0021 HR 10 S: LR 20 R: HR 10 R+1: HR 1 1 R+2: HR 12 DM 00 2 0 HR 1000 0 HR 1 100[...]

213 16-bit to 4-bit Encoder DMPX(77) operates as a 16-bit to 4-bit encoder when the leftmost digit of C is 0. When the execution condition is OFF , DMPX(77) is not executed. When the execution condition is ON, DMPX(77) determines the position of the highest ON bit in S, encodes it into single-digit hexadecimal value corresponding to the bit number [...]

214 256-bit to 8-bit Encoder DMPX(77) operates as a 256-bit to 8-bit encoder when the leftmost digit of C is set to 1. When the execution condition is OFF , DMPX(77) is not executed. When the execution condition is ON, DMPX(77) determines the position of the highest (leftmost) ON bit in the group of 16 source words from S to S+15 or S+16 to S+31, e[...]

215 When 00000 is ON, the following diagram encodes IR words 010 and 01 1 to t he first two digits of HR 20 and then encodes LR 10 and 1 1 to the last two digits of HR 20. Although the status of each source word bit is not shown, it is assumed that the bit with status 1 (ON) shown is the highest bit that is ON in the word. 00000 DMPX(77) 010 HR 20 [...]

216 Any or all of the digits in S may be converted in sequence from the designated first digit. The first digit, the number of digits to be converted, and the half of D to receive the first 7-segment display code (rightmost or leftmost 8 bits) are desig- nated in Di. If multiple digits are designated, they will be placed in order starting from the [...]

217 Example The following example shows the data to produce an 8. The lower case letters show which bits correspond to which segments of the 7-segment display . The table underneath shows the original data and converted code for all hexadeci- mal digits. 2 0 2 1 2 2 2 3 2 0 2 1 2 2 2 3 2 0 2 1 2 2 2 3 2 0 2 1 2 2 2 3 0 1 0 0 0 0 0 1 0 1 1 1 1 0 1 1[...]

218 5-18-10 ASCII CONVERT – ASC(86) S : Source word IR, SR, AR, DM, HR, TC, LR Di : Digit designator IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D : First destination word IR, SR, AR, DM, HR, LR ASC(86) S Di D @ASC(86) S Di D Limitations Di must be within the values given below All destination words must be in the same data ar[...]

219 Some examples of Di values and the 4-bit binary to 8-bit ASCII conversions that they produce are shown below . 0 1 2 3 S Di: 001 1 D 0 1 2 3 Di: 0030 S 0 1 2 3 Di: 0130 S Di: 01 12 0 1 2 3 S 1st half 2nd half D 1st half 2nd half D+1 1st half 2nd half D 1st half 2nd half D+1 1st half 2nd half D 1st half 2nd half D+1 1st half 2nd half D+2 1st hal[...]

220 Limitations Di must be within the values given below . All source words must be in the same data area. Bytes in the source words must contain the ASCII code equivalent of hexadeci- mal values, i.e., 30 to 39 (0 to 9), 41 to 46 (A to F), or 61 to 66 (a to f). Description When the execution condition is OFF , HEX( –– ) is not executed. When t[...]

221 Some examples of Di values and the 8-bit ASCII to 4-bit hexadecimal conver- sions that they produce are shown below . 0 1 2 3 D Di: 001 1 S Di: 0030 Di: 0133 Di: 0023 1 st byte 2 nd byte S 1 st byte 2 nd byte S+1 1 st byte 2 nd byte 0 1 2 3 D S 1 st byte 2 nd byte S+1 1 st byte 2 nd byte 0 1 2 3 D S 1 st byte 2 nd byte S+1 1 st byte 2 nd byte 0[...]

222 Flags ER: Incorrect digit designator , or data area for destination exceeded. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) Example In the following example, the 2 nd byte of LR 10 and the 1 st byte of LR 1 1 are con- verted to hexadecimal values and those values ar[...]

223 The following table shows the functions and ranges of the parameter words: Parameter Function Range Comments P1 BCD point #1 (A Y ) 0000 to 9999 --- P1+1 Hex. point #1 (A X ) 0000 to FFFF Do not set P1+1=P1+3. P1+2 BCD point #2 (B Y ) 0000 to 9999 --- P1+3 Hex. point #2 (B X ) 0000 to FFFF Do not set P1+3=P1+1. The following diagram shows the s[...]

224 5-18-13 COLUMN TO LINE – LINE(63) S : First word of 16 word source set IR, SR, AR, DM, HR, TC, LR C: Column bit designator (BCD) IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D : Destination word IR, SR, AR, DM, HR, TC, LR LINE(63) S C D @LINE(63) S C D Limitations S and S+15 must be in the same data area. C must be between [...]

225 5-18-14 LINE TO COLUMN – COLM(64) S : Source word IR, SR, AR, DM, HR, TC, LR C: Column bit designator (BCD) IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D : First word of the destination set IR, AR, DM, HR, TC, LR COLM(64) S D C @COLM(64) S D C Limitations D and D+15 must be in the same data area. C must be between #0000 an[...]

226 5-18-15 2 ’ S COMPLEMENT – NEG( –– ) S : Source word IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : Result word IR, SR, AR, DM, HR, LR NEG( –– ) S R Description Converts the four-digit hexadecimal content of the source word (S) to its 2 ’ s complement and outputs the result to the result word (R). This operati[...]

227 5-18-16 DOUBLE 2 ’ S COMPLEMENT – NEGL( –– ) S : First source word IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR, LR NEGL( –– ) S R --- Limitations S and S+1 must be in the same data area, as must R and R+1. Description Converts the eight-digit hexadecimal content of the source[...]

228 5-19 BCD Calculations The BCD calculation instructions – INC(38), DEC(39), ADD(30), ADDL(54), SUB(31), SUBL(55), MUL(32), MULL(56), DIV(33), DIVL(57), FDIV(79), and ROOT(72) – all perform arithmetic operations on BCD data. For INC(38) and DEC(39) the source and result words are the same. That is, the content of the source word is overwritte[...]

229 5-19-3 SET CARR Y – STC(40) Ladder Symbols STC(40) @STC(40) When the execution condition is OFF , STC(40) is not executed. When the execution condition is ON, STC(40) turns ON CY (SR 25504). Note Refer to Appendix C Error and Arithmetic Flag Operation for a table listing the instructions that affect CY . 5-19-4 CLEAR CARR Y – CLC(41) Ladder[...]

230 Example If 00002 is ON, the program represented by the following diagram clears CY with CLC(41), adds the content of LR 25 to a constant (6103), places the result in DM 0100, and then moves either all zeros or 0001 into DM 0101 depending on the status of C Y (25504). This ensures that any carry from the last digit is preserved in R+1 so that th[...]

231 Flags ER: Au and/or Ad is not BCD. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) CY : ON when there is a carry in the result. EQ : ON when the result is 0. Example When 00000 is ON, the following program adds two 12-digit numbers, the first contained in LR 20 throug[...]

! 232 Flags ER: Mi and/or Su is not BCD. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) CY : ON when the result is negative, i.e., when Mi is less than Su plus CY . EQ : ON when the result is 0. Caution Be sure to clear the carry flag with CLC(41) before executing SUB(31[...]

233 Note Th e actual SUB(31) operation involves subtracting Su and CY from 10,000 plus Mi. For positive results the leftmost digit is truncated. For negative results the 10s complement is obtained. The procedure for establishing the correct answer is given below . First Subtraction IR 010 1029 DM 0100 – 3452 CY – 0 HR 20 7577 (1029 + (10000 –[...]

234 Flags ER: Mi, M+1,Su, and Su+1 are not BCD. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) CY : ON when the result is negative, i.e., when Mi is less than Su. EQ : ON when the result is 0. The following example works much like that for single-word subtraction. In thi[...]

235 5-19-9 BCD MUL TIPL Y – MUL(32) Md : Multiplicand (BCD) IR, SR, AR, DM, HR, TC, LR, # Mr : Multiplier (BCD) IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR LR MUL(32) Md Mr R @MUL(32) Md Mr R Limitations R and R+1 must be in the same data area. Description When the execution condition i[...]

236 5-19-10 DOUBLE BCD MUL TIPL Y – MULL(56) Md : First multiplicand word (BCD) IR, SR, AR, DM, HR, TC, LR Mr : First multiplier word (BCD) IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR LR MULL(56) Md Mr R @MULL(56) Md Mr R Limitations Md and Md+1 must be in the same data area, as must Mr an[...]

237 Flags ER: Dd or Dr is not in BCD or when Dr is #0000. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ: ON when the result is 0. Example When I R 00000 is ON with the following program, the content of IR 020 is divided by the content of HR 09 and the result is place[...]

238 5-19-13 FLOA TING POINT DIVIDE – FDIV(79) Dd : First dividend word (BCD) IR, SR, AR, DM, HR, TC, LR Dr : First divisor word (BCD) IR, SR, AR, DM, HR, TC, LR Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR, LR FDIV(79) Dd Dr R @FDIV(79) Dd Dr R Limitations Dr and Dr+1 cannot contain zero. Dr and Dr+1 must be in the s[...]

239 Example The following example shows how to divide two whole four-digit numbers (i.e., numbers without fractions) so that a floating-point value can be obtained. First the original numbers must be placed in floating-point form. Because the numbers are originally without decimal points, the exponent will be 4 (e.g., 3452 would equal 0.3452 x 10 4[...]

240 DM 0000 3 452 @MOV(21) #0000 HR 00 00000 @MOV(21) #0000 HR 02 @MOV(21) #4000 HR 01 @MOV(21) #4000 HR 03 @MOVD(83) DM 0000 #0021 HR 01 @MOVD(83) DM 0000 #0300 HR 00 @MOVD(83) DM 0001 #0021 HR 03 @MOVD(83) DM 0001 #0300 HR 02 @FDIV(79) HR 00 HR 02 DM 0002 HR 01 HR 00 0000 0000 HR 01 HR 00 4 0000000 4000 HR 01 HR 00 4 3450000 DM 0000 3 452 HR 01 H[...]

241 5-19-14 SQUARE ROOT – ROOT(72) Sq : First source word (BCD) IR, SR, AR, DM, HR, TC, LR R : Result word IR, SR, AR, DM, HR, LR, Ladder Symbols Operand Data Areas ROOT(72) Sq R @ROOT(72) Sq R Limitations Sq and Sq+1 must be in the same data area. Description When the execution condition is OFF , ROOT(72) is not executed. When the execution cond[...]

242 In this example, √ 6017 = 77.56, and 77.56 is rounded off to 78. 010 6 017 00000 @MOV(21) 010 DM 0101 @ROOT(72) DM 0100 DM 0102 @MOV(21) #0000 01 1 @MOVD(83) DM 0102 #0012 01 1 @MOVD(83) DM 0102 #0210 DM 0103 @CMP(20) DM 0103 #4900 @INC(38) 01 1 DM 0101 DM 0100 0 0000000 0000 DM 0101 DM 0100 6 0170000 DM 0102 7 756 IR 01 1 DM 0103 0 0775600 @[...]

243 5-20 Binary Calculations Binary calculation instructions — ADB(50), SBB(51), MLB(52), DVB(53), ADBL( –– ), SBBL( –– ), MBS( –– ), MBSL( –– ), DBS( –– ), and DBSL( –– ) — perform arithmetic operations on hexadecimal data. Four of these instructions (ADB(50), SBB(51), ADBL( –– ), and SBBL( –– )) can ac t on bot[...]

244 The following example shows a four-digit addition with CY used to place either #0000 or #0001 into R+1 to ensure that any carry is preserved. CLC(41) 00000 ADB(50) 010 DM 0100 HR 10 MOV(21) #0000 HR 1 1 MOV(21) #0001 HR 1 1 TR 0 25504 25504 = R = R+1 = R+1 Address Instruction Operands 00000 LD 00000 00001 OUT TR 0 00002 CLC(41) 00003 ADB(50) 01[...]

245 In the case below , 25,321 +( – 13,253) = 12,068 (62E9 + CC3B = 2F24). Neither OF nor UF are turned ON. Au: LR 20 62E 9 Ad: DM 0010 CC3 B + Ad: DM 0010 2F 24 Note Th e status of the CY flag can be ignored when adding signed binary data since it is relevant only in the addition of normal hexadecimal values. 5-20-2 BINAR Y SUBTRACT – SBB(51) [...]

246 Example 1: Normal Data The following example shows a four-digit subtraction with CY used to place ei- ther #0000 or #0001 into R+1 to ensure that any carry is preserved. CLC(41) 00001 SBB(51) 001 LR20 HR 21 MOV(21) #0000 HR 22 MOV(21) #0001 HR 22 TR 1 25504 25504 = R = R+1 = R+1 Address Instruction Operands 00000 LD 00001 00001 OUT TR 1 00002 C[...]

247 In the following example, SBB(51) is used to subtract one 16-bit signed binary value from another . (The 2 ’ s complement is used to express negative values). Th e ef fective range for 16-bit signed binary values is – 32,768 (8000) to +32,767 (7FFF). The overflow flag (OF: SR 25404) is turned ON if the result exceeds +32,767 (7FFF) and the [...]

248 5-20-3 BINAR Y MUL TIPL Y – MLB(52) Md : Multiplicand word (binary) IR, SR, AR, DM, HR, TC, LR, # Mr : Multiplier word (binary) IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : First result word IR, SR, AR, DM, HR LR MLB(52) Md Mr R @MLB(52) Md Mr R Limitations R and R+1 must be in the same data area. Description When the e[...]

249 Precautions DVB(53) cannot be used to divide signed binary data. Use DBS( –– ) instead. Re- fer to 5-20-9 SIGNED BINAR Y DIVIDE – DBS( –– ) for details. Flags ER: Dr contains 0. Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ : ON when the result is 0. N [...]

250 ADBL( –– ) can also be used to add signed binary data. The overflow and under- flow flags (SR 25404 and SR 25405) indicate whether the result has exceeded th e lower or upper limits of the 32-bit signed binary data range. Refer to page 27 for details on signed binary data. Flags ER: Indirectly addressed DM word is non-existent. (Content of [...]

251 In the case below , 1,799,100,099 + ( – 282,751,929) = 1,516,348,100 (6B3C167D + EF258C47 = 5A61A2C4). Neither OF nor UF are turned ON. Au + 1 : LR 21 Au : LR 20 Ad + 1 : DM 001 1 Ad : DM 0010 6 B3 C 167 D EF 2 5 8C 4 7 0 + R + 1 : DM 0021 R : DM 0020 A2C4 5A6 1 0 CY (Cleared with CLC(41)) UF (SR 25405) 0 OF (SR 25404) Note Th e status of the[...]

252 Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) CY : ON when the result is negative, i.e., when Mi is less than Su plus CY . EQ : ON when the result is 0. OF : ON when the result exceeds +2,147,483,647 (7FFF FFFF). UF : ON when the result is below – 2,147,[...]

253 In the case below , 1,799,100,099 – ( – 282,751,929) = 2,081,851,958 (6B3C 167D – {EF25 8C47 – 1 0000 0000} = 7C16 8A36). Neither OF nor UF are turned ON. Au + 1 : 001 Au : 000 Ad + 1 : DM 0021 Ad : DM 0020 6 B3 C 167 D EF 2 5 8C 4 7 0 – R + 1 : LR 22 R : LR 21 8A 36 7C1 6 0 CY (Cleared with CLC(41)) UF (SR 25405) 0 OF (SR 25404) – [...]

254 Example In the following example, MBS( –– ) is used to multiply the signed binary contents of IR 001 with the signed binary contents of DM 0020 and output the result to LR 21 and LR 22. MBS( –– ) 001 DM 0020 LR 21 Address Instruction Operands 00000 LD 00000 00001 MBS( –– ) 001 DM 0020 LR 21 00000 Md: 001 15B 1 Mr: DM 0020 FC 1 3 R: [...]

255 Example In the following example, MBSL( –– ) is used to multiply the signed binary con- tents of IR 101 and IR 100 with the signed binary contents of DM 0021 and DM 0020 and output the result to LR 24 through LR 21. MBSL( –– ) 100 DM 0020 LR 21 Address Instruction Operands 00000 LD 00000 00001 MBSL( –– ) 100 DM 0020 LR 21 00000 Md: [...]

256 Example In the following example, DBS( –– ) is used to divide the signed binary contents of IR 001 with the signed binary contents of DM 0020 and output the result to LR 21 and LR 22. DBS( –– ) 001 DM 0020 LR 21 Address Instruction Operands 00000 LD 00000 00001 DBS( –– ) 001 DM 0020 LR 21 00000 Dd: IR 001 DDDA Dr: DM 0020 001A R: LR[...]

257 Example In the following example, DBSL( –– ) is used to divide the signed binary contents of IR 002 and IR 001 with the signed binary contents of DM 0021 and DM 0020 and output the result to LR 24 through LR 21. DBSL( –– ) 001 DM 0020 LR 21 Address Instruction Operands 00000 LD 00000 00001 DBSL( –– ) 001 DM 0020 LR 21 00000 Dd: IR 0[...]

! 258 If bit 15 of C is ON and more than one address contains the same maximum val- ue, the position of the lowest of the addresses will be output to D+1. Th e number of words within the range (N) is contained in the 3 rightmost digits of C, which must be BCD between 001 and 999. When bit 15 of C is OFF , data within the range is treated as normal [...]

! 259 2. For an address in another data area, the number of addresses from the be- ginning of the search is written to D+1. For example, if the address contain- ing the minimum value is IR 1 14 and the first word in the search range is IR 014, then #0100 is written in D+1. If bit 14 of C is ON and more than one address contains the same minimum val[...]

260 For the first N – 1 cycles when the execution condition is ON, A VG ( –– ) writes the value of S t o D . E a c h t i m e t h a t A VG( –– ) is executed, the previous value of S is stored in words D+2 to D+N+1. The first 2 digits of D+1 are incremented with each execution and act as a pointer to indicate where the previous value is sto[...]

261 Example In the following example, the content of IR 040 is set to #0000 and then increm- ented by 1 each cycle. For the first two cycles, A VG( –– ) moves the content of IR 040 to DM 1002 and DM 1003. The contents of DM 1001 will also change (which can be used to confirm that the results of A VG ( –– ) has changed). On the third and lat[...]

262 Description When the execution condition is OFF , SUM( –– ) is not executed. When the execution condition is ON, SUM( –– ) adds either the contents of words R 1 to R 1 +N – 1 or the bytes in words R 1 to R 1 +N/2 – 1 and outputs that value to the des- tination words (D and D+1). The data can be summed as binary or BCD and will be ou[...]

263 Example In the following example, the BCD contents of the 10 words from DM 0000 to DM 0009 are added when IR 00001 is ON and the result is written to DM 0100 and DM 0101. @SUM( –– ) DM 0000 #4010 00001 DM 0100 Address Instruction Operands 00000 LD 00001 00001 @SUM( –– ) # 4010 DM 0000 DM 0100 DM 0100 2678 DM 0101 0005 DM 0000 3F2A DM 00[...]

264 Examples Sine Function T he following example demonstrates the use of the APR(69) sine function to cal- culate the sine of 30 ° . The sine function is specified when C is #0000. Input data, x Result data S: DM 0000 D: DM 0100 01 0 1 10 0 10 – 1 10 – 1 10 – 2 10 – 3 10 – 4 0300 5000 APR(69) #0000 DM 0000 DM 0100 00000 Enter input data[...]

Y 0 X 0 X 1 X 2 X 3 X 4 X m X Y Y m Y 4 Y 3 Y 1 Y 2 265 Enter t h e c o o r d i n a t e s o f t h e m + 1 e n d - p o i n t s , which define the m line segments, as shown in the following table. Enter all coordinates in BIN form. Always enter th e coordinates from the lowest X value (X 1 ) to the highest (X m ). X 0 is 0000, and does not have to be[...]

266 In this case, the input data word, IR 010, contains #0014, and f(0014) = #0726 is output to R, IR 01 1. X Y $1F20 $0F00 $0726 $0402 (0,0) $0005 $0014 $001A $05F0 (x,y) 5-21-6 PID CONTROL – PID( –– ) S : Input word IR, SR, AR, DM, HR, LR C : First parameter word IR, SR, DM, HR, LR Operand Data Areas D : Output word IR, SR, AR, DM, HR, LR L[...]

267 Note 1. Th e actual integral and derivative times are calculated using the values set in C+2 and C+3 and the time unit set in C+6. 2. Setting the 2-PID parameter ( α ) to 000 yields 0.65, the normal value. 3. The only CQM1 model that can use PID( –– ) is the CQM1-CPU4  -EV1. Performance Specifications Item Specifications PID calculation[...]

268 Parameter Settings Item Contents Setting range Set value (SV) This is the target value of the process being controlled. Binary data (of the same number of bits as specified for the input range) Proportional band This is the parameter for P control expressing the proportional control range/total control range. 0001 to 9999 (4 digits BCD); (0.1% [...]

269 Execution Condition ON The PID operation is executed at the intervals based on the sampling period, according to the PID parameters that have been set. Sampling Period and PID Execution Timing The sampling period is the time interval to retrieve the measurement data for carrying out a PID operation. PID( –– ), however , is executed accordin[...]

270 cording t o the time that has passed. The strength of the integral operation is indi- cated by the integral time, which is the time required for the integral operation amount to reach the same level as the proportional operation amount with re- spect to the step deviation, as shown in the following illustration. The shorter the integral time, t[...]

271 PID Operation PID operation combines proportional operation (P), integral operation (I), and derivative operation (D). It produces superior control results even for control ob- jects with dead time. It employs proportional operation to provide smooth control without hunting, integral operation to automatically correct any offset, and deriv- ati[...]

272 • When i t i s not a problem if a certain amount of time is required for stabilization (settlement time), but it is important not to cause overshooting, then enlarge the proportional band. SV Control by measured PID When P is enlarged • When overshooting is not a problem but it is desirable to quickly stabilize con- trol, then narrow the pr[...]

273 Example This example shows a PID control program using PID( –– ). Amplifier (See note below .) Fan (Output word IR 1 1 1) Heater (Output word IR1 10) T emperature sensing element (Output word IR 100) Amplifier (See note below .) #0 #1 AD001 DA001 CPU Unit Note Motors and heaters cannot be directly connected from a Analog Output Unit. An amp[...]

274 Program T arget value Parameter leading word for first PID( –– ) instruction Parameter leading word for second PID( –– ) instruction PV of temperature sensing element Heater operation amount Fan operation amount PV of temperature sensing element (binary) Leading word of converted parameter Present temperature of temperature sensing elem[...]

275 Note When using PID( –– ) or SCL( –– ), make the data settings in advance with a Pe- ripheral Device such as the Programming Console or SSS. T arget value HR Proportional band Integral time/sampling period Derivative time/sampling period Sampling period Forward/reverse designation/ PID parameters I/O range and time unit settings Heater [...]

276 Flags ER: Indirectly addressed DM word is non-existent. (Content of  DM word is not BCD, or the DM area boundary has been exceeded.) EQ : ON when the result is 0. N : ON when bit 15 of Wd is set to 1. 5-22-2 LOGICAL AND – ANDW(34) I1 : Input 1 IR, SR, AR, DM, HR, TC, LR, # I2 : Input 2 IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand D[...]

277 5-22-3 LOGICAL OR – ORW(35) I1 : Input 1 IR, SR, AR, DM, HR, TC, LR, # I2 : Input 2 IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : Result word IR, SR, AR, DM, HR, LR ORW(35) I1 I2 R @ORW(35) I1 I2 R Description When the execution condition is OFF , ORW(35) is not executed. When the execution condition is ON, ORW(35) logic[...]

278 5-22-4 EXCLUSIVE OR – XORW(36) I1 : Input 1 IR, SR, AR, DM, HR, TC, LR, # I2 : Input 2 IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : Result word IR, SR, AR, DM, HR, LR XORW(36) I1 I2 R @XORW(36) I1 I2 R Description When the execution condition is OFF , XORW(36) is not executed. When the execution condition is ON, XORW(36[...]

279 5-22-5 EXCLUSIVE NOR – XNRW(37) I1 : Input 1 IR, SR, AR, DM, HR, TC, LR, # I2 : Input 2 IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas R : Result word IR, SR, AR, DM, HR, LR XNRW(37) I1 I2 R @XNRW(37) I1 I2 R Description When the execution condition is OFF , XNRW(37) is not executed. When the execution condition is ON, XNR W([...]

280 INT(89) is used to control the interrupt signals received from the Interrupt Input Unit, and also to control the scheduling of the scheduled interrupt. INT(89) pro- vides such functions as masking of interrupts (so that they are recorded but ig- nored) and clearing of interrupts. Refer to 5-23-2 Interrupts for more details on interrupts. MCRO(9[...]

281 started. The program must be designed to allow for this when required by the application. (See the section on data concurrence for further details.) Input Interrupts Input interrupts are executed when external inputs are received via an Interrupt Input Unit. Up to two Interrupt Input Units can be mounted to the CPU Rack and each Interrupt Input[...]

282 Note Disabling special I/O refreshing in the normal cycle to refresh special I/O in an interrupt subroutine is necessary only in the high-speed mode. Disabling normal cycle refreshing of special I/O during normal interrupt mode will be ignored and th e special I/O will be refreshed both in the normal cycle and in the interrupt sub- routine. The[...]

283 • Use the I/O REFRESH instruction in interrupt subroutines to refresh required I/ O from Special I/O Units and mask interrupts in the main program while read- ing/writing Special I/O Unit words. 5-23-3 SUBROUTINE ENTER – SBS(91) N : Subroutine number 000 to 255 Ladder Symbol Definer Data Areas SBS(91) N Limitations Subroutine numbers 000 th[...]

! 284 The following diagram illustrates program execution flow for various execution conditions for two SBS(91). SBS(91) 000 SBS(91) 001 SBN(92) 000 RET(93) SBN(92) 001 RET(93) END(001) Main program Subroutines A B C D E A A A A B B B B C C C C D D E E OFF execution conditions for subroutines 000 and 001 ON execution condition for subroutine 000 on[...]

285 Al l subroutines must be programmed at the end of the main program. When one or more subroutines have been programmed, the main program will be executed up to the first SBN(92) before returning to address 00000 for the next cycle. Subroutines will not be executed unless called by SBS(91). END(01) must be placed at the end of the last subroutine[...]

286 In the following example, the contents of DM 0010 through DM 0013 are copied to SR 290 through SR 293, the contents of DM 0020 through DM 0023 are co- pied to SR 294 through SR 297, and subroutine 010 is called and executed. When the subroutine is completed, the contents of SR 294 through SR 297 are copied back to DM 0020 to DM 0023. MCRO(99) 0[...]

287 Example The following examples shows the use of four MCRO(99) instructions that ac- cess the same subroutine. The program section on the left shows the same pro- gram without the use of MCRO(99). 10000 00000 10001 10000 10001 00001 00002 10500 00200 10501 10500 10501 00201 00202 12000 00500 12001 12000 12001 00501 00502 15000 01000 15001 15000 [...]

288 Description INT(89) is used to control interrupts and performs one of 1 1 functions depending on the values of C and N. As shown in the following tables, six of the functions act on input interrupts, three act on the scheduled interrupt, and the other two mask or unmask all interrupts. Interrupt C INT(89) Function Comments Input interrupts from[...]

289 This function is used to write the current setting for the scheduled interrupt inter- val to word D. This function is used to mask or unmask all interrupt processing. Masked inputs are recorded, but ignored. The masked inputs will be serviced as soon as they are unmasked. This function masks or unmask all interrupts at the same time and is inde[...]

290 Th e scheduled interrupt is disabled at the start of operation (the scheduled inter- rupt interval is 0), so the time to the first interrupt and scheduled interrupt interval must b e set using INT(89) with N=004 and C=001/000. In the following diagram, the subroutine would be executed every 20 ms if the scheduled interrupt time unit is set to 1[...]

291 5-24 Step Instructions Th e step instructions STEP(08) and SNXT(09) are used in conjunction to set up breakpoints between sections in a large program so that the sections can be executed as units and reset upon completion. A section of program will usually be defined to correspond to an actual process in the application. (Refer to the applicati[...]

292 Execution o f a step is completed either by execution of the next SNXT(09) or by turning OFF the control bit for the step (see example 3 below). When the step is completed, all of the IR and HR bits in the step are turned OFF . All timers in the step except TTIM( –– ) are reset to their SVs. TTIM( –– ), counters, shift registers, bits s[...]

293 Flags 25407: Step Start Flag; turns ON for one cycle when STEP(08) is executed and can be used to reset counters in steps as shown below if necessary . SNXT(09) 01000 CP R CNT 01 #0003 00000 00100 25407 STEP(08) 01000 1 cycle 25407 01000 Start Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 SNXT(09) 01000 00002 ST[...]

294 The following diagram demonstrates the flow of processing and the switches that are used for execution control. Process A Process B Process C Loading Part Installation Inspection/discharge SW1 SW2 SW3 SW4 Step Instructions Section 5-24[...]

295 The program for this process, shown below , utilizes the most basic type of step programming: each step is completed by a unique SNXT(09) that starts the next step. Each step starts when the switch that indicates the previous step has been completed turns ON. SNXT(09) 12800 00001 (SW1) STEP(08) 12800 SNXT(09) 12801 STEP(08) 12801 SNXT(09) 12802[...]

296 The following process requires that a product is processed in one of two ways, depending on its weight, before it is printed. The printing process is the same regardless of which of the first processes is used. V arious sensors are posi- tioned to signal when processes are to start and end. SW A1 SW A2 SW B1 SW B2 Process C Weight scale Process[...]

297 The program for this process, shown below , starts with two SNXT(09) instruc- tions that start processes A and B. Because of the way 00001 (SW A1) and 00002 (SB B1) are programmed, only one of these will be executed to start either process A or process B. Both of the steps for these processes end with a SNXT(09) that starts the step for process[...]

298 The following process requires that two parts of a product pass simultaneously through two processes each before they are joined together in a fifth process. V arious sensors are positioned to signal when processes are to start and end. Process C SW1 SW2 Process A SW3 SW4 Process D Process B Process E SW6 SW5 SW7 The following diagram demonstra[...]

299 STEP(08) LR 0000 SNXT(09) LR 0001 STEP(08) LR 0001 STEP(08) LR 0004 SNXT(09) LR 0005 STEP(08) Process A Process B Process C 00002 (SW3) 00005 (SW7) Process A started. Process A reset. Process B started. Process E reset. 00001 (SW1 and SW2)) SNXT(09) LR 0000 SNXT(09) LR 0002 Process C started. LR 0003 SNXT(09) LR 0004 00004 (SW5 and SW6) LR 0003[...]

300 00000 LD 00001 00001 SNXT(09) LR 0000 00002 SNXT(09) LR 0002 00003 STEP(08) LR 0000 Process A 00100 LD 00002 00101 SNXT(09) LR 0001 00102 STEP(08) LR 0001 Process B 00200 LD LR 0003 00201 OUT LR 0003 00202 AND 00004 00203 SNXT(09) LR 0004 00204 STEP(08) LR 0002 Process C 00300 LD 00003 00301 SNXT(09) LR 0003 00302 STEP(08) LR 0003 Process D 004[...]

301 F AL(06) produces a non-fatal error and F AL(07) produces a fatal error . When F AL(06) is executed with an ON execution condition, the ALARM/ERROR indi- cator o n the front of the CPU Unit will flash, but PC operation will continue. When F ALS(07) is executed with an ON execution condition, the ALARM/ERROR indi- cator will light and PC operati[...]

302 5-25-3 TRACE MEMOR Y SAMPLING – TRSM(45) Data tracing can be used to facilitate debugging programs. T o set up and use data tracing it is necessary to have a host computer running SSS; no data tracing is possible from a Programming Console. Data tracing is described in detail in the SSS Operation Manual . This section shows the ladder symbol [...]

303 The sampled data is written to trace memory , jumping to the beginning of the memory area once the end has been reached and continuing up to the start marker . This might mean that previously recorded data (i.e., data from this sam- ple that falls before the start marker) is overwritten (this is especially true if the delay i s positive). The n[...]

MSG ABCDEFGHIJKLMNOP 304 In handling indirectly addressed messages (i.e. DM), those with the lowest DM address values have higher priority . Clearing Messages T o clear a message, execute F AL(06) 00 or clear it via a Programming Console using the procedure in 4-6-5 Clearing Error Messages . If the message data changes while the message is being di[...]

305 Description LMSG(47) is used to output a 32-character message to a Programming Con- sole. The message to be output must be in ASCII beginning in word S and end- in g in S+15, unless a shorter message is desired. A shorter message can be pro- duced b y placing a null character (0D) into the string; no characters from the null character on will b[...]

306 Example In the following example, TERM(48) is used to switch the Programming Console to TERMINAL mode when 00000 is ON. Be sure that pin 6 of the CPU Unit ’ s DIP switch is OFF . TERM(48) 000 000 000 00000 Address Instruction Operands 00000 LD 00000 00001 TERM(48) 000 000 000 5-25-7 W A TCHDOG TIMER REFRESH – WDT(94) T : W atchdog timer val[...]

307 It cannot be used for other I/O words, such as I/O Units on Slave Racks or Group-2 High-density I/O Units. St must be less than or equal to E. Description T o refresh I/O words allocated to CPU or Expansion I/O Racks (IR 000 to IR 029 or IR 300 to IR 309), simply specify the first (St) and last (E) I/O words to be re- freshed. When the executio[...]

308 Refer to 6-1 Cycle Time for a table showing I/O refresh times for Group-2 High-density I/O Units. Flags ER : St or E is not BCD between #0000 and #000F . St is greater than E. 5-25-10 BIT COUNTER – BCNT(67) N : Number of words (BCD) IR, SR, AR, DM, HR, TC, LR, # SB : Source beginning word IR, SR, AR, DM, HR, TC, LR Operand Data Areas D : Dest[...]

309 The function of bits in C are shown in the following diagram and explained in more detail below . 15 14 13 12 1 1 00 Number of items in range (N, BCD) 001 to 999 words or bytes First byte (when bit 13 is ON) 1 (ON): Rightmost 0 (OFF): Leftmost Calculation units 1 (ON): Bytes 0 (OFF): Words C: Not used. Set to zero. Number of Items in Range T h [...]

310 Example When IR 00000 is ON in the following example, the frame checksum (0008) is calculated for the 8 words from DM 0000 to DM 0007 and the ASCII equivalent (30 30 30 38) is written to DM 001 1 and DM 0010. @FCS( –– ) DM 0000 #0008 00000 DM 0010 Address Instruction Operands 00000 LD 00000 00001 @FCS( –– ) # 0008 DM 0000 DM 0010 DM 000[...]

31 1 When the execution condition is OFF , FPD( –– ) is not executed. When the execution condition is ON, FPD( –– ) monitors the time until the logic diagnostics condition goes ON, turning ON the diagnostic output. If this time exceeds T , the following will occur: 1, 2, 3... 1. A n F AL(06) error is generated with the F AL number specified[...]

312 D+1 contains the bit address code of the input condition, as shown below . The word addresses, bit numbers, and TC numbers are in binary . Data D+1 bit status area 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 IR, SR 1 0 0 0 Word address Bit number (see note c) 1 0 1 0 Word address Bit number HR 1 0 0 1 1 Word address Bit number LR 1 0 0 1 0 [...]

313 Example In the following example, the FPD( –– ) is set to display the bit address and mes- sage ( “ ABC ” ) when a monitoring time of 123.4 s is exceeded. MOV(21) HR 15 #4142 SR 25315 Address Instruction Operands 00000 LD 25315 00001 MOV(21) # 4142 HR 15 00002 LD 25315 00003 MOV(21) # 430D HR 16 00004 LD LR 0000 00005 FPD( –– ) # 80[...]

314 5-25-13 DA T A SEARCH – SRCH( –– ) R 1 : First word in range IR, SR, AR, DM, HR, TC, LR N : Number of words IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas @SRCH( –– ) N R 1 C C : Comparison data, result word IR, SR, AR, DM, HR, LR SRCH( –– ) N R 1 C Limitations N must be BCD between 0001 to 6656. R 1 and R 1 +N ?[...]

315 Example In the following example, the 10 word range from DM 0010 to DM 0019 is searched for addresses that contain the same data as DM 0000 (#FFFF). Since DM 0012 contains the same data, the EQ Flag (SR 25506) is turned ON and #0012 is written to DM 0001. @SRCH( –– ) DM 0010 #0010 00001 DM 0000 Address Instruction Operands 00000 LD 00001 00[...]

316 Example In the following example, the 100 word range from DM 7000 through DM 7099 is copied to DM 0010 through DM 0109 when IR 00001 is ON. @XDMR( –– ) #7000 #0100 00001 DM 0010 Address Instruction Operands 00000 LD 00001 00001 @XDMR( –– ) # 0100 # 7000 DM 0010 DM 7000 DM 9999 DM 7000 to DM 7099 DM 0000 DM 6143 DM 0010 to DM 0109 5-25-1[...]

317 Note Input 000 for the second and third operands when using replacement instruc- tions. Flags ER: C is not one of the allowed values. Example In the following example, IEMS( –– ) changes the destination for  DM to EM bank 1 and uses indirect addressing to move #1234 into EM 0001 in EM bank 1. MOV #1234  D0000 IEMS3 #EOBI 00000 1234 00[...]

318 5-26 Network Instructions The network instructions are used for communicating with other PCs, BASIC Units, or host computers linked through the SYSMAC NET Link System, SYS- MAC LINK System, Ethernet System, or Controller Link System. 5-26-1 NETWORK SEND – SEND(90) S : Source beginning word IR, SR, AR, DM, HR, TC, LR D : Destination beginning [...]

319 SYSMAC NET Link Systems T he destination port number is always set to 0. Set the destination node number to 0 to send the data to all nodes. Set the network number to 0 to send data to a node on the same Subsystem (i.e., network). Refer to the SYSMAC NET Link System Manual for details. Word Bits 00 to 07 Bits 08 to 15 C Number o f w ords (0 to [...]

320 SEND(90) transmits “ n ” words beginning with S (the beginning source word for data transmission at the source node) to the “ n ” words beginning with D (the be- ginning destination word for data reception at destination node N). Destination node N “ n ” number of send words n S 15 0 n D 15 0 Source node L C + 2 @SEND(90) S D C C ?[...]

321 Indirect Destination Beginning Word Designations D is used to specify the destination beginning word as follows when indirect specification is designated: 12 to 15 08 to 1 1 04 to 07 00 to 03 D Area type 0 Word no. (5th digit) D+1 Word no. (4th digit) Word no. (3rd digit) Word no. (2nd digit) Word no. (1st digit) Indirect designations depend on[...]

322 C-series PCs Designation Area Area code Word number IR area 00 0 to 51 1 LR area 06 0 to 63 HR area 07 0 to 99 SR area 08 0 to 27 T imer area (PV) 03 0 to 51 1 DM area 05 0 to 6655 CV -series PCs have a larger area than C200HX/HG/HE PCs, so the beginning words for sending and receiving at destination nodes cannot always be directly specified by[...]

323 Examples This example is for a SYSMAC NET Link System. When 00000 is ON, the follow- in g program transfers the content of IR 001 through IR 005 to LR 20 through LR 24 on node 10. 0005 0000 000 A IR 001 IR 002 IR 003 IR 004 IR 005 LR 20 LR 21 LR 22 LR 23 LR 24 DM 0010 DM 001 1 DM 0012 15 0 SEND(90) 001 LR 20 DM 0010 00000 Node 10 Address Instru[...]

324 Control Data Ethernet Systems Refer to the PC Card Unit Operation Manual for details. Word Bits 00 to 07 Bits 08 to 15 C Number of words (0 to 1000 in 4-digit hexadecimal, i.e., 0000 hex to 03E8 hex) C+1 Response time limit (0.1 and 25.4 seconds in 0.1 s increments in 2-digit hexadecimal without decimal point, i.e., 01 hex to FF hex ) Default i[...]

325 RECV(98) receives “ m ” words beginning with S (the beginning word for data transmission a t the destination node, M) to the words from D (the beginning word for data reception at the source node) onwards. Direct/Indirect 0: Direct; 1: Indirect S: Destination node beginning send word D: Source node beginning receive word C: Source node firs[...]

326 2. With the message service, there is no guarantee that a message to a des- tination node will reach its destination. It is always possible that the mes- sage may be lost in transit due to noise or some other condition. When using the message service, it is advisable to prevent this situation from occurring by performing resend processing at th[...]

327 5-26-3 About Network Communications SEND(90) and RECV(98) are based on command/response processing. That is, the transmission is not complete until the sending node receives and ac- knowledges a response from the destination node. Note that the SEND(90)/RECV(98) Enable Flag is not turned ON until the first END(01) after the transmission is comp[...]

328 S R KEEP(1 1) 12802 DIFU(13) 12801 @MOV(21) #000A DM 0000 12800 00000 25204 12802 12801 @MOV(21) #0000 DM 0001 @MOV(21) #0003 DM 0002 XFER(70) #0010 000 DM 0010 @SEND(90) DM 0010 DM 0020 DM 0000 00200 XFER(70) #0016 000 DM 0030 00001 25204 12800 12803 @MOV(21) #0010 DM 0003 12802 @MOV(21) #0000 DM 0004 @MOV(21) #007E DM 0005 @RECV(98) HR 10 LR [...]

329 Address Instruction Operands Address Instruction Operands 00000 LD 00000 00001 AND 25204 00002 AND NOT 12802 00003 LD 12801 00004 KEEP(1 1) 12800 00005 LD 12800 00006 @MOV(21) # 000A DM 0000 00007 @MOV(21) # 0000 DM 0001 00008 @MOV(21) # 0003 DM 00002 00009 @XFER(70) # 0010 000 DM 0002 00010 @SEND(90) DM 0010 DM 0020 DM 0000 0001 1 LD 12800 000[...]

! 330 Note RXD( –– ) is required to receive data via the peripheral port or RS-232C port only . Transmission sent from a host computer to a Host Link Unit are processed auto- matically and do not need to be programmed. Caution The PC will be incapable of receiving more data once 256 bytes have been re- ceived if received data is not read using [...]

331 26406: SR 26406 will be turned ON when data has been received normally at the peripheral port and will be reset when the data is read using RXD( –– ) is executed. 265: SR 265 contains the number of bytes received at the RS-232C port and is reset to 0000 when RXD( –– ) is executed. Note Communications flags and counters can be cleared ei[...]

332 Note Data is not output when the CTS and DSR signals are monitored. Th e specified number of bytes will be read from S through S+(N/2) – 1, converted to ASCII, and transmitted through the specified port. The bytes of source data shown below will be transmitted in this order: 12345678... MSB LSB S1 2 S+1 3 4 S+2 5 6 S+3 7 8 The following diagr[...]

333 When digit 0 of C is 0, the bytes of source data shown above will be transmitted in this order: 12345678... When digit 0 of C is 1, the bytes of source data shown above will be transmitted in this order: 21436587... Note When start and end codes are specified the total data length should be 256 bytes max., including the start and end codes. Fla[...]

334 S Function Word address The contents of S through S+4 are copied to the part of the PC Setup that contains the settings for the port specified by N. Constant (#0000) The settings for the port specified by N are returned to their default val- ues. Application Example This example shows a program that transfers the contents of DM 0100 through DM [...]

335 5-27-4 PROTOCOL MACRO – PMCR( –– ) C: Control word IR, SR, AR, DM, HR, TC, LR, # S : First output word IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D: First input word IR, SR, AR, DM, HR, TC, LR PMCR( –– ) C S D @PMCR( –– ) C S D Limitations C must be BCD from #1000 to #2999. DM 6144 through DM 6655 cannot be us[...]

336 Example When I R 00000 is ON and SR 28908 (the Communications Board Port A Instruc- tion Execution Flag) is OFF , communications sequence 100 is called in the Com- munications Board and data is transferred through Communications Board port A. Send data is read from the range of words beginning at DM 0000 (the first output word) and reception da[...]

337 Do not set C to values other than 000 to 007. Overview When the execution condition is OFF , 7SEG( –– ) is not executed. When the execution condition is ON, 7SEG( –– ) reads the source data (either 4 or 8-digit), converts it to 7-segment display data, and outputs that data to the 7-segment display connected to the output indicated by O.[...]

338 play) will be turned ON when one round of data is displayed, but there is no need to connect them unless required by the application. 1 3 5 7 9 11 13 15 COM 0 2 4 6 8 10 12 14 DC OD212 D 0 D 1 D 2 D 3 V DD (+) V SS (0) LE3 LE2 LE1 LE0 D 0 D 1 D 2 D 3 V DD (+) V SS (0) LE3 LE2 LE1 LE0 Th e outputs must be connected from an Output Unit with 8 or [...]

339 Timing Th e timing of data output is shown in the following table. “ O ” is the first word hold- ing display data and “ C ” is the output word. Function Bit(s) in O Output status (Data and latch logic depends on C) (4 digits, 1 block) (4 digits, 2 blocks) Latch output 2 Latch output 3 One Round Flag Latch output 1 Latch output 0 Data ou[...]

340 Overview DSW( –– ) is used to read the value set on a digital switch connected to I/O Units. When the execution condition is OFF , DSW( –– ) is not executed. When the execution condition is ON, DSW( –– ) reads the 8-digit value set on the digital switch from IW and places the result in R. Th e 8-digit value it is placed in R and R+1[...]

341 The following example illustrates connections for an A7B Thumbwheel Switch. 1 3 5 7 9 11 13 15 COM 0 2 4 6 8 10 12 14 COM ID212 Input Unit Switch no. 8 1 3 5 7 9 11 13 15 COM 0 2 4 6 8 10 12 14 DC OD212 1 2 4 8 7 6 5 4 321 C Output Unit A7B Thumbwheel Switch Note The data read signal is not required in the example. Th e inputs must be connected[...]

342 Using the Instruction If the input word for connecting the digital switch is specified at for word A, and the output word is specified for word B, then operation will proceed as shown below when the program is executed. 00 01 02 03 04 05 Wd 0 10 0 10 1 10 2 10 3 D+1 D Four digits: 00 to 03 Eight digits: 00 to 03, 04 to 07 0 1 2 3 4 5 6 7 8 9 10[...]

343 5-28-3 HEXADECIMAL KEY INPUT – HKY( –– ) OW : Control signal output word IR, SR, AR, DM, HR, LR IW : Input word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas HKY( –– ) IW OW D D : First register word IR, SR, AR, DM, HR, LR Limitations D and D+2 must be in the same data area. Overview When the execution condition is OFF , HK[...]

344 Hardware This instruction inputs 8 digits in hexadecimal from a hexadecimal keyboard. It utilizes 5 output bits and 4 input bits. Prepare the hexadecimal keyboard, and connect the 0 to F numeric key switches, as shown below , to input points 0 through 3 and output points 0 through 3. Output point 4 will be turned ON while any key is being press[...]

345 Using the Instruction If the input word for connecting the hexadecimal keyboard is specified at word A, and the output word is specified at word B, then operation will proceed as shown below when the program is executed. 0000 123 456 7 8 0000 D+1 D 0000 D+1 000F D 91 01 1 1 2 0000 D+1 00F9 D IW 16-key 0 to 9 to D+2 00 to 09 to 15 OW 04 F 00 01 [...]

346 5-28-4 TEN KEY INPUT – TKY( –– ) D 1 : First register word IR, SR, AR, DM, HR, LR IW : Input word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas TKY( –– ) IW D 1 D 2 D 2 : Key input word IR, SR, AR, DM, HR, LR Limitations D 1 and D 1 +1 must be in the same data area. Overview When the execution condition is OFF , TKY( ––[...]

347 Using the Instruction If the input word for connecting the 10-key keypad is specified for IW , then opera- tion will proceed as shown below when the program is executed. 00000000 00000001 00000010 00000102 00001029 D 1 +1 D 1 (1) (2) (3) (4) (1) (2) (3) (4) 00 01 02 09 00 01 02 09 10 to IW to Input from 10-key Turn ON flags corre- sponding to 1[...]

348 5-28-5 MA TRIX INPUT – MTR( –– ) OW : Output word IR, SR, AR, DM, HR, LR IW : Input word IR, SR, AR, DM, HR, LR Ladder Symbols Operand Data Areas MTR( –– ) IW OW D D : First destination word IR, SR, AR, DM, HR, LR Limitations D and D+3 must be in the same data area. Overview When the execution condition is OFF , MTR( –– ) is not e[...]

349 Hardware This instruction inputs up to 64 signals from an 8 x 8 matrix using 8 input points an d 8 output points. Any 8 x 8 matrix can be used. The inputs must be connected through a D C Input Unit with 8 or more points and the outputs must be connected through a T ransistor Output Unit with 8 or more points. The basic wiring and tim- ing diagr[...]

350 Example The following examples shows programming MTR( –– ) in a scheduled subrou- tine, where IORF(97) is programmed to ensure that the I/O words used by MTR( –– ) are refreshed each time MTR( –– ) is executed. INT(89) 001 004 # 0002 INT(89) 000 004 # 0002 SBN(92) 99 MTR( –– ) S D1 D2 IORF(97) D1 D2 RET(93) END(01) Flags ER: Ind[...]

351 When the execution condition is OFF , IORD( –– ) is not executed. When the execution condition is ON, IORD( –– ) transfers data from the specified Special I/ O Unit ’ s memory to words beginning at D. The source information provides the node number of the Special I/O Unit and the number of words to be read, as shown in the following d[...]

352 When the execution condition is OFF , IOWR( –– ) is not executed. When the execution condition is ON, IOWR( –– ) transfers data from the words beginning at D to the specified Special I/O Unit ’ s memory . The destination information pro- vides the node number of the Special I/O Unit and the number of words to be written, as shown in t[...]

353 5-29-3 PCMCIA CARD MACRO – CMCR( –– ) C: First control word IR, SR, AR, DM, HR, TC, LR, # S : First command word IR, SR, AR, DM, HR, TC, LR, # Ladder Symbols Operand Data Areas D: Response word IR, SR, AR, DM, HR, TC, LR CMCR( –– ) C S D @CMCR( –– ) C S D Limitations DM 6144 through DM 6655 cannot be used for D. Description When t[...]

354 Process Number The process number (1 through 4) determines what function CMCR( –– ) will per- form. Process number Process name Function 1 Write file Writes data from the PC ’ s memory to the specified file in the Card in the PC Card Unit. 2 Read file Reads data from the specified file in the Card in the PC Card Unit to the PC ’ s memor[...]

355 The data length, offset, and command data settings depend on the process number that is specified, as shown in the following table. Process number Data length Offset Command data 1 Number of words of data (BCD: 1 to 1001) Number of elements of write data (0 to FFFF) Specify number of words for one-word comma delimiter and binary . Specify numbe[...]

356 The instruction ’ s termination code is output to SR 237 after CMCR( –– ) is executed. Also, SR 252 contains flags that indicate the instruction ’ s completion status (normal/error) and the execution status for operating levels 0 and 1. The following table shows the function of these bits. Word Bit(s) Function SR 237 00 to 07 T erminati[...]

357 DM 0000 to DM 0007 contain the control data and DM 0098 to DM 0199 contain the command data, as shown below . Word Content Function DM 0000 --- Control data DM 0001 47 3A ASCII: “ G : ” DM 0002 5C 44 ASCII: “ D ” DM 0003 4D 53 ASCII: “ M S ” DM 0004 41 56 ASCII: “ A V ” DM 0005 45 2E ASCII: “ E . ” DM 0006 44 41 ASCII: “[...]

359 SECTION 6 Pr ogram Execution Timing The timing of various operations must be considered both when writing and debugging a program. The time required to execute the program and perform other CPU Unit operations is important, as is the timing of each signal coming into and leaving the PC in order to achieve the desired control action at the right[...]

360 6-1 Cycle T ime T o aid in PC operation, the average, maximum, and minimum cycle times can be displayed on the Programming Console or any other Programming Device and the maximum cycle time and current cycle time values are held in AR 26 and AR 27. Understanding the operations that occur during the cycle and the ele- ments t h a t a f fect cycl[...]

361 Flowchart of CPU Unit Operation Services Communications Board YES NO NO Power application Clears IR area and resets all timers Checks I/O Unit connections Resets watchdog timer Checks hardware and Program Memory Check OK? Services Host Link ALARM/ERROR Sets error flags and turns ON or flashes indicator Executes user program Resets watchdog time[...]

362 The first three operations immediately after power application are performed only once each time the PC is turned on. The rest of the operations are per- formed in cyclic fashion. The cycle time is the time that is required for the CPU Unit to complete one of these cycles. This cycle includes basically 9 types of operation: Overseeing, Program [...]

363 I/O pts to refresh Time required (ms) 512 7.4 256 4.1 128 2.7 64 1.7 Unit Time required per Unit C200H-ID501/215 0.6 ms C200H-OD501/215 0.6 ms when set for 32 I/O pts. C200H-MD501/215 1.6 ms when set for dynamic I/O C200H-CT001-V1/CT002 2.0 ms C200H-CT021 0.7 ms C200H-NC1 1 1/NC1 12 2.1 ms C200HW-NC1 13 2.6 ms C200H-NC21 1 5.0 ms C200HW-NC213 2[...]

! 364 Within the PC, the watchdog timer measures the cycle time and compares it to a set value. If the cycle time exceeds the set value of the watchdog timer , a F ALS 9F error is generated and the CPU Unit stops. WDT(94) can be used to extend the set value for the watchdog timer . Even i f the cycle time does not exceed the set value of the watchd[...]

365 6-2-1 PC with I/O Units Only Here, we ’ ll compute the cycle time for a simple PC. The CPU Unit controls only I/O Units, eight on the CPU Rack and five on a 5-slot Expansion I/O Rack. The PC configuration for this would be as shown below . It is assumed that the pro- gram contains 5,000 instructions requiring an average of 0.156 µ s each to [...]

366 It is assumed that the program contains 5,000 instructions requiring an average of 0.156 µ s each to execute, and that nothing is connected to the RS-232C port and no SYSMAC NET/SYSMAC LINK Unit is mounted. Computer Slave Rack Host Link Unit Remote I/O Master Unit CPU Rack 8-point Input Units 8-point Output Units 12-point Output Units 16-point[...]

367 6-3 Instruction Execution Times The following table lists the execution times for all instructions that are available for the C200HX/HG/HE. The maximum and minimum execution times and the conditions which cause them are given where relevant. When “ word ” is referred to in the Conditions column, it implies the content of any word except for[...]

368 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions JMP(04) --- 7.65 22.35 0.313 0.469 0.938 JME(05) --- 7.95 22.65 0.313 0.469 0.938 F AL(06) F AL numbers 01 to 99 88.6 88.6 0.313 0.469 0.938 F AL number 00 86.6 86.6 0.313 0.469 0.938 F ALS(07) --- --- (se[...]

369 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions ASR(26) When shifting a word 1 1.95 26.65 0.313 0.469 0.938 When shifting  DM 22.95 37.65 ROL(27) When rotating a word 13.15 27.85 0.313 0.469 0.938 When rotating  DM 24.25 38.95 ROR(28) When rotatin[...]

370 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions MLB(52) Constant × word → word 16.95 31.65 0.313 0.469 0.938 Word × word → word 17.85 32.55  DM ×  DM →  DM 49.3 64 DVB(53) Word ÷ constant → word 17.15 31.85 0.313 0.469 0.938 Word ÷[...]

371 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions SDEC(78) When decoding a word to a word 26.95 41.65 0.313 0.469 0.938 When decoding 2 digits  DM to  DM 63.3 78 When decoding 4 digits  DM to  DM 71.7 86.4 FDIV(79) Word ÷ word → word (equal[...]

372 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions LMSG( –– ) Word for SV 17.95 32.65 0.313 0.469 0.938 Default: (47)  DM for SV 27.65 42.35 TERM( –– ) Default: (48) --- 8.55 23.25 0.313 0.469 0.938 CMPL( –– ) When comparing words to words 1[...]

373 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions TXD( –– ) When designating a word 56.1 70.8 0.313 0.469 0.938 When designating  DM 99.4 1 14.1 7SEG( –– ) Word-designated 4 digits 19 to 22 (see note 2) 0.313 0.469 0.938  DM-designated 4 dig[...]

374 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions MBS( –– ) Constant × word → word 20.85 35.55 0.313 0.469 0.938 DM × DM → DM 21.65 36.35  DM ×  DM →  DM 53.5 68.2 DBS( –– ) Constant ÷ word → word 21.55 36.25 0.313 0.469 0.938[...]

375 Instruction OFF execution time ( µ s) ON execution time ( µ s) Conditions Instruction C200HE C200HG C200HX C200HE C200HG C200HX Conditions IEMS( –– ) Constant designation (Switch to DM.) 19.25 18.15 0.313 0.469 0.938 Word designation (Switch to EM bank.) 24.95 23.85 IORD( –– ) --- --- (see note 1) (see note 2) 0.313 0.469 0.938 IOWR( [...]

376 6-4 I/O Response T ime The I/O response time is the time it takes for the PC to output a control signal after i t has received an input signal. The time it takes to respond depends on the cycle time and when the CPU Unit receives the input signal relative to the input refresh period. The minimum and maximum I/O response time calculations descri[...]

377 The PC takes longest to respond when it receives the input signal just after the I/ O refresh phase of the cycle. In this case the CPU Unit does not recognize the input signal until the end of the next cycle. The maximum response time is thus on e cycle longer than the minimum I/O response time, except that the I/O refresh time would not need t[...]

! 378 In looking at the following timing charts, it is important to remember the se- quence i n which processing occurs during the PC scan, particular that inputs will not produce programmed actions until the program has been executed. When calculating the response times involving inputs and outputs from another CPU Unit connected by an I/O Link Un[...]

379 The maximum response time occurs when the input just misses the program execution portion of the scan, meaning that processing must wait for the next transmission and then the next (i.e., the fourth) scan. T ime = Input ON delay + cycle time × 4 + output ON delay Cycle time > Remote I/O transmission times Note Us e the maximum cycle time ou[...]

380 6-4-3 Host Link Systems The following diagram illustrates the processing that takes place when an input on one PC is transferred through the Host Link System to turn ON an output on another PC. Refer to Host Link System documentation for further details. X Input on #0 Output on #31 Cycle time Input signal Output signal I/O refresh I/O refresh I[...]

381 In looking at the following timing charts, it is important to remember the se- quence processing occurs during the PC scan, particular that inputs will not pro- duce programmed-actions until the program has been execution. X PC Link Unit PC PC Link Unit PC X X Unit 0 Unit 7 Input on PC of Unit 0 LR bit Input LR XXXX Output on PC of Unit 7 LR XX[...]

382 Output ON delay: 15 ms Cycle time for PC of Unit 0: 20 ms Cycle time for PC of Unit 7: 50 ms Minimum transmission time: 2.8 ms+10 ms=12.8 ms The following diagram illustrates the data flow that will produce the maximum response time. Delays occur because signals or data is received just after they would be processed or because data is sent duri[...]

383 I/O refresh bits for Unit 0 256 I/O refresh bits for Unit 7 256 Reducing Response Time IORF(97) ca n b e u s e d i n p rogramming to shorten the I/O response time greater than i s possible by setting a high number of refresh bits. (Remember , increasing the number of refresh bits set on the back-panel LED shortens response time, but increases t[...]

384 The minimum and maximum I/O response times are shown here, using as an example the following instructions executed at the master and the slave. In this example, communications proceed from the master to the slave. Input Output (LR) Input (LR) Output The following conditions are taken as examples for calculating the I/O response times. Input ON [...]

385 3. Communications are completed just after the slave executes communica- tions servicing. I/O refresh Overseeing, communica- tions, etc. Input ON delay Master Input point Input bit CPU Unit processing Cycle time Instruction execution Instruction execution Instruction execution Instruction execution Instruction execution Slave Master to Slave Sl[...]

386 Scheduled Interrupts Hardware time clock Scheduled interrupt subroutine execution t3 Scheduled in- terrupt interval t3 t3 t3 t3 = Software interrupt response time T otal interrupt response time = t3 (software interrupt response time) Th e software interrupt response time depends on the interrupt response param- eter setting in DM 6620 of the PC[...]

387 The interrupt return time is 0.04 ms. Note 1. If there are several elements that can cause interrupts or if the interrupt peri- od is shorted than the average interrupt processing time, the interrupt sub- routine will be executed and the main program will not be executed. This will cause the cycle monitoring time to be exceeded and an F ALS 9F [...]

389 SECTION 7 Pr ogram Monitoring and Execution This section provides the procedures for monitoring and controlling the PC through a Programming Console. Refer to the SYSMAC Support Softwar e Operation Manual for SSS procedures if you are using a computer running SSS. 7-1 Monitoring Operation and Modifying Data 390 . . . . . . . . . . . . . . . . .[...]

390 7-1 Monitoring Operation and Modifying Data Th e simplest form of operation monitoring is to display the address whose oper- and bit status is to be monitored using the Program Read or one of the search operations. As long as the operation is performed in RUN or MONITOR mode, the status of any bit displayed will be indicated. This section provi[...]

391 Key Sequence Cancels monitor operation Clears leftmost address (EM area) (EM bank 0, 1, or 2.) Examples The following examples show various applications of this monitor operation. Program Read then Monitor Indicates Completion flag is ON Monitor operation is cancelled 00100 00100READ TIM 000 T000 1234 T001 o 0000 00100 TIM 001 Programming Conso[...]

392 Bit Monitor 00000 00000 LD 00001 00001 ^ ON 00000 CONT 00001 Note The status of TR bits SR flags SR 25503 to 25507 (e.g., the arithmetic flags), cleared when END(01) is executed, cannot be monitored. Word Monitor 00000 00000 CHANNEL 000 00000 CHANNEL LR 01 cL01 FFFF cL00 0000 EM Area Word Monitor 00000 00000 CHANNEL e0Ć0000 00000 CHANNEL e1Ć0[...]

393 Multiple Address Monitoring 00000 00000 TIM 000 T000 0100 00000 T000 0100 00001 T000 0100 00001 T000 OFF 0100 D000000001 T000 ^OFF 0100 D000000001 T000 10FF^ OFF 0100 T000D000000001 0100 10FF^ OFF D000000001 10FF^ OFF 00001 ^ OFF 00000 CONT 00001 00000 CHANNEL DM 0000 0000000001 S ONR OFF Indicates Force Reset in operation. Indicates Force Set [...]

394 Bi t status will remain ON or OFF only as long as the key is held down; the original status will return as soon as the key is released. If a timer is started, the comple- tion flag for it will be turned ON when SV has been reached. SHIFT and PLA Y/SET or SHIFT and REC/RESET can be pressed to maintain the status of the bit after the key is relea[...]

395 Th e following displays show what happens when TIM 000 is set with 00100 OFF (i.e., 00500 is turned ON) and what happens when TIM 000 is reset with 00100 ON (i.e., timer starts operation, turning OFF 00500, which is turned back ON when the timer has finished counting down the SV). (This example is performed in MONITOR mode.) Indicates that forc[...]

396 Example The following example shows the displays that appear when Restore Status is carried out normally . 00000 00000 00000FORCE RELE? 00000FORCE RELE END 7-2-4 Hexadecimal/BCD Data Modification When the Bit/Digit Monitor operation is being performed and a BCD or hexadeci- mal value is leftmost on the display , CHG can be input to change the v[...]

397 Example The following example shows the effects of changing the PV of a timer . This example is in MONITOR mode Timing Timing PV decrementing Timing Timing 00000 00000 TIM 000 T000 0122 PRES VAL? T000 0119 ???? PRES VAL? T000 0100 0200 T000 0199 Monitor status of timer PV that will be changed. PV changed. Timer/counter PVs can be changed even w[...]

398 7-2-5 Hex/ASCII Display Change This operation converts DM data displays from 4-digit hexadecimal data to ASCII and vice versa. Key Sequence Word currently displayed. 00000 00000 CH DM 0000 D0000 4412 D0000 "AB" D0000 4142 Press TR to change the display to ASCII code. Press TR again to return the display to hexadecimal. Monitor the des[...]

399 7-2-6 4-digit Hex/Decimal Display Change This operation converts data displays from normal or signed 4-digit hexadecimal data to decimal and vice versa. Decimal values from 0 to 65,535 are valid when inputting normal 4-digit hexade- cimal data, and decimal values from – 32,768 to +32,767 are valid when inputting signed 4-digit hexadecimal dat[...]

400 7-2-7 8-digit Hex/Decimal Display Change This operation converts data displays from normal or signed, 4 or 8-digit hexa- decimal data to decimal and vice versa. Decimal values from 0 to 4,294,967,295 are valid when inputting normal 8-digit hexadecimal data, and decimal values from – 2,147,483,648 to +2,147,483,647 are valid when inputting sig[...]

401 7-2-8 Differentiation Monitor This operation can be used to monitor the up or down dif ferentiation status of bits in the IR, SR, AR, LR, HR, and TC areas. T o monitor up or down dif ferentiation status, display the desired bit leftmost on the bit monitor display , and then press SHIFT and the Up or Down Arrow Key . A CLR entry changes the Diff[...]

402 7-2-9 3-word Monitor T o monitor three consecutive words together , specify the lowest numbered word, press MONTR, and then press EXT to display the data contents of the specified word and the two words that follow it. A CLR entry changes the Three-word Monitor operation to a single-word display . Key Sequence Single-word monitor in progress 00[...]

403 Example 3-word Monitor in progress. Stops in the middle of monitoring. Resumes previous monitoring. D0002D0001D0000 0123 4567 89AB D0002 3CH CHG?  0123 4567 89AB D0002 3CH CHG? 0001 4567 89AB D0002 3CH CHG? 0001  4567 89AB D0002 3CH CHG? 0001  2345 89AB D0002D0001D0000 0001 2345 89AB D0002D0001D0000 0123 4567 89AB Input new data. 7-2-1[...]

404 00000 00000 CHANNEL 000 c000 MONTR 0000000000001111 c001 MONTR 0000010101010100 00000 CHANNEL 001 00000 00000 CHANNEL DM 0000 D0000 FFFF D0000 MONTR 1111111111111111 D0000 FFFF 00000 CHANNEL DM 0000 0000S0100R0110SR Indicates Force Reset in effect Indicates Force Set in effect Example Programming Console Operations Section 7-2[...]

405 7-2-12 Binary Data Modification This operation assigns a new 16-digit binary value to an IR, HR, AR, DM, EM, or LR word. Th e cursor , which can be shifted to the left with the up key and to the right with the down k e y , indicates the position of the bit that can be changed. After positioning to the desired bit, a 0 or a 1 can then be entered[...]

406 IR bit 001 15 IR bit 00100 00000 00000 CHANNEL 000 00000 CHANNEL 001 c001 MONTR 0000010101010101 c001 CHG?  000010101010101 c001 CHG? 1  00010101010101 c001 CHG? 10  0010101010101 c001 CHG? 100  010101010101 c001 CHG? 100S  10101010101 c001 CHG? 100  010101010101 c001 CHG? 10  S010101010101 c001 MONTR 10RS010101010101 c001 [...]

407 Key Sequence The following examples show inputting a new constant, changing from a constant to an address, and incrementing to a new constant. 00000 00000 TIM 000 00201SRCH TIM 000 00201 TIM DATA #0123 00201 TIM DATA T000 #0123 #???? 00201 TIM DATA T000 #0123 #0124 00201 TIM DATA #0124 00201 DATA? T000 #0123 c??? 00201 DATA? T000 #0123 c010 002[...]

408 Returns to original display with new SV Current SV (during change operation) SV before the change 00000 00000 TIM 000 00201SRCH TIM 000 00201 TIM DATA #0123 00201 TIM DATA T000 #0123 #???? 00201DATA ? U/D T000 #0123 #0123 00201DATA ? T000 #0123 #0122 00201DATA ? T000 #0123 #0123 00201DATA ? T000 #0123 #0124 00201DATA ? T000 #0124 #???? 00201 TI[...]

409 7-2-14 Expansion Instruction Function Code Assignments This operation is used to read or change the function codes assigned to expan- sion instructions. There are 18 function codes that can be assigned to expansion instructions: 17, 18, 19, 47, 48, 60 to 69, and 87 to 89. More than one function code can be assigned to an expansion instruction. [...]

410 7-2-15 UM Area Allocation This operation is used to allocate part of the UM Area for use as expansion DM. It can be performed in PROGRAM mode only . Memory allocated to expansion DM is deducted from the ladder program area. The amount of memory available for the ladder program depends on the amount of RAM in the CPU Unit. About 15.2 KW of memor[...]

41 1 7-2-16 Reading and Setting the Clock This operation is used to read or set the CPU Unit ’ s clock. The clock can b e r e a d in any mode, but it can be set in MONITOR or PROGRAM mode only . Th e CPU Unit will reject entries outside of the acceptable range, i.e., 01 to 12 for th e month, 01 to 31 for the day of the month, 00 to 06 for the day[...]

412 T o enable expansion keyboard mapping, pin 6 of the CPU Unit ’ s DIP switch and AR 0709 must be ON and AR 0708 must be OFF . Bits turned ON with this operation can be turned OFF by toggling AR 0708. T u r n AR 0709 OFF to stop expansion keyboard mapping and switch the Program- ming Console from Expansion TERMINAL mode to CONSOLE mode. TERMINA[...]

413 With keyboard mapping, bits 00 to 15 of AR 22 will be turned ON when keys 0 to F are pressed on the Programming Console ’ s keyboard. A bit will remain ON after the Programming Console ’ s key is released. Al l bits in AR 22 will be turned OFF when AR 0708 is turned ON. Keyboard map- ping inputs are disabled when AR 0708 is ON. In addition [...]

414 SR word Corresponding key(s) Bit 277 03 *1 04 *2 05 06 07 08 09 10 11 12 13 14 15 278 00 01 02 03 04 05 06 07 08 09 10 Programming Console Operations Section 7-2[...]

415 SR word Corresponding key(s) Bit 278 11 12 13 14 15 279 00 01 02 03 04 05 *3 06 07 VER 08 09 Programming Console Operations Section 7-2[...]

417 SECTION 8 Serial Communications This sec tion provides an overview of the serial communications (Host Link, RS-232C, one-to-one links, NT links, and proto- col macros) that operate through the RS-232C, RS-422/485, and Peripheral Ports. 8-1 Introduction 418 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

418 8-1 Introduction The RS-232C port and peripheral port built into the C200HX/HG/HE PC ’ s CPU Unit support the following communications functions: • Communications with Programming Devices (e.g., Programming Console or SSS.) • Host Link communications with personal computers and other external de- vices. • RS-232C (no-protocol) communica[...]

419 8-2 Host Link Communications 8-2-1 Host Link Command Summary Host Link communications are used to transfer data between the PC and a host computer (a personal computer or PT). It is possible to monitor the PC ’ s operat- ing status and the contents of PC data areas from the host computer using Host Link commands. It is also possible to transf[...]

420 The connections between the C200HX/HG/HE and a personal computer are il- lustrated below as an example. 1 2 3 4 5 6 FG SD RD RS CS – – – SG 7 8 9 1 2 3 4 5 6 7 8 9 SD RD RS CS DSR SG – 9 DTR C200HX/HG/HE Personal computer Signal Pin No. Signal Pin No. Shielded cable – Applicable Connectors The following connectors are applicable. One [...]

421 Custom Port Settings Standard settings or custom settings can be used for the RS-232C and peripher- al ports. The custom settings are used when the following bits are set to 1. RS-232C port: Bits 00 through 03 of DM 6645 (0: standard; 1: custom). Peripheral port: Bits 00 through 03 of DM 6650 (0: standard; 1: custom). The custom settings for th[...]

422 Note If pin 5 of the CPU Unit ’ s DIP switch is ON, the standard communications set- tings will be used regardless of the settings in the PC Setup. The standard set- tings are as follows: Item Setting Node number 00 Start bits 1 Data length 7 Stop bits 2 Parity Even Baud rate 9,600 bps T ransmission delay time None 8-2-2 Host Link Communicati[...]

423 Response Frame Format Th e response from the PC is returned in the format shown below . Prepare a pro- gram so that the response data can be interpreted and processed. @ x 10 1 x 10 0 x 16 1 x 16 0 FCS  ↵ Node no. Header code End code T ext T erminator Th e header code and text depend on the Host Link command that was received. The end cod[...]

424 Communications Sequence Th e right to send a frame is called the “ transmission right. ” The Unit that has the transmission right is the one that can send a frame at any given time. The trans- mission right is traded back and forth between the host computer and the PC each time a frame is transmitted. An example communications sequence be- [...]

425 8-2-3 Example Programs Command T ransmission T he following type of program must be prepared in the host computer to receive the data. This program allows the computer to read and display the data re- ceived from the PC while a host link read command is being executed to read data from the PC. 10 ’C200HX/HG/HE SAMPLE PROGRAM FOR EXCEPTION 20 [...]

426 Th e default values are assumed for all of the PC Setup (i.e., the RS-232C port is used in Host Link mode, the node number is 00, and the standard communica- tions parameters are used.) @TXD DM 0000 #0000 #0010 00100 SR 26405 If SR 26405 (the T ransmit Ready Flag) is ON when IR 00100 turns ON, the ten bytes of data (DM 0000 to DM 0004) will be [...]

427 Specify whether or not a start code is to be set at the beginning of the data, and whether or not an end code is to be set at the end. Instead of setting the end code, it is possible to specify the number of bytes to be received before the re- ception operation is completed. Both the codes and the number of bytes of data to be received are set [...]

428 2. Us e the TXD( –– ) instruction to transmit the data. (Bits 08 to 1 1 are valid only when bits 12 to 15 are set to 0.) (@)TXD S C N S: Address of first word of data to be transmitted C: Control data Bits 00 to 03 0: Leftmost bytes first 1: Rightmost bytes first Bits 04 to 07 0: Normal data transmission operation 1: Status of bit 15 for th[...]

429 3. When RXD( –– ) is executed, the received data is transferred to the specified words (without the start and end codes) and the Reception Completed Flag is turned OFF . The start and end of reception are as follows: Start: Continuous reception status if the start code is not enabled. Reception starts when the start code is received if it i[...]

430 8-4 One-to-one PC Links If two PCs are linked one-to-one by connecting them together through their RS-232C ports, they can share common LR areas. When two PCs are linked one-to-one, one of them will serve as the master and the other as the slave. As shown in the diagram below , when data is written into a word the LR area of one of the linked U[...]

431 PC Setup T o use a 1:1 link, the only settings necessary are the communications mode and the link words. Set the communications mode for one of the PCs to one-to-one link master and th e other PC to one-to-one link slave, and then set the link words in the PC desig- nated as the master . Bits 08 to 1 1 are valid only for the master for link one[...]

432 8-5 NT Links A one-to-one NT link that uses NT link commands can be established by con- necting the RS-232C port of the PC to the RS-232C port of a Programmable T er - minal (PT). A one-to-N NT link that uses NT link commands can be established by connect- ing the PC and Programmable T erminal (PT) with RS-422/485 cable. One-to-one NT Links The[...]

433 Restrictions on Use I f the C200H-OV001 V oice Unit is being used, the 1:N mode cannot be used with th e RS-232 port. In that case, either use the NT Link in 1:1 mode or use the 1:N mode with the port on the communications board. Applications Refer to the documentation provided for the NT Link Interface Unit for details on actual NT link applic[...]

434 An RS-422/485 connection allows 2 or more devices to be connected (one-to-N connection) with a maximum cable length of 500 m. The RS-422/485 connection is also useful for distant one-to-one connections. (RS-232C) Port B (RS-422/485) Port A RS-232C 500 m max. 15 m RS-232C ↔ RS-422/485 Adapter NT -AL001 RS-422/485 RS-422/485 500 m max. T empera[...]

435 General Device/Computer Connections (RS/CS Flow , Cross Connection) C200HX/HG/HE Host computer Modem Connection (Straight Connection) C200HX/HG/HE Modem Note Ground the FG terminals on the PC and at the other device to 100 Ω or less. Refer to the C200HX/HG/HE Installation Manual and the documentation in- cluded with the other device for detai[...]

436 8-6-2 Communications Board Settings The following parameters must be set in advance in order to use the Protocol Macro function through a Communications Board. Communications Mode Set the communications mode to Protocol Macro mode. Port B: Set bits 12 through 15 of DM 6550 to 6. Port A: Set bits 12 through 15 of DM 6555 to 6. Standard Port Sett[...]

437 Parameter Setting Baud rate Baud rate 00 1,200 bps 01 2,400 bps 02 4,800 bps 03 9,600 bps 04 19,200 bps 8-6-3 Communications Procedure Th e Protocol Macro ’ s communications sequences must be created with the Pro- tocol Support Software and transferred to the Communications Board in ad- vance. In the PC, the PMCR( –– ) instruction is exec[...]

438 The transmission message and reception message have the following struc- ture. Header Address Length Data Error check T erminator Item Function Header Set the data that indicates the beginning of the message. Address Set the node number or other identifier that indicates the destination for the message. Length The data length (number of bytes) [...]

439 Read Word (R) Word data can be read by setting the desired attributes for the “ address ” or “ data ” in the transmission and reception messages. When the attribute is set, the address or data is read from the specified word. There are three ways to specify the word: 1, 2, 3... 1. The second operand of the PMCR( –– ) instruction (S,[...]

440 Example: R(2N+6) Specifies the sixth word following the PMCR( –– ) instruction ’ s second operand fo r the “ address ” or “ data ” and adds two words to the specification each time that the step is repeated. Common information Communications data Communications data Communications data Communications data Communications data 6 th [...]

441 Se t the wild card (  ) in the reception message so that all data will be received. In the next process, set “ End ” in both the transmission step and the reception step. In error processing, set “ Abort ” in both the transmission step and the reception step. The Protocol Macro Function Section 8-6[...]

443 SECTION 9 T roubleshooting The C200HX/HG/HE provides self-diagnostic functions to identify many types of abnormal system conditions. These func- tions minimize downtime and enable quick, smooth error correction. This section provides information on hardware and software errors that occur during PC operation. Program input errors are described i[...]

! 444 9-1 Alarm Indicators Th e ALM/ERR indicator on the front of the CPU Unit provides visual indication of an abnormality in the PC. When the indicator is ON (ERROR), a fatal error (i.e., ones that will stop PC operation) has occurred; when the indicator is flashing (ALARM), a nonfatal error has occurred. This indicator is shown in 2-1-1 CPU Unit[...]

445 9-4 Error Messages There are basically three types of errors for which messages are displayed: ini- tialization errors, non-fatal operating errors, and fatal operating errors. Most of these a r e a l s o i n d i c a t e d b y F AL number being transferred to the F AL area of the SR area. Th e type of error can be quickly determined from the ind[...]

446 Error and message Possible correction Probable cause FAL no. Interrupt subroutine error SYS FAIL FAL8B 8B An interrupt subroutine longer than 10 ms was executed during I/O refreshing of a Remote I/O Unit or during Host Link servicing. Check the contents of SR 262 and SR 263 and verify that the interrupt subroutine ’ s processing time is less [...]

447 Error and message Possible correction Probable cause FAL no. SIOU ERR Special I/O Unit error D0 Error has occurred in PC Link Unit, Remote I/O Master Unit, between a Host Link, SYSMAC LINK, or SYSMAC NET Link Unit and the CPU Unit, or in refresh between Special I/O Unit and the CPU Unit. Determine the unit number of the Unit which caused the er[...]

448 Error and message Possible correction Probable cause FA L no. T oo many Units I/O UNIT OVER E1 T wo or more Special I/O Units or Group-2 High-density I/O Units are set to the same unit number . Perform the I/O T able Read operation to check unit numbers, and eliminate duplications. The unit number of a Special I/O Unit that requires two words i[...]

449 9-5 Error Flags The following table lists the flags and other information provided in the SR and AR areas that can be used in troubleshooting. Details are provided in 3-4 SR Area and 3-5 AR Area . SR Area Address(es) Function 23600 to 23615 Node loop status for SYSMAC NET Link system 23700 to 23715 Completion/error code output area for SEND(90)[...]

450 Address(es) Function 28000 to 28015 Group-2 High-density I/O Unit Error Flags for Units 0 to F 28200 to 28215 Special I/O Unit Error Flags for Units 0 to F 28300 to 28303 Communications Board Port A Error Code 28308 to 2831 1 Communications Board Port B Error Code AR Area Address(es) Function 0000 to 0009 Special I/O or PC Link Unit Error Flags[...]

451 End code Corrective measures Probable cause Contents 16 Command not supported The operand specified in an SV Read or SV Change command does not exist in the program. Check the command and program. 18 Frame length error The maximum frame length of 132 bytes was exceeded. (If the frame exceeds 280 bytes, the Reception Overflow Flag will be turned[...]

453 SECTION 10 Host Link Commands This section describes the host link commands which can be used for host link communications via the C200HX/HG/HE ports. Refer to 8-2 Host Link Communications for information on the procedures for using host link commands and errors associated with host link commands. 10-1 Host Link Command Summary 454 . . . . . . [...]

454 10-1 Host Link Command Summary Command Chart The commands listed in the chart below can be used for host link communica- tions with the C200HX/HG/HE. Header code PC mode Name Page RUN MON PRG RR V alid V alid V alid IR/SR AREA READ 458 RL V alid V alid V alid LR AREA READ 459 RH V alid V alid V alid HR AREA READ 460 RC V alid V alid V alid PV R[...]

455 10-2 Host Link End Codes 10-2-1 End Code Summary These are the response (end) codes that are returned in the response frame. When two or more errors occur , the end code for the first error will be returned. End code Contents Probable cause Corrective measures 00 Normal completion --- --- 01 Not executable in RUN mode The command that was sent [...]

456 Errors without Responses A response won ’ t be received with some errors, regardless of the command. These errors are listed in the following table. Error PC operation Parity overrun or framing error during command reception The Communications Error Flag will be turned ON, an error code will be registered, and receptions will be reset. (The e[...]

457 10-2-2 Command/End Code T able Th e following table shows which end codes can be returned for each command. Header Possible End Codes Comments RR 00 13 14 15 18 A3 A8 --- RL 00 13 14 15 18 A3 A8 --- RH 00 13 14 15 18 A3 A8 --- RC 00 13 14 15 18 A3 A8 --- RG 00 13 14 15 18 A3 A8 --- RD 00 13 14 15 18 A3 A8 --- RJ 00 13 14 15 18 --- RE 00 13 14 1[...]

458 10-3 Host Link Commands This section explains the various Host Link commands that can be issued from the host computer to the PC. Refer to 8-2 Host Link Communications for in- formation on the procedures for using host link commands and errors associated with host link commands. 10-3-1 IR/SR AREA READ –– RR Reads the contents of the specifi[...]

459 10-3-2 LR AREA READ –– RL Reads the contents of the specified number of LR words, starting from the speci- fied word. Command Format @ RL FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 Node no. Header code Beginning word (0000 to 0063) No. of words (0001 to 0064) T erminator Response Format @ RL x 10 1 x 1[...]

460 10-3-3 HR AREA READ –– RH Reads the contents of the specified number of HR words, starting from the speci- fied word. Command Format @ RH FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 Node no. Header code Beginning word (0000 to 0099) No. of words (0001 to 0100) T erminator Response Format @ RH x 10 1 x 1[...]

461 10-3-4 PV READ –– RC Reads the contents of the specified number of timer/counter PVs (present val- ues), starting from the specified timer/counter . Command Format @ RC FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 No. of timers/counters (0001 to 0512) Beginning timer/counter (0000 to 051 1) Header code N[...]

462 10-3-5 TC ST A TUS READ –– RG Reads the status of the Completion Flags of the specified number of timers/ counters, starting from the specified timer/counter . A “ 1 ” indicates that the Completion Flag is ON. Command Format @ RG FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 Header code Node no. Begin[...]

463 10-3-6 DM AREA READ –– RD Reads th e c o n tents of the specified number of DM words, starting from the spe- cified word. Command Format @ RD FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 Node no. Header code T erminator Beginning word (0000 to 9999) No. of words (0001 to 10000) (see note) Note T o specif[...]

464 10-3-7 AR AREA READ –– RJ Reads the contents of the specified number of AR words, starting from the speci- fied word. Command Format @ RJ FCS x 10 1 x 10 0 x 10 3 x 10 2  ↵ x 10 1 x 10 0 x 10 3 x 10 2 x 10 1 x 10 0 T erminator Beginning word (0000 to 0027) Node no. Header code No. of words (0001 to 0028) Response Format @ RJ FCS x 10 1[...]

465 Response Format @ RE x 10 1 x 10 0 x 16 1 x 16 0  ↵ x 16 3 x 16 2 x 16 1 x 16 0 FCS Node no. End code Header code Read data (1 word) Read data (for number of words read) T erminator Limitations Th e text portion of the response ’ s first frame can contain up to 30 words. If more than 30 words are read, the data will be returned in multip[...]

466 Response Format @ WR x 10 1 x 10 0 x 16 1 x 16 0  ↵ FCS Node no. End code Header code T erminator Limitations Data cannot be written to words 253 to 255. If there is an attempt to write to these words, no error will result, but nothing will be written to these words. Except for the first word of the write data, the write data can be divide[...]

467 Response Format @ WL x 10 1 x 10 0 x 16 1 x 16 0  ↵ FCS Node no. End code Header code T erminator Limitations Except for the first word of the write data, the write data can be divided into multi- ple frames. PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected --- OK OK OK OK Execution Conditions Commands Respons[...]

468 Limitations Except for the first word of the write data, the write data can be divided into multi- ple frames. PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected --- OK OK OK OK Execution Conditions Commands Responses Single Multiple Single Multiple OK OK OK --- End Codes A n end code of 14 (format error) will be ret[...]

469 Execution Conditions Commands Responses Single Multiple Single Multiple OK OK OK --- End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn ’ t in the first frame. An end code of 15 (entry number data error) will be returned if the specified write data exceeds[...]

470 End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn ’ t in the first frame. An end code of 15 (entry number data error) will be returned if the digits of write data aren ’ t 0 or 1, the specified write data exceeds the data area boundary , the beginning w[...]

471 End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect or the first word of write data isn ’ t in the first frame. An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary , the beginning word isn ’ t specified in BCD, or the write[...]

472 An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary , the beginning word isn ’ t specified in BCD, or the write data isn ’ t hexadecimal. (An end code of A5 will be returned instead of 15 for non-hexadecimal write data in multiple command frames.) End code Contents 00 Norma[...]

473 An end code of 15 (entry number data error) will be returned if the specified write data exceeds the data area boundary , the beginning word isn ’ t specified in BCD, or the write data isn ’ t hexadecimal. (An end code of A5 will be returned instead of 15 for non-hexadecimal write data in multiple command frames.) End code Contents 00 Norma[...]

474 Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK --- End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect. An end code of 15 (entry number data error) will be returned if an incorrect instruction mnemonic or TC number is used. An end code of 16 (command not suppo[...]

475 The “ Operand ” parameter indicates the data area where the SV is stored or a constant. The “ SV ” parameter indicates the word address or the SV itself if it is a constant. Operand Classification Constant or OP1 OP2 OP3 OP4 word address C I O (Space) IR or SR 0000 to 051 1 L R (Space) (Space) LR 0000 to 0063 H R (Space) (Space) HR 0000[...]

476 10-3-19 SV READ 3 –– R% Reads the constant SV or the word address where the SV is stored. The SV that is read is a 4-digit decimal number (BCD) written in the second word of the TIM, TIMH(15), C N T , CNTR(12), or TTIM(87) instruction at the specified program ad- dress in the user ’ s program. Command Format x 10 3 OP4 OP3 OP2 OP1 @ R% x [...]

477 PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected OK OK OK OK --- Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK --- End Codes An end code of 04 (address over) will be returned if the program address is above the highest program address but less than 65,536 (32,768 in the C200HS). [...]

478 Response Format @ W# x 16 0 x 10 0 x 10 1 x 16 1 ↵  Node no. Header code End code T erminator FCS Limitations The command can ’ t be executed unless the SV is BCD from 0000 to 9999. The command can ’ t be executed if the UM area is write-protected. If the same instruction is used more than once in a program, the SV of the first one wil[...]

479 Use all four characters to specify the timer or counter instruction ’ s mnemonic. Ad d a space to the end of a TIM or CNT mnemonic to make it 4 characters long. Instruction name Mnemonic TC number OP1 OP2 OP3 OP4 range TIMER T I M (Space) 0000 to 051 1 HIGH-SPEED TIMER T I M H COUNTER C N T (Space) REVERSIBLE COUNTER C N T R TOT ALIZING TIMER[...]

480 End code Contents 04 Address over 13 FCS error 14 Format error 15 Entry number data error 16 Command not supported 18 Frame length error 23 User memory protected 10-3-22 SV CHANGE 3 –– W% Changes the contents of the second word of the TIM, TIMH(15), CNT , CNTR(12), or TTIM(87) at the specified program address in the user ’ s program. Comm[...]

481 Response Format @ W% x 16 0 x 10 0 x 10 1 x 16 1  ↵ Node no. Header code T erminator FCS End code Limitations The command is valid only when the UM setting is ladder only . SR 253 through SR 255 can ’ t be specified. The command can ’ t be executed if the UM area is write-protected. PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write[...]

482 “ Status data ” consists of four digits (two bytes) hexadecimal. The leftmost byte indicates CPU Unit operation mode, and the rightmost byte indicates the size of the program area. 15 14 13 12 1 1 10 9 8 00 98 00 10 1 1 x 16 3 x 16 2 This area is different from that of ST A TUS WRITE. Bit Bit 1: F ALS generated 1: Fatal error generated Oper[...]

483 10-3-24 ST A TUS WRITE –– SC Changes the PC operating mode. Command Format @ SC x 10 0 x 10 1 x 16 1 x 16 0 ↵  Node no. Header code T erminator FCS Mode data Response Format @ SC x 10 0 x 10 1 x 16 1 x 16 0  ↵ T erminator FCS Node no. Header code End code “ Mode data ” consists of two digits (one byte) hexadecimal. With the le[...]

484 10-3-25 ERROR READ –– MF Reads and clears errors in the PC. Also checks whether previous errors have been cleared. Command Format @ MF x 10 0 x 10 1 x 10 1 x 10 0  ↵ Node no. Header code T erminator FCS Error clear For the “ error clear ” parameter , specify 01 to clear errors and 00 to not clear er- rors (BCD). Fatal errors can be[...]

485 Limitations When errors are being cleared (error clear = 01), the errors are read after the error clear function is executed. PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected OK OK OK OK OK Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK --- End Codes A n end code of 14 (format err[...]

486 Response Format @ KS x 10 0 x 10 1 x 16 1 x 16 0 ↵  Node no. Header code T erminator FCS End code Limitations Bits in SR 253 through SR 255 can ’ t be specified. PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected --- OK OK OK OK Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK [...]

487 For the TC area, “ Operand ” parameter indicates the mnemonic of the timer or counter instruction and the “ Word address ” parameter indicates the TC number . Data area/ Operand Word Bit instruction OP1 OP2 OP3 OP4 address IR or SR C I O (Space) 0000 to 051 1 00 to 15 LR L R (Space) (Space) 0000 to 0063 HR H R (Space) (Space) 0000 to 00[...]

488 10-3-28 MUL TIPLE FORCED SET/RESET –– FK Force sets, force resets, or cancels the forced status of the bits in one word in the IR, SR, LR, HR, or AR, or a timer/counter Completion Flag. Command Format  @ FK x 10 0 x 10 1 x 10 3 x 10 2 x 10 1 x 10 0 OP1 OP2 OP3 OP4 ↵ 15 14 13 12 1 1 10 1 0 Node no. Header code Operand Word address Force[...]

489 Limitations Bits in SR 253 through SR 255 can ’ t be specified. Only 15 timers/counters or 15 T ransition Flags can be set/reset. The UM settings are not checked when T ransition Flags are specified, i.e., as long a s the T ransition Flag address does not exceed 1023, the command will be executed normally even if the specified Flag does not a[...]

490 PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected --- OK OK OK OK Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK --- End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect. End code Contents 00 Normal completion 13 FCS error 14 Format[...]

491 Execution Conditions Commands Responses Single Multiple Single Multiple OK --- OK --- End Codes A n end code of 14 (format error) will be returned if the length of the command is incorrect. End code Contents 00 Normal completion 13 FCS error 14 Format error 18 Frame length error 10-3-31 TEST –– TS Returns, unaltered, one block of data trans[...]

492 10-3-32 PROGRAM READ –– RP Reads the contents of the PC user ’ s program area in machine language (object code). The contents are read as a block, from the beginning to the end. Command Format @ RP x 10 0 x 10 1 ↵  Node no. Header code T erminator FCS Response Format @ RP x 10 0 x 10 1 x 16 1 x 16 0 ↵  Node no. Header code End c[...]

493 10-3-33 PROGRAM WRITE –– WP Writes t o the PC user ’ s program area the machine language (object code) pro- gram transmitted from the host computer . The contents are written as a block, from the beginning. Command Format @ WP x 10 0 x 10 1 x 16 1 x 16 0 ↵  Node no. Header code 1 byte Program (Up to maximum memory size) T erminator F[...]

494 End code Contents 14 Format error 15 Entry number data error 18 Frame length error 19 Not executable 23 User memory protected A3 Aborted due to FCS error in transmit data A4 Aborted due to format error in transmit data A5 Aborted due to entry number data error in transmit data A8 Aborted due to frame length error in transmit data 10-3-34 I/O T [...]

495 10-3-35 COMPOUND COMMAND –– QQMR Registers a t the PC all of the bits, words, and timers/counters that are to be read, and reads the status of all of them as a batch. The registered information is re- tained in the PC until it is overwritten by the COMPOUND COMMAND or the PC ’ s power is turned off. Command Format @ QQ x 10 0 x 10 1 x 10 [...]

496 Limitations The registered data is checked from the beginning and the data will be regis- tered up to any errors. For example, if a command attempts to register 129 items, a frame length error (end code 18) will occur but the first 128 items will be registered. DM 6656 to DM 6999 do not exist, but an error will not occur if you try to register [...]

497 Response Format , @ QQ x 10 0 x 10 1 x 16 1 x 16 0 IR x 16 3 x 16 2 x 16 1 x 16 0 ↵  ON/ OFF x 10 3 x 10 2 x 10 1 x 10 0 ON/ OFF Node no. Header code Sub-header code End code Timer/Counter If PV is specified the sta- tus of the Completion Flag is also returned. Data break Bit data ON/OFF Word data IR, SR, LR, HR, AR, DM T erminator FCS ,, [...]

498 Limitations Multiple responses to a command can be cancelled with this command. This command is valid even without the FCS code and terminator . PC Settings PC Mode UM Area RUN MONITOR PROGRAM Write-protected Read-protected OK OK OK OK OK Execution Conditions Commands Responses Single Multiple Single Multiple OK --- --- --- End Codes There are [...]

499 Execution Conditions Commands Responses Single Multiple Single Multiple --- --- OK --- End Codes There are no end codes with this command. 10-3-40 Undefined Command –– IC This response is returned if the header code of a command cannot be decoded. Check the header code. Response Format @ IC x 10 0 x 10 1 ↵  Node no. Header code T ermin[...]

501 Appendix A Standard Models CPU Rack Name Specifications Model number CPU Units (All models are pro- UM DM I/O points RS-232C --- vided with clock function and slots 3.2K words 4K words 640 No C200HE-CPU1 1-E for communications except CPU1 1-E.) 7.2K words 6K words 880 No C200HE-CPU32-E CPU1 1-E.) Ye s C200HE-CPU42-E 15.2K words 12K words 880 No[...]

Standard Models Appendix A 502 Expansion I/O Racks Name Specifications Model number Power Supply Units 100 to 120/200 to 240 V AC C200HW-P A204 100 to 120/200 to 240 V AC (with 24-VDC output terminals) C200HW-P A204S 24 VDC C200HW-PD024 Expansion I/O Backplanes 3 slots C200HW-BI031 5 slots C200HW-BI051 8 slots C200HW-BI081 10 slots C200HW-BI101 I/O[...]

Appendix A Standard Models 503 I/O Units Name Specifications Model number Input Units AC Input Units 8 pts 100 to 120 V AC C200H-IA121 16 pts 100 to 120 V AC C200H-IA122/IA122V 8 pts 200 to 240 V AC C200H-IA221 16 pts 200 to 240 V AC C200H-IA222/IA222V DC Input Units 8 pts 12 to 24 VDC C200H-ID21 1 DC Input Units 16 pts 24 VDC C200H-ID212 AC/DC Inp[...]

Standard Models Appendix A 504 Name Model number Specifications B7A Interface Units 15 or 16 input pts Connects to B7A Link T erminals. Standard transmission delay . C200H-B7AI1 16 output pts Connects to B7A Link T erminals. Standard transmission delay . C200H-B7AO1 (see note) Note: If the Interrupt Input Unit is mounted on an Expansion I/O Rack, t[...]

Appendix A Standard Models 505 Name Model number Specifications Analog I/O Analog Input Units 4 to 20 mA, 1 to 5/0 to 10 V (switchable); 4 inputs; 12 bits C200H-AD001 Units 4 to 20 mA, 1 to 5/0 to 10 V/ – 10 to 10V (switchable); 8 inputs; 12 bits or BCD C200H-AD002 Analog Output Unit 4 to 20 mA, 1 to 5/0 to 10 V (switchable); 2 outputs C200H-DA00[...]

Standard Models Appendix A 506 Name Model number Specifications Position Control Units 1 axis Pulse output; speeds: 1 to 100,000 pps C200H-NC1 1 1 1 axis Pulse output; directly connects to servomotor driver; compatible with line driver; speeds: 1 to 250,000 pps C200H-NC1 12 1 axis Pulse output; directly connects to servodriver C200HW-NC1 13 2 axes [...]

Appendix A Standard Models 507 Name Model number Specifications SYSMAC LINK Unit (optical fiber cable) Connect with H-PCF cable. A Bus Connection Unit must be ordered Data link table: 918 words C200HW-SLK13 separately . Data link table: 2,966 words C200HW-SLK14 Power Supply Adapter Required when supplying backup power For 1 or 2 Units C200H-APS03 P[...]

Standard Models Appendix A 508 Link Adapters Name Specifications Model number Link Adapters 3 RS-422 connectors 3G2A9-AL001 3 optical connectors (APF/PCF) 3G2A9-AL002-PE 3 optical connectors (PCF) 3G2A9-AL002-E 1 connector for RS-232C; 2 for RS-422 3G2A9-AL003 1 connector each for APF/PCF , RS-422, and RS-232C 3G2A9-AL004-PE 1 connector each for PC[...]

Appendix A Standard Models 509 Model Numbers The above cable model numbers specify the type of cable, the length, and the type of connectors attached. S3200-CN  -20-25 1. 2. 3. 1. S3200-CN specifies H-PCF optical fiber cable. 2. The boxes (  ) are replaced by codes indicating the standard model lengths, as shown below . Consult wi[...]

Standard Models Appendix A 510 Plastic Clad Optical Fiber Cable for SYSMAC BUS Name Specifications Model number Standards Plastic Clad Optical Fiber 0.1 m, w/connectors Ambient temp: ° ° 3G5A2-OF01 1 --- Cables (indoor) 1 m, w/connectors – 10 ° to 70 ° C 3G5A2-OF101 2 m, w/connectors 3G5A2-OF201 3 m, w/connectors 3G5A2-OF301 5 m, w/connectors[...]

Appendix A Standard Models 51 1 Name Stan- dards Model number Specifications Optical Fiber Cable Connector SYSMAC NET : S3200-LSU03-01E B700-AL001 C500-SNT31-V4 Full-lock con- nector for NSU, NSB, and C500 SYSMAC NET Link Unit S3200-COCH62M --- SYSMAC BUS: C200H-RM001-PV1 C200H-RT001/RT002-P C500-RM001-(P)V1 C500-RT001/RT002-(P)V1 3G2A9-  [...]

Standard Models Appendix A 512 Optical Power T ester Name Specifications Head Unit Model number Stan- dards Optical Power T ester (see note) (provided with a connector adapter , light source unit, small SYSMAC NET : CV500-SNT31 C200HS-SNT32 S3200-CA T200 2 (provided with the T ester) S3200-CA T2000 --- single-head plug, hard case, and AC adapter) S[...]

Appendix A Standard Models 513 Programming Devices Name Specifications Model number Stan- dards Programming Consoles Hand-Held, w/backlight C200H-PRO27-E U, C 2-m Connecting Cable included CQM1-PRO01-E U, C Programming Console Mounting Bracket Used to attach Hand-held Programming Console to a panel. C200H-A TT01 --- Programming Console Connecting C[...]

Standard Models Appendix A 514 Name Standards Model number Specifications Relay 24 VDC G6B-1 174P-FD-US --- Backplane Insula- For C200HW-BC031 (3-slot CPU Backplane) C200H-A TT31 --- tion Plates For C200HW-BC051 (5-slot CPU Backplane) C200H-A TT51 For C200HW-BC081 (8-slot CPU Backplane) C200H-A TT81 For C200HW-BC101 (10-slot CPU Backplane) C200H-A [...]

Appendix A Standard Models 515 Protocol Support Software Name Specifications Model number Stan- dards Protocol Support Software 3.5 ” , 2HD for IBM PC/A T compatible C200HW-ZW3A T1-E --- T raining Materials Name Specifications Model number Stan - dards SYSMAC T raining System Includes text book, cassette tape, and input switch board. C200H-ETL01-[...]

517 Appendix B Programming Instructions A PC instruction is input either by pressing the corresponding Programming Console key(s) (e.g., LD, AND, OR, NOT) or b y using function codes. T o input an instruction with its function code, press FUN, the function code, and then WRITE. Refer to the pages listed programming and instruction details. Code Mne[...]

Appendix B Programming Instructions 518 Code Page Function Name Mnemonic 13 DIFU DIFFERENTIA TE UP Turns ON the designated bit for one cycle on the rising edge of the input signal. 151 14 DIFD DIFFERENTIA TE DOWN T urns ON the bit for one cycle on the trailing edge. 151 15 TIMH HIGH-SPEED TIMER A high-speed, ON-delay (decrementing) timer . 164 (@)1[...]

Appendix B Programming Instructions 519 Code Page Function Name Mnemonic (@)52 MLB BINARY MUL TIPL Y Multiplies two four-digit hexadecimal values and outputs result to specified result words. 248 (@)53 DVB BINARY DIVIDE Divides four-digit hexadecimal dividend by four-digit hexa- decimal divisor and outputs result to specified result words. 248 (@)5[...]

Appendix B Programming Instructions 520 Code Page Function Name Mnemonic (@)86 ASC ASCII CONVERT Converts hexadecimal values from the source word to eight-bit ASCII code starting at leftmost or rightmost half of starting destination word. 218 87 to 89 For expansion instructions. (@)90 SEND NETWORK SEND Used for communications with other PCs linked [...]

Appendix B Programming Instructions 521 Code Page Function Name Mnemonic --- 7SEG 7-SEGMENT DISPLA Y OUTPUT Converts 4- or 8-digit BCD data to 7-segment display format and then outputs the converted data. 336 --- (@)ADBL DOUBLE BINARY ADD Adds two 8-digit binary values (normal or signed data) and outputs the result to R and R+1. 249 --- AV G A VERA[...]

Appendix B Programming Instructions 522 Code Page Function Name Mnemonic --- (@)RXD RECEIVE Receives data via a communications port. 329 --- (@)SBBL DOUBLE BINARY SUBTRACT Subtracts an 8-digit binary value (normal or signed data) from another and outputs the result to R and R+1. 251 --- (@)SCL SCALING Performs a scaling conversion on the calculated[...]

523 Appendix C Error and Arithmetic Flag Operation The following table shows the instructions that affect the N, OF , UF , ER, CY , GR, LE and EQ flags. In general, N indicates a negative result, OF indicates that the result of a 16-bit calculation is greater than 32,767 (7FFF) or the result of a 32-bit calculation is greater than 2,147,483,647 (7F[...]

Appendix C Error and Arithmetic Flag Operation 524 Mnemonic Page 25402 (N) 25405 (UF) 25404 (OF) 25507 (LE) 25506 (EQ) 25505 (GR) 25504 (CY) 25503 (ER) CLC(41) --- --- --- --- --- --- --- --- 229 MSG(46) µ --- --- --- --- --- --- --- 303 ADB(50) µ µ --- µ --- µ µ µ 243 SBB(51) µ µ --- µ --- µ µ µ 245 MLB(52) µ --- --- µ --- --- --- ?[...]

Appendix C Error and Arithmetic Flag Operation 525 Mnemonic Page 25402 (N) 25405 (UF) 25404 (OF) 25507 (LE) 25506 (EQ) 25505 (GR) 25504 (CY) 25503 (ER) BXF2( –– ) µ --- --- --- --- --- --- --- 191 CMCR( –– ) µ --- --- --- --- --- --- --- 353 CMPL(60) µ --- µ µ µ --- --- --- 196 COLM(64) µ --- --- µ --- --- --- --- 225 CPS( –– ) [...]

Appendix C Error and Arithmetic Flag Operation 526 Mnemonic Page 25402 (N) 25405 (UF) 25404 (OF) 25507 (LE) 25506 (EQ) 25505 (GR) 25504 (CY) 25503 (ER) ZCPL( –– ) µ --- µ µ µ --- --- --- 201[...]

527 Appendix D Word Assignment Recording Sheets This appendix contains sheets that can be copied by the programmer to record I/O bit allocations and terminal assignments, as well as details of work bits, data storage areas, timers, and counters.[...]

528 Programmer: Program: Date: Page: Word: Unit: Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word: Unit: Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word: Unit: Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word: Unit: Bit Field device Notes 00 01 02 03 04 05 06 07 08 09[...]

529 Programmer: Program: Date: Page: Area: Word: Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area: Word: Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area: Word: Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area: Word: Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 W ork Bit[...]

530 Programmer: Program: Date: Page: Word Contents Notes Word Contents Notes Data Storage[...]

531 Programmer: Program: Date: Page: TC address T or C Set value Notes TC address T or C Set value Notes T imers and Counters[...]

533 Appendix E Program Coding Sheet The following page can be copied for use in coding ladder diagram programs. It is designed for flexibility , allowing the user to input all required addresses and instructions. When coding programs, be sure to specify all function codes for instructions and data areas (or # for constant) for operands. These will [...]

534 Programmer: Program: Date: Page: Address Instruction Operand(s) Address Instruction Operand(s) Address Instruction Operand(s) Program Coding Sheet[...]

535 Appendix F Data Conversion T ables Normal Data Decimal BCD Hex Binary 00 00000000 00 00000000 01 00000001 01 00000001 02 00000010 02 00000010 03 0000001 1 03 0000001 1 04 00000100 04 00000100 05 00000101 05 00000101 06 000001 10 06 000001 10 07 000001 1 1 07 000001 1 1 08 00001000 08 00001000 09 00001001 09 00001001 10 00010000 0A 00001010 11 0[...]

Standard Models Appendix F 536 Signed Binary Data Decimal 16-bit Hex 32-bit Hex 2147483647 2147483646 . . . 32768 32767 32766 . . . 5 4 3 2 1 0 – 1 – 2 – 3 – 4 – 5 . . . – 32767 – 32768 – 32769 . . . – 2147483647 – 2147483648 --- --- . . . --- 7FFF 7FFE . . . 0005 0004 0003 0002 0001 0000 FFFF FFFE FFFD FFFC FFFB . . . 8001 8000[...]

537 Appendix G Extended ASCII Programming Console Displays Bits 0 to 3 Bits 4 to 7 BIN 0000 0001 0010 001 1 0100 0101 0110 01 1 1 1010 101 1 1 100 1101 111 0 1111 HEX 0 1 2 3 4 5 6 7 A B C D E F 0000 0 NUL DLE Space 0 @ P ` p 0 @ P ` p 0001 1 SOH DC 1 ! 1 A Q a q ! 1 A Q a q 0010 2 STX DC 2 " 2 B R b r " 2 B R b r 001 1 3 ETX DC 3 # 3 C S[...]

539 Glossary address The location in memory where data is stored. For data areas, an address con- sists of a two-letter data area designation and a number that designates the word and/or bit location. For the UM area, an address designates the instruction location (UM area). In the FM area, the address designates the block location, etc. allocation[...]

Glossary 540 bit designator An operand that is used to designate the bit or bits of a word to be used by an instruction. bit number A number that indicates the location of a bit within a word. Bit 00 is the rightmost (least-significant) bit; bit 15 is the leftmost (most-significant) bit. building-block PC A PC that is constructed from individual co[...]

Glossary 541 counter A dedicated group of digits or words in memory used to count the number of times a specific process has occurred, or a location in memory accessed through a T C bit and used to count the number of times the status of a bit or an execution condition has changed from OFF to ON. CPU An acronym for central processing unit. In a PC [...]

Glossary 542 differentiated instruction An instruction that is executed only once each time its execution condition goes from OFF to ON. Non-dif ferentiated instructions are executed each cycle as long as the execution condition stays ON. differentiation instruction An instruction used to ensure that the operand bit is never turned ON for more than[...]

Glossary 543 extended counter A counter created in a program by using two or more count instructions in suc- cession. Such a counter is capable of counting higher than any of the standard counters provided by the individual instructions. extended timer A timer created in a program by using two or more timers in succession. Such a timer is capable o[...]

Glossary 544 increment Increasing a numeric value. indirect address An address whose contents indicates another address. The contents of the se- cond address will be used as the operand. Indirect addressing is possible in the DM area only . initialization error An error that occurs either in hardware or software during the PC System start- up, i.e.[...]

Glossary 545 inverse condition A condition that produces an ON execution condition when the bit assigned to it is OFF , and an OFF execution condition when the bit assigned to it is ON. I/O capacity The number of inputs and outputs that a PC is able to handle. This number ranges from around one hundred for smaller PCs to two thousand for the larges[...]

Glossary 546 ladder diagram (program) A form of program arising out of relay-based control systems that uses circuit- type diagrams to represent the logic flow of programming instructions. The ap- pearance of the program is similar to a ladder , and thus the name. ladder diagram symbol A symbol used in a ladder-diagram program. ladder instruction A[...]

Glossary 547 LR area A data area that is used in a PC Link System so that data can be transferred be- tween two or more PCs. If a PC Link System is not used, the LR area is available for use as work bits. main program All of a program except for the subroutines. masking ‘ Covering ’ an interrupt signal so that the interrupt is not ef fective un[...]

Glossary 548 normal condition A condition that produces an ON execution condition when the bit assigned to it is ON, and an OFF execution condition when the bit assigned to it is OFF . NOT A logic operation which inverts the status of the operand. For example, AND NO T indicates an AND operation with the opposite of the actual status of the op- era[...]

Glossary 549 output device An external device that receives signals from the PC System. output point The point at which an output leaves the PC System. Output points correspond physically to terminals or connector pins. output signal A signal being sent to an external device. Generally an output signal is said to exist when, for example, a connecti[...]

Glossary 550 Programmable Controller A computerized device that can accept inputs from external devices and gener- ate outputs to external devices according to a program held in memory . Pro- grammable Controllers are used to automate control of external devices. Al- though single-component Programmable Controllers are available, building- block Pr[...]

Glossary 551 Remote I/O System A system in which remote I/O points are controlled through a Master mounted to a CPU Rack or an Expansion I/O Rack connected to the CPU Rack. Remote I/O Unit Any of the Units in a Remote I/O System. Remote I/O Units include Masters, Slaves, Optical I/O Units, I/O Link Units, and Remote T erminals. remote I/O word An I[...]

Glossary 552 Slave Short for Remote I/O Slave Unit. Slave Rack A Ra ck c onta ini ng a Remote I/O Slave Unit and controlled through a Remote I/O Master Unit. Slave Racks are generally located away from the CPU Rack. slot A position on a Rack (Backplane) to which a Unit can be mounted. software error An error that originates in a software program. s[...]

Glossary 553 terminal instruction An instruction placed on the right side of a ladder diagram that uses the final execution conditions of an instruction line. terminator Th e code comprising an asterisk and a carriage return (* CR) which indicates the end of a block of data, whether it is a single-frame or multi-frame block. Frames within a multi-f[...]

Glossary 554 word setting made on the Unit is added to 32 times the word multiplier to arrive at the actual word to be allocated. work bit A bit in a work word. work word A word that can be used for data calculation or other manipulation in program- ming, i.e., a ‘ work space ’ in memory . A large portion of the IR area is always re- served for[...]

555 Index A address tracing. See tracing, data tracing. addresses, in data area, 26 advanced I/O instructions 7-SEGMENT DISPLA Y OUTPUT , 337 DIGIT AL SWITCH INPUT , 340 functions, 336 HEXADECIMAL KEY INPUT , 344 MA TRIX INPUT , 349 TEN-KEY INPUT , 346 Analog T imer Unit, programming examples, 130 application examples, 383 AR area, 48 – 55 arithm[...]

Index 556 decrementing, 228 definers, definition, 138 delay time, in C500 Remote I/O Systems, 378 differentiated instructions, 140 function codes, 138 digit, monitoring, 390 digit numbers, 26 DIP switch, 20 displays converting between 4-digit hex and decimal, 399 converting between 8-digit hex and decimal, 400 converting between hex and ASCII, 398 [...]

Index 557 R$, 474 R%, 476 RC, 461 RD, 463 RE, 464 RG, 462 RH, 460 RJ, 464 RL, 459 RP , 492 RR, 458 SC, 483 TS, 491 W#, 477 W$, 478 W%, 480 WC, 468 WD, 470 WE, 472 WG, 469 WH, 467 WJ, 471 WL, 466 WP , 493 WR, 465 XZ, 497 Host Link Systems, error bits and flags, 40 Host Link Units, PC cycle time, 365 HR area, 68 I I/O bit definition, 29 limits, 29 I/[...]

Index 558 ILC(03), 1 17, 155 – 157 INC(38), 228 INT(89), 287 IORD( –– ), 350 IORF(97), 306 IOWR( –– ), 351 JME(05), 157 JMP(04), 157 JMP(04) and JME(05), 1 19 KEEP(11), 154 in controlling bit status, 121 ladder instructions, 77 LD, 78, 149 LD NOT , 78, 149 LINE(63), 224 LMSG(47), 304 MAX( –– ), 257 MBS( –– ), 253 MBSL( –– ), 2[...]

Index 559 instructions combining, AND LD and OR LD, 84 controlling bit status using KEEP(11), 121 using OUT and OUT NOT , 150 format, 138 notation, 138 structure, 75 using logic blocks, 81 ladder diagram instructions, 149 – 150 LEDs. See CPU Unit indicators leftmost, definition, 26 Link System, flags and control bits, 40 – 41 Link Units See als[...]

Index 560 R Racks, types, 15 Remote I/O Master Units, PC cycle time, 365 Remote I/O Systems, error bits and flags, 39 response time calculations, C500 PCs, 380 response times, I/O, 376 – 387 rightmost, definition, 26 RS-232C communications one-to-one link, 430 procedures, 426 receiving, 428 transmitting, 427 connecting Units, 430 RS-232C port, wi[...]

561 Revision History A manual revision code appears as a suffix to the catalog number on the front cover of the manual. Cat. No. W303-E1-4 Revision code The following table outlines the changes made to the manual during each revision. Page numbers refer to the previous version. Revision code Date Revised content 1 June 1996 Original production 2 Ja[...]