ADLINK Technology cPCI-7200 manual

NuDAQ  / NuIPC  PCI - 7200 / cPCI - 7200 12MB/S High Speed Digital Input/ Output Card User’s Guide Recycled Paper[...]

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© Copyright 1999~2000 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 2.20: October 14, 2000 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for dir[...]

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Getting service from ADLINK Customer Satisfaction is always the most important thing for ADLINK Tech Inc. If you need any help or service, please contact us and get it. ADLINK Technology Inc. Web Site http://www.adlink.co m.tw http://www.adlinktechnology.com Sales & Service service@adlink.com.tw NuDAQ nudaq@ adlink.com.tw NuDAM nudam@ adlink.co[...]

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Table of Contents • i Table of Contents Chapter 1 Introduction ............................................................. 1 1.1 Applications .................................................................... 1 1.2 Features .......................................................................... 2 1.3 Specifications ........................[...]

ii • Table of Conten ts Chapter 5 C/C++ Libraries .................................................... 30 5.1 Libraries Installation ..................................................... 30 5.2 Programming Guide ...................................................... 31 5.2.1 Naming Convention ......................................................[...]

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How to Use This Guide This manual is designed to help you use the PCI - 7200 and cPCI - 7200. The functionality of PCI - 7200 and cPCI - 7200 are the same except that cPCI - 7200 has 4 auxiliary digital input and outpu t. Therefore, the “PCI - 7200” represents both PCI - 7200 and cPCI - 7200 if not specified. The manual describes how to modify [...]

Introduction • 1 1 Introduction The PCI - 7200/cPCI - 7200 is PCI/CompactPCI form factor high - speed digital I/O card, it consists of 32 digital input channels, and 32 digital output channels. High performance designs and the state - of - the - art techn ology make this card suitable for high - speed digital input and output applications. The PC[...]

2 • Introduction 1.2 Features The PCI - 7200 high - speed DIO Card provides the following advanced features: u 32 TTL digital input ch annels u 32 TTL digital output channels u Transfer up to 12M Bytes per second u High output driving and low input loading u 32 - bit PCI bus, Plug and Play u On - board internal timer pacer clock u Internal timer [...]

Introduction • 3 l Input Voltage: Low: Min. 0V; Max. 0.8V High: Min. +2.0V l Input Load: Low: +0.5V @ - 0.6mA max. High: +2.7V @+20 µ A max. l Output Voltage: Low: Min. 0V; Max. 0.5V High: Min. +2.7V l Driving Capacity: Low: Max. +0.5V at 24mA (Sink) High: Min. 2.4V at - 3.0mA (Source) u Programmable Counter l Device: 82C54 - 10, with a 4MHz tim[...]

4 • Introduction 1.4 Software Supporting ADLink provides versatile software drivers and packages for users’ different approach to built - up a system. We not only provide programming library such as DLL for many Windows systems, but also provide drivers for many software package such as LabVIEW ® , HP VEE TM , DASYLab TM , InTouch TM , InContr[...]

Introduction • 5 1.4.2 PCIS - LVIEW: LabVIEW ® Driver PCIS - LVIEW contains the VIs, which are used to interface with NI’s LabVIEW ® software package. The PCIS - LVIEW supports Windows 95/98/NT/2000. The LabVIEW ® drivers are free shipped with the boar d. You can install and use them without license. For detail information about PCIS - LVIEW[...]

6 • Introduction 1.4.7 PCIS - ISG: ISaGRAF TM driver The ISaGRAF WorkBench is an IEC1131 - 3 SoftPLC control program development environment. The PCIS - ISG includes ADLink products’ target drivers for ISaGRAF under Windows NT environment. The PCIS - ISG is included in the ADLINK CD. It needs license. 1.4.8 PCIS - ICL: InControl TM Driver PCIS [...]

Installation • 7 2 Installation This chapter describes how to install the PCI - 7200. At first, the content of the package and the unpacking information that you should be careful are described. Because the PCI - 7200 is a plug and play device, there is no more jumper or DIP switch setting for configuration. The Interrupt number and I/O port addr[...]

8 • Insta llation 2.2 Unpacking Your PCI - 7200 card contains sensitive electronic components that can be easily damaged by static electricity. The card should be done on a grounded anti - static mat. The operator should be wearing an anti - static wristband, grounded at the same point as the anti - static mat. Inspect the card module carton for [...]

Installation • 9 2.4 cPCI/P CI - 7200’s Layout CN1 PCI-7200 Rev A1 CN2 ALTERA PCI -Bus Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 2.1(a) PCI - 7200 Layout Diagram[...]

10 • Insta llation Figure 2.1(b) cPCI - 7200 Layout Diagram[...]

Installation • 11 2.5 Hardware Installation Outline Hardware configuration The PCI cards (or CompactPCI cards) are equipped with plug and play PCI controller, it can request base addresses and interrupt according to PCI standard. The system BIOS will install the system resource based on the PCI cards’ configuration registers and system paramete[...]

12 • Insta llation 2.6 Connector Pin Assignments 2.6.1 PCI - 7200 Pin Assignments The PCI - 7200 comes equip ped with one 37 - pin D - Sub connector (CN2) located on the rear mounting plate and one 40 - pin female flat cable header connector (CN1). The CN2 is located on the rear mounting plate; the CN1 is on front of the board. Refer section 2.2 [...]

Installation • 13 1 2 3 4 5 6 10 11 12 13 14 15 7 8 9 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 32 33 29 35 36 37 34 DI 1 DI 2 DI 3 DI 4 DI 5 DI 6 DI 7 DI 8 DI10 DO10 DO11 DO12 DO13 DO14 DO15 DI 9 GND I_TRG DO0 DO1 DO2 DO3 DO4 DO5 DO6 DO7 DO8 DO9 DI 0 DI11 DI12 DI13 DI14 DI15 +5V I_ACK I_REQ Figure 2.3 CN2 Pin Assignments[...]

14 • Insta llation 2.6.2 cPCI - 7200 Pin Assignments (1) (2) (3) (52) (53) (51) (48) (49) (50) (98) (99) (100) (1) DO0 (26) O_TRG (51) DO1 (76) GND (2) DO2 (27) O_REQ (52) DO3 (77) GND (3) DO4 (28) O_ACK (53) DO5 (78) GND (4) DO6 (29) AUXIN2 (54) DO7 (79) AuxOut2 (5) DO8 (30) AUXIN3 (55) DO9 (80) AuxOut3 (6) DO10 (31) +5Vout (56) DO11 (81) GND (7[...]

Installation • 15 2.7 8254 for Timer Pacer Generation Timer 0 Timer 1 Timer 2 CLK0 GATE0 OUT0 CLK1 GATE1 CLK2 GATE2 OUT1 OUT2 8254 Timer/Counter Digital Input Timer Pacer Digital Output Timer Pacer 4MHz Clock “H” “H” “H” Figure 2.4 8254 configuration The internal timer/counter 8254 on the PCI - 7200 is configured as above diagram (fig[...]

16 • Registers Format 3 Registers Format 3.1 I/O Registers Format The PCI - 7200 occupies 8 consecutive 32 - bit I/O addresses in the PC I/O address space and the cPCI - 7200 occupies 9 consecutive 32 - bit I/O addresses. Table 4.1 shows the I/O Map Address Read Write Base + 0 Counter 0 Counter 0 Base + 4 Counter 1 Counter 1 Base + 8 Counter 2 Co[...]

Registers Format • 17 3.2 Digital Input Register (BASE + 10) 32 digital input channels can be read from this register Address: BASE + 10 Attribute: READ Only Data Format: Byte 7 6 5 4 3 2 1 0 Base +10 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 Base +11 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8 Base +12 DI23 DI22 DI21 DI20 DI19 DI18 DI17 DI16 Base +13 DI31 DI30 [...]

18 • Registers Format u Digital Input Mode Setting: I_ACK : Input ACK Enable 1: Input ACK is enabled (input ACK will be asserted after input data is read by CPU or written to input FIFO) 0: Input ACK is disabled I_REQ : Input REQ Strobe Enabled 1: Use I_REQ edge to latch input data 0: I_REQ is disabled I_TIME0 : Input Timer 0 Enable 1: Input is s[...]

Registers Format • 19 O_TRG : Digital Output Trigger Signal This bit is used to control the O_TRG output of PCI - 7200, th e signal is on CN1 pin 36 of PCI - 7200 or CN1 pin 26 of cPCI - 7200 when 1: O_TRG 1 goes High (1) 0: O_TRG 1 goes Low (0) u Digital I/O FIFO Status: I_OVR : Input data overrun 1: Digital Input FIFO is full (overrun) during i[...]

20 • Registers Format T0_EN: Interrupt is triggered by timer 0 output. 1: Timer 0 interrupt is enabled 0: Timer 0 interrupt is disabled T1_EN: Interrupt is triggered by timer 1 output. 1: Timer 1 interrupt is enabled 0: Timer 1 interrupt is disabled T2_EN: Interrupt is trigg ered by timer 2 output. 1: Timer 2 interrupt is enabled 0: Timer 2 inter[...]

Registers Format • 21 T1_T2: Timer 1 is cascaded with timer 2 1: Timer 1 and timer 2 are cascaded together, output of timer 2 connects to the clock input of timer 1. 0: Not cascaded, the 4 MHz clock is connected to the timer 1 clock input. u I_RE Q Polarity Selection: When the input sampling is controlled by the I_REQ signal only, the I_REQ can b[...]

22 • Registers Format 3.6 8254 Timer Registers (BASE + 0 ) The 8254 timer/ counter IC occupies 4 I/O address. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. You can download the 8254 data sheet from the following web site: http://support.intel.com/support/controllers/peripheral/231164.htm [...]

Operation Theorem • 23 4 Operation Theorem In PCI - 7200, there are four data transfer modes can be used for digital I/O access and control, these modes are: 1. Direct Program Control : the digital inputs and outputs can be re ad/written and controlled by its corresponding I/O port address directly. 2. Internal Timer Pacer Mode : the digital inpu[...]

24 • Operation Theorem 4.2 Timer Pacer Mode The digital I/O access control is clocked by timer pacer, which is generated by an interval programm ing timer/counter chip 8254. There are three timers on the 8254. The timer 0 is used to generate timer pacer for digital input, and timer 1 is used for digital output. The configuration is illustrated as[...]

Operation Theorem • 25 4.3 External Clock Mode The digital input is clocke d by external strobe, which is from the Pin 19 (I_REQ) of CN2 (PCI - 7200) or Pin 24 of CN1 (cPCI - 7200). The operation sequence is very similar to Timer Pacer Trigger. The only difference is the clock source. 1. The external input strobe is generated from outsi de device[...]

26 • Operation Theorem O_REQ & O_ACK for Digital Output 1. Digital Output Data is moved from PC memory to FIFO o f PCI - 7200 by using DMA data mastering data transfer. 2. Move output data from FIFO to digital output circuit. 3. Output data is ready. 4. An O_REQ signal is generated and sent to outside device. 5. After an O_ACK is got, the ste[...]

Operation Theorem • 27 4.5 Timing Characteristic 1. I_REQ as input data strobe (Rising Edge Active) t h ≥ 60ns t I ≥ 60ns t CYC ≥ 5 PCI CLK Cycle t s ≥ 2ns t n ≥ 30ns 2. I_REQ as input data strobe (Falling Edge Active) t s valid data D10~DI31 t n valid data IN_R I_REQ t cyc t l t h t h ≥ 60ns t I ≥ 60ns t CYC ≥ 5 PCI CLK Cycle t s[...]

28 • Operation Theorem 3. I_REQ & I_ACK Handshaking valid data D10~DI31 valid data t1 t2 t5 t4 t3 IN I_REQ IN I_ACK t 1 ≥ 0ns t 5 ≥ 60ns t 3 ≥ 2 PCI CLK Cycle t 2 ≥ 0ns t 4 ≥ 1 PCI CLK Cycle Note: I_REQ must be asserted until I_ACK asserts, I_ACK will be asserted until I_REQ de - asserts. 4. O_REQ as output data strobe Out O_REQ t c[...]

Operation Theorem • 29 5. O_REQ & O_ACK Handshaking OUT_REQ t 1 t 3 valid data DO0~Do31 t 1 19ns t 3 t 2 1 PCI CLK Cycle OUT_ACK 5 PCI CLK Cycle valid data t 2 Note: O_ACK must be de - asserted before O _REQ asserts, O_ACK can be asserted any time after O_REQ asserts, O_REQ will be reasserted after O_ACK is asserted. O_REQ O_ACK[...]

30 • C/C++ Libraries 5 C/C++ Libraries This chapter describes the software library for operating this card. Only the functions in DOS library and Windows 95 D LL are described. Please refer to the PCIS - DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The function prototyp[...]

C/C++ Libraries • 31 5.2 Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software driver are using full - names to represent the functions' real meaning. The naming convention rules are: In DOS Environment : _ {hardware_model}_{action_name}. e.g. _7200_Initial() . All functions in P[...]

32 • C/C++ Libraries 5.3 _7200_Initial @ Description A PCI - 7200 card is initialized according to the card number. Because the PCI - 7200 is PCI bus architecture and meets the plug and play design, the IRQ and base_address ( pass - through address) are assigned by system BIOS directly. Every PCI - 7200 card has to be initialized by this function[...]

C/C++ Libraries • 33 5.4 _7200_Switch_Card_No @ Description After initialized more than one PCI - 7200 card, this function is used to select which card is used currently. @ Syntax Visual C++ (Windows 95) int W_7200_Switch_Card_No (U8 card_number) Visual Basic (Windows 95) W_7200_Switch_Card_No (ByVal card_number As Byte) As Long C/C++ (DOS) int _[...]

34 • C/C++ Libraries 5.6 _7200_AUX_DI_Channel @ Description Read data from auxiliary digital input channel of cPCI - 7200 card. There are 4 digital input channels on the cPCI - 7200 auxiliary digital input port. When performs this function, the auxiliary digital input port is read and the value of the corresponding channel is returned. * channel [...]

C/C++ Libraries • 35 5.8 _7200_AUX_DO_Channel @ Description Write data to auxiliary digital output channel (bit). There are 4 auxiliary digital output channels on the cPCI - 7200. When performs this function, the di gital output data is written to the corresponding channel. channel means each bit of digital input port @ Syntax Visual C++ (Windows[...]

36 • C/C++ Libraries 5.10 _7200_DI_Channel @ Description This function is used to read data from digital input channels (bit). There are 32 digital input channels on the PCI - 7200. When performs this function, the digital input port is read and the value of th e corresponding channel is returned. * channel means each bit of digital input port. @[...]

C/C++ Libraries • 37 5.12 _7200_DO_Channel @ Description This function is used to write data to digital output channels (bit). There ar e 32 digital output channels on the PCI - 7200. When performs this function, the digital output data is written to the corresponding channel. channel means each bit of digital input port @ Syntax Visual C++ (Wind[...]

38 • C/C++ Libraries 5.13 _7200_Alloc_DMA_Mem @ Description Contact Windows 95/98 system to allocate a block of contiguous memory for single - buffered DMA transfer. This functi on is only available in Windows 95/98 version. @ Syntax Visual C++ (Windows 95) int W_7200_Alloc_DMA_Mem (U32 *buff, U32 *handle, U32 buf_size, U32 *actual_size) Visual B[...]

C/C++ Libraries • 39 5.14 _7200_Free_DMA_Mem @ Description Release the system DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. @ Syntax Visual C++ (Windows 95) int W_7200_Free_DMA_Mem (U32 handle) Visual Basic (Windows 95) W_7200_Free_DMA_Mem (ByVal handle As Long ) As Long @ Argument handle: T[...]

40 • C/C++ Libraries the actual size of allocated memory for each half of circular buffer. @ Re turn Code ERR_NoError ERR_SmallerDMAMemAllocated 5.16 _7200_Free_DBDMA_Mem @ Description Release a system circular buffer DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. For double - buffered transf[...]

C/C++ Libraries • 41 Bus Mastering DMA mode of P CI - 7200 : PCI bus mastering offers the highest possible speed available on the PCI - 7200. When the function _7200_DI_DMA_Start is executed, it will enable PCI bus master operation. This is conceptually similar to DMA (Direct Memory Access) transfers in a PC but is really PCI bus mastering. It do[...]

42 • C/C++ Libraries @ Syntax Visual C++ (Windows 95) int W_7200_DI_DMA_Start (U8 mode, U32 count, U32 handle, Boolean wait_trg, U8 trg_pol, Boolean clear_fifo, Boolean disable_di) Visual Basic (Windows 95) W_72 00_DI_DMA_Start (ByVal mode As Byte, ByVal count As Long, ByVal handle As Long, ByVal wait_trg as Byte, ByVal trg_pol As Byte, ByVal cle[...]

C/C++ Libraries • 43 clear_fifo : 0 : retain the FIFO data 1: clear FIFO data before perform digital input disable_di : 0 : digital input operation still active after DMA transfer complete 1: disable digital input operation immediately when DMA transfer complete @ Return Code ERR_NoError ERR_BoardNoInit ERR_InvalidDIOMode ERR_InvalidDIOCnt ERR_No[...]

44 • C/C++ Libraries 5.19 _7200_DI_DMA_Stop @ Description This function is used to stop the DMA data transferring. After executing this function, the _7200_DI_DMA_Start function is stopped. The function returns the number of th e data which has been transferred, no matter if the digital input DMA data transfer is stopped by this function or by th[...]

C/C++ Libraries • 45 5.21 _7200_CheckHalfReady @ Description When you use _7200_DI_DMA_Start to sample digital input data and double buffer mode is set as enable. You must use _7200_CheckHalfReady to check data ready (data half full) or not in the circular buffer, and using _7200_DblBufferTransfer to get data. @ Syntax Visual C++ (Windows 95) int[...]

46 • C/C++ Libraries 5.23 _7200_GetOverrunStatus @ Description When you use _7200_DI_DMA_Start to convert Digital I/O data with double buffer mode enabled, and if you do not use _7200_DblBufferTr ansfer to move converted data then the double buffer overrun will occur, using this function to check overrun count. @ Syntax Visual C++ (Windows 95) in[...]

C/C++ Libraries • 47 C/C++ (DOS) int _7200_DO _DMA_Start (U8 mode, U32 count, U32 *do_buffer, Boolean repeat) @ Argument mode : Digital output trigger modes DO_MODE_0 : Internal timer pacer (TIME 1) DO_MODE_1 : Internal timer pacer with O_REQ enable DO_MODE_2 : O_REQ & I_REQ handshaking count : the sample number of digital output data (in sam[...]

48 • C/C++ Libraries C/C++ (DOS) int _7200_DO_DMA_Status (U8 *status , U32 *count) @ Argument status : status of the DMA data transfer 0 : DO_DMA_STOP : DMA is completed 1 : DO_DMA_RUN : DMA is not completed count : the numbers of DO data which has been transferred. @ Return Code ERR_NoError 5.26 _7200_DO_DMA_Stop @ Description Th is function is [...]

C/C++ Libraries • 49 5.27 _7200_DI_Timer @ Description This function is used to set the internal timer pacer for digital input. There are two configurations for the int ernal timer pacer : 1. Non - cascaded (One COUNTER 0 only) Counter 0 CLK0 GATE0 OUT0 8254 Timer/Counter 4MHz Input Digital Input Trigger Timer pacer frequency = 4Mhz / C0 2. Casca[...]

50 • C/C++ Libraries Note : Since the Integer type in Visual Basic is signed integer. Its range is within - 32768 and 32767. In Visual Basic, if you want to set c0 or c2 as value larger than 32767, please set it as the intended value minus 65536. For example, if you want to set c0 as 40000, please set c0 as 40000 - 65536= - 25536. mode : TIMER_NO[...]

C/C++ Libraries • 51 @ Syntax Visual C++ (Windows 95) int W_7200_DO_Timer (U16 c1, U16 c2, Booelan mode) Visual Basic (Windows 95) W_7200_DO_Timer (ByVal c1 As Integer, ByVal c2 As Integer, ByVal mode As Byte) As Long C/C++ (DOS) int _7200_DO_Timer (U16 c1, U16 c2, Boolean mode) @ Argument c1 : frequency divi der of Counter #1 c2 : frequency divi[...]

52 • Double Buffer Mode Principle 6 Double Buffer Mo de Principle The data buffer for double - buffered DMA DI operation is a circular buffer logically. It logically divided into two equal halves. The double - buffered DI begins when device starts writing data into the first half of the circular buffer (Figure 6 - 1a). After device begins writing[...]

Double Buffer Mode Principle • 53 The PCI - 7200 double buffer mode functions were designed according to the principle described above. If you use _7200_DblBufferMode() to enable double buffer mode, the following _7200_DI_DMA_Start() will perform double - buffered DMA DI. You can call _7200_CheckHalfReady() to check if data in the circular buffer[...]

54 • Limitation 7 Limitation The 12 MB/sec data transfer rate can only be possibly achieved in a system in which the PCI - 7200 card is the only device using the bus, but the speed can not be guaranteed due to the limited FIFO depth. PCI - 7200 supports three input clock modes, internal clock, external clock, and handshaking modes. The first two [...]

Product Warranty/Service • 55 Product Warranty/Service Seller warrants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confi rmed date of purchase of the original buyer and that upon written notice of any such defect, Seller will, at its option, repair or replace the defective item [...]