Intel STL2 Bedienungsanleitung

STL2 Server Board Technical Product Specification Revision 1.0 September 22, 2000 Enterprise Platforms Group[...]

Revision History STL2 Server Board TPS ii Revision History Date Revision Number Modifications 6/15/00 0.5 Initial release. 6/20/00 0.6 Updated connector reference designators 7/7/00 0.61 Updated silkscreen reference designators to agree with STL2 FAB2. Removed figure 2-3, IB6566 IRQ routing diagram. Added BIOS recovery jumper information. Corrected[...]

STL2 Server Board TPS Table of Contents Revision 1.0 iii Table of Contents 1. Introduction ..................................................................................................................... 1-1 1.1 Purpose ...................................................................................................................... 1-1 1.[...]

Table of Contents STL2 Server Board TPS iv 3.5 Wake On LAN Function ............................................................................................ 3-28 4. Basic Input Output System (BIOS) ............................................................................... 4-29 4.1 BIOS Overview .............................................[...]

STL2 Server Board TPS Table of Contents Revision 1.0 v 5.2.6 Speaker Connector (P31) ...................................................................................... 5-69 5.2.7 Speaker Connector (P25) ...................................................................................... 5-69 5.2.8 Diskette Drive Connecto r (P20) .............[...]

List of Figures STL2 Server Board TPS vi List of Figures Figure 1 -1. STL2 Server Board Block Diagram ....................................................................... 1-3 Figure 2 -1. Em bedded NIC PCI Signals ................................................................................ 2-11 Figure 2 -2. Video Controller PCI Signals .....[...]

STL2 Server Board TPS List of Tables Revision 1.0 vii List of Tables Table 2 -1. STL2 Server Board Supported Processors ............................................................ 2-5 Table 2 -2. SCSI Transfer Speeds ........................................................................................... 2-9 Table 2 -3. Embedded SCSI Supported [...]

List of Tables STL2 Server Board TPS viii Table 4 -26. POST Error Messages and Codes ..................................................................... 4-52 Table 4 -27. Adaptec SCSI Utility Setup Configurations ......................................................... 4-57 Table 5 -1. Jumper Block 1J15 Settings .................................[...]

STL2 Server Board TPS Introduction Revision 1.0 1-1 1. Introduction 1.1 Purpose This document provides an architectural overview of the STL2 server board, including the board layout of major components and connectors, and an overview of the server board’s feature set. 1.2 Audience This document is written for technical personnel who want a techni[...]

Introduction STL2 Server Board TPS 1-2 • 32-bit, 33 MHz, 5V keyed PCI segment with four expansion connectors and three embedded devices. - Four 32-bit, 33 MHz, 5V keyed PCI expansion slots. - IB6566 South Bridge , which provides IDE and USB controller functions. - Integrated on-board Intel® EtherExpress™ PRO100+ 10/100megabit PCI Ethernet cont[...]

STL2 Server Board TPS Introduction Revision 1.0 1-3 NB6635 North Bridge 3.0 LE IB6566 South Bridge 2 USB IDE STL2 Server Board Block Diagram STL2 Server Board Block Diagram 2 64bit/66Mhz, 3.3V PCI SCSI Adaptec* AIC7899 133 MHz System Bus PC133 Registered ECC SDRAM DIMMs PCI 32bit/33MHz BMC 80CH11 Super I/O PC97317VUL Floppy Keyboard, Mouse 2 Serial[...]

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STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-5 2. STL2 Server Board Architecture Overview The architecture of the STL2 server board is based on a design that supports dual-processor operation with Intel Pentium III processors and the ServerWorks ServerSet III LE chipset . The STL2 server contains embedded devices for[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-6 2.1.2 Dual Processor Operation The Pentium III processor interface is designed to be MP-ready. Each processor contains a local APIC section for interrupt handling. When two processors are installed, both processors must be of identical revision, core voltage, and bus/core speeds. 2.1[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-7 The boxed processor fan heatsink will keep the processor core at the recommended junction temperature, as long as airflow through the fan heatsink is unimpeded. It is recommended that the air temperature entering the fan inlet be below 45 ° C (measured at 0.3 inches abo[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-8 System memory begins at address 0 and is continuous (flat addressing) up to the maximum amount of DRAM installed (exception: system memory is noncontiguous in the ranges defined as memory holes using configuration registers). The server board supports both base (conventional) and ext[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-9 Table 2 - 2 . SCSI Transfer Speeds SCSI Port Asynchronous Fast-5 Fast-10 Fast-20 Fast-40 Fast-80/Ultra160 SE Yes yes yes yes no no LVD Yes yes yes yes yes yes In the STL2 server board implementation, channel A provides a 68-pin, 16-bit LVD Ultra160 SCSI interface. Channe[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-10 7. Defaults to Memory Write. The extensions to memory commands (memory read multiple, memory read line, and memory write and invalidate) work with the cache line size register to give the cache controller advance knowledge of the minimum amount of data to expect. The decision to use[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-11 The 82559 is a highly integrated PCI LAN controller for 10 or 100 Mbps Fast Ethernet networks. As a PCI bus master, the 82559 can burst data at up to 132 MBps. This high- performance bus master interface can eliminate the intermediate copy step in RX/TX frame copies, re[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-12 • Integrated physical interface to TX magnetics. • The magnetics component terminates the 100Base-TX connector interface. A flash device stores the network ID. • Support for Wake-on-LAN (WOL). 2.4.2.2 Video Controller The STL2 server board includes an ATI Rage IIC video contro[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-13 2.4.2.2.2 Video Controller PCI Commands The Rage IIC supports the following PCI commands: Table 2 - 4 . Video Controller Supported PCI Commands Rage II C Support C/BE[3::0]_L Command Type Target Master 0000 Interrupt Acknowledge No No 0001 Special Cycle No No 0010 I/O R[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-14 2.4.2.3 IB6566 South Bridge The IB6566 South Bridge is a PCI device that provides multiple PCI functions in a single package: PCI-to-ISA bridge, PCI IDE interface, PCI USB controller, and power management controller. Each function within the IB6566 South Bridge has its own set of co[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-15 2.4.2.3.3 USB Interface The IB6566 South Bridge contains a USB controller and USB hub. The USB controller moves data between main memory and the two USB connectors provided. The STL2 server board provides a dual external USB connector interface. Both ports function iden[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-16 2.5.1.1 Serial Ports Two 9-pin connectors in D-Sub housing are provided for serial port A and serial port B. Both ports are compatible with 16550A and 16450 modes, and both are re-locatable. Each serial port can be set to one of four different COM-x ports, and each can be enabled se[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-17 2.5.2 BIOS Flash The STL2 baseboard incorporates an Intel ® 5V FlashFile™ 28F008SA Flash Memory component. The 28F008SA is a high-performance 8 Mbit memory that is organized as 1 MB of 8 bits each. There are 16 64-KB blocks. The 8-bit flash memory provides 1024K x 8 [...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-18 IRQ0/INTR IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9/SCI IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 PCIIRQ0# PCIIRQ1# PCIIRQ2# PCIIRQ3# PCIIRQ4# PCIIRQ5# PCIIRQ6# PCIIRQ7# PIC IB6566 South B ridge PCI Interrupt Router IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 PCIIRQ8# P[...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-19 IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 PIRQ0(16) PIRQ1(17) PIRQ2(18) PIRQ3(19) PIRQ4(20) PIRQ5(21) PIRQ6(22) PIRQ7(23) PIRQ8(24) PIRQ9(25) PIRQ10(26) PIRQ11(27) PIRQ12(28) PIRQ13(29) PIRQ14(30) PIRQ15(31) SCSI PORT A SCSI P[...]

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-20 2.6.3 PCI Ids The STL2 server board PCI Ids are defined as follows: Table 2 - 6 . STL2 PCI IDs Device Bus Number [23:16] Device Number [15:11] Slot ID Signal NB6635 North Bridge 3.0LE 00h 00000b ATI* Rage IIC 00h 00010b P32_AD18 Intel 82559 00h 00011b P32_AD19 Adaptec* AIC-7899 00h [...]

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-21[...]

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STL2 Server Board TPS Server Management Revision 1.0 3-23 3. Server Management This section describes the features of the server management subsystem for the STL2 server board. The server management subsystem consists of the BIOS , hardware, and firmware features built into the server board. These features provide hardware monitoring, control, and [...]

Server Management STL2 Server Board TPS 3-24 • Monitors the event receiver • Controls secure mode, inlucluding video blanding, diskett write-protect monitoring, and fornt panel lock/unlock initiation • Controls Wake-on-Lan via Magic Packet* support 3.2 Hardware Sensors The following table lists the hardware sensors present on the STL2 server [...]

STL2 Server Board TPS Server Management Revision 1.0 3-25 Sensor Number Sensor Type Monitoring Device 94h BIOS POST (Error) Code 95h Log Disable Log Area Reset / Cleared (bit 2) ECC single bit Error Disable (bit 0) 96h System Event OEM System Event (Hard Reset) (bit 1) System 97h Critical Interrupt PCI SERR (bit 5) PCI PERR (bit 4) Front Panel NMI [...]

Server Management STL2 Server Board TPS 3-26 Sensor Type Sensor Type Code Sensor-Specific Offset Event Remarks Platform Security Violation Attempt 06h 00h Secured Mode Violation Attempt Power/sleep switch has been activated while in Secure Mode 03h Pre-boot Password Violation (network boot Password) Bad Password at PXE Boot Processor 07h 00h IERR C[...]

STL2 Server Board TPS Server Management Revision 1.0 3-27 Sensor Type Sensor Type Code Sensor-Specific Offset Event Remarks 04h CD-ROM boot completed The server has been booted (not supported) OS Critical Stop 20h 00h Stop during OS load / Initialization OS stalled during startup 01h Run-time Stop OS stalled during startup System ACPI Power State 2[...]

Server Management STL2 Server Board TPS 3-28 • s4: Hibernate or Save to Disk. The memory and machine state are saved to disk. Pressing the power button or another wakeup event restores the system state from the disk and resumes normal operation. This assumes that no hardware changes were made to the system while it was off. • s5: Soft off. Only[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-29 4. Basic Input Output System (BIOS ) This section describes BIOS embedded software for the STL2 board set. The BIOS contains standard PC-compatible basic input/output (I/O) services, standard Intel ® server features, plus the STL2 system-specific hardware configuration routin[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-30 4.1.1 System BIOS The system BIOS is the core of the flash ROM-resident portion of the BIOS. The system BIOS provides standard PC-BIOS services and support for some new industry standards, such as the Advanced Configuration and Power Interface Specification , Revision 1.0 and Wired For Man[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-31 Application software must use standard advanced programmable interrupts (APIs) to access these areas and may not access the data directly. 4.2 Setup Utility This section describes the ROM resident setup utility that provides the means to configure the platform. The setup utili[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-32 4.2.2.1 Entering Setup Utility During POST operation, the user is prompted to enter Setup using the F2 function key as follows: Press <F2> to enter Setup After the F2 key is pressed, a few seconds might pass before Setup is entered while POST finishes test and initialization function[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-33 ← ← → → Select Menu The left and right arrow keys are used to move between the major menu pages. The keys have no affect if a submenu or pick list is displayed. F5/– Change Value The minus key and the F5 function key are used to change the value of the current item t[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-34 • System Menu • Boot Menu • Exit Menu These and associated submenus are described below. 4.2.2.4 Main Menu Selections The following tables describe the available functions on the Main Menu , and associated submenus. Default values are highlighted. Table 4 - 2 . Main Menu Selections F[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-35 Table 4 - 3 . Primary Master and Slave Adapters Submenu Selections Feature Choices or Display Only Description User Setting Type Auto None CD-ROM ATAPI Removable IDE Removable Other ATAPI User Select the type of device that is attached to the IDE channel If User is selected, t[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-36 4.2.2.5 Advanced Menu Selections The following tables describe the menu options and associated submenus available on the Advanced Menu. Please note that MPS 1.4 / 1.1 selection is no longer configurable. The BIOS will always build MPS 1.4 tables. Table 4 - 5 . Advanced Menu Selections Feat[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-37 Table 4 - 7 . Peripheral Configuration Submenu Selections Feature Choices or Display Only Description User Setting Serial Port 1: (COM 1) Disabled 3F8, IRQ3 3F8, IRQ4 2F8, IRQ3 2F8, IRQ4 3E8, IRQ3 3E8, IRQ4 2E8, IRQ3 2E8, IRQ4 Auto Disables serial port 1 or selects the base ad[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-38 Table 4 - 8 . PCI Device Submenu Selections Feature Choices or Display Only Description User Setting PCI IRQ1 through PCI IRQ14 Disabled Auto Select IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 Specify which PIC IRQ a certain PCI IRQ maps to. Table 4 - 9 . Option ROM Submenu Selections [...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-39 Feature Choices or Display Only Description User Setting Keyboard Auto-repeat Rate 2/sec 6/sec 10/sec 13.3/sec 18.5/sec 21.8/sec 26.7/sec 30/sec Selects key repeat rate. Keyboard Auto-repeat Delay 0.25 sec 0.5 sec 0.75 sec 1 sec Selects delay before key repeat. 4.2.2.6 Securit[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-40 Table 4 - 12 . Secure Mode Submenu Selections Feature Choices or Display Only Description User Setting Secure Mode Timer Disabled 1 Min 2 Min 5 Min 10 min 30 min 1 hr 2 hr Period of keyboard and mouse inactivity before secure mode is activated and a password is required gain access. Secure[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-41 Disabled Table 4 - 15 . Console Redirect ion Submenu Selections Feature Choices or Display Only Description User Setting Serial Port Address Disabled Serial Port 2 (3F8h/IRQ4) Serial Port 2 (2F8h/IRQ3) If enabled, the console will be redirected to this port. If console redirec[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-42 3 Hard Drive Attempts to boot from a hard drive device. 4 Intel UNDI, PXE-2.0 Attempts to boot from a PXE server. Table 4 - 18 . Hard Drive Selections Boot Priority Device Description User Setting 1 AIC-7899, CH B ID 1 1 Select the order in which each drive is attempted to be used as the b[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-43 4.4 CMOS Default Override The BIOS detects the state of the CMOS default switch. If the switch is set to “CMOS Clear” prior to power-on or a hard reset, the BIOS changes the CMOS and NVRAM settings to a default state. This guarantees the system’s ability to boot from flo[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-44 To manually load a portion of the BIOS , the user must specify which data file(s) to load. The choices include • PLATCBLU.BIN • PLATCXLU.BIN • PLATCXXX.BIN • PLATCXLX.BIN • PLATCXXU.BIN The last three letters specify the functions to perform during the flash process: • C = Rewr[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-45 • The system state must be preserved by the user binary (all registers, including extended and MMX, stack contents, and nonuser binary data space, etc.). • The user binary code must be relocatable. The user binary is located within the first 1 MB of memory. The user binary[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-46 The following code fragment shows the header and format for a user binary: db 55h, 0AAh, 20h ; 16KB USER Area MyCode PROC FAR ; MUST be a FAR procedure db CBh ; Far return instruction db 04h ; Bit map to define call points, a 1 ; in any bit specifies ; that the BIOS is called at that ; sca[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-47 scan. Table 4 - 22 . Format of the User Binary Information Structure Offset Bit Definition 0 Bit 0 = 1 if mandatory user binary, 0 if not mandatory. If a user binary is mandatory, it will always be executed. If a platform supports a disabling of the user binary scan through Se[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-48 mode operation, PHLASH (in non-interactive mode only) automatically updates only the main system BIOS. PHLASH senses that STL2 is in recovery mode and automatically attempts to update the system BIOS Before powering up the system, the user must obtain a bootable diskette that contains a co[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-49 • The 8-bit test point is broken down to four 2-bit groups. • Each group is made one-based (1 through 4) • One to four beeps are generated based on each group’s 2-bit pattern. Example: Checkpoint 04Bh will be broken down to: 01 00 10 11 And the beep code will be: 2 –[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-50 CP Beeps Reason 3C Configure advanced chipset registers 3D Load alternate registers with CMOS values 40 Set Initial Processor speed new 42 Initialize interrupt vectors 44 Initialize BIOS interrupts 46 2-1-2-3 Check ROM copyright notice 47 Initialize manager for PCI Option ROMs 48 Check vid[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-51 CP Beeps Reason 8C Initialize floppy controller 90 Initialize hard disk controller 91 Initialize local bus hard disk controller 92 Jump to UserPatch2 93 Build MPTABLE for multi-processor boards 94 Disable A20 address line 95 Install CD-ROM for boot 96 Clear huge ES segment reg[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-52 Table 4 - 25 . Recovery BIOS Port-80 Codes CP Beeps Reason E0 Initialize chip set E1 Initialize bridge E2 Initialize processor E3 Initialize timer E4 Initialize system I/O E5 Check forced recovery boot E6 Validate checksum E7 Go to BIOS E8 Initialize processors E9 Set 4 GB segment limits E[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-53 Code Error Message Failure Description 0230: System RAM Failed at offset System RAM error Offset address 0231: Shadow RAM Failed at offset Shadow RAM Failed Offset address 0232: Extend RAM Failed at address line Extended RAM failed Offset address 0233: Memory type mixing detec[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-54 Code Error Message Failure Description 0B93: BMC SDR Repository empty. BMC device (chip) failed 0B94: IPMB signal lines do not respond. SMC(Satellite Management Controller ) failed (Available for use except for the access function to SMC via IPMB) 0B95 BMC FRU device failure. SROM storing [...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-55 3-3-1-4 Memory Not Detected — — 1-2 O ption ROM Initialization Error Failure to initialize Option ROM BIOS Change system board or option board 1-2 Video configuration fails Failure to initialize VGA BIOS Change option video board or system board 1- 2 OPTION ROM Checksum Er[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-56 4.8 Adaptec SCSI Utility The Adaptec SCSI Utility detects the SCSI host adapters on the server board. The Adaptec SCSI Utility is used to: • Change default values • Check and/or change SCSI device settings that may conflict with those of other devices in the server. 4.8.1 Running the S[...]

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-57 Key Action Arrows Up and down arrows move from one parameter to another within a screen. ENTER Displays options for a configurable parameter. Selects an option. ESC Moves back to previous screen or parameter or EXIT if at the Main menu. F5 Switches between color and monochrome[...]

Basic Input Output System (BIOS) STL2 Server Board TPS 4-58 2. Do not remove media from a removable media drive if it is under BIOS control. 4.8.3 Exiting Adaptec SCSI Utility To exit the Adaptec SCSI Utility, the user presses the Esc key several times, until a message prompts him / her to exit. If changes have been made, the user is prompted to sa[...]

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STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-61 5. Jumpers and Connectors STL2 Server Board Jumper and Connector Locations The following figure shows the location of the jumper blocks and connectors on the STL2 Server board. Figure 5 - 1 . STL2 Server Board Jumper and Connector Locations Jumper and connector location key for Figure 5[...]

Jumpers and Connectors STL2 Server Board TPS 5-62 L. System fan connector FAN3A (P29) M. Battery N. System fan connector FAN2A (P27) O. Front panel connector(P23) P. Four pin speaker connector (P25) Q. Ultra Single Ended (SE) SCSI connector (P9) R. Ultra160 LVD SCSI connector (P8) S. Configuration jumper block (1L4) T. Configuration jumper block (1[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-63 E. Parallel port connector F. Keyboard connector G. Mouse connector H. Video connector I. Network connector 5.1 Jumper Blocks Jumpers on several jumper blocks of the STL2 server board are used to set the system configuration. The jumpers are small plastic-encased conductors (shorting pl[...]

Jumpers and Connectors STL2 Server Board TPS 5-64 Table 5 - 1 . Jumper Block 1J15 Settings Jumper Pin Numbers Function Jumper Position What it does at system reset 1 - 2 CMOS clear Open, Protect Preserves the contents of CMOS Closed, Erase Clears CMOS 3 - 4 Password protected Open, Normal Preserves the password Closed, Disable Disables the password[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-65 5. After POST completes, power down the system, unplug the power cable(s), and remove the chassis panel. 6. Remove the jumper from pins 1-2 and store the jumper on pins 11-12. 7. Replace the chassis panel and connect system cables. 8. Power on the system, press F2 at the prompt to run t[...]

Jumpers and Connectors STL2 Server Board TPS 5-66 Table 5 - 2 . Jumper Block 5E1 Settings Processor Frequency ( MHz) Jumper Settings 1-2 3-4 5-6 7-8 667 Not Jumpered Not Jumpered Jumpered Jumpered 733 Not Jumpered Not Jumpered Jumpered Not Jumpered 800 Jumpered Jumpered Not Jumpered Jumpered 867 Jumpered Jumpered Not Jumpered Not Jumpered 933 Jumpe[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-67 Table 5 - 4 . Jumper Block 1L4 Settings Jumper Pin Numbers Function Jumper Position Function 1 – 2 FRB Open, Enabled Enables FRB Closed, Disabled Disables FRB 3 – 4 Front Cover Chassis Intrusion Sensor Open, Enabled Enables Chassis Intrusion sensing. This jumper may be under as a ch[...]

Jumpers and Connectors STL2 Server Board TPS 5-68 5.2.1 Main ATX Power Connector (P33) Table 5 - 6 . Main ATX Power Connector Pinout Pin Signal Wire color Pin Signal Wire Color 1 +3.3 VDC Orange 13 +3.3 VDC Orange 2 +3.3 VDC Orange 14 -12 VDC Blue 3 COM Black 15 COM Black 4 +5 VDC Red 16 PS-ON_L Green 5 COM Black 17 COM Black 6 +5 VDC Red 18 COM Bl[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-69 5.2.4 System Fan Connector s (P29, P27, P11) • System Fan 1: P11 • System Fan 2: P27 • System Fan 3: P29 Table 5 - 9 . Board Fan Connector Pinout Pin Signal 1 Fan Sense 2 + 12 VDC 3 COM 5.2.5 Processor Connectors (P12, P36) • Primary Processor Fan 1: P36 • Secondary Processor [...]

Jumpers and Connectors STL2 Server Board TPS 5-70 5.2.8 Diskette Drive Connector (P20) 18 34 1 17 Figure 5 - 3 . Diskette Drive Connector Pin Diagram Table 5 - 13 . Diskette Drive Connector Pinout Pin Signal Pin Signal 1 GND 18 FD_DENSEL 2 GND 19 No Connection 3 GND 20 FD_MDAID 4 GND 21 FD_INDEX_L 5 GND 22 FD_MON0_L 6 GND 23 FD_SEL1_L 7 GND 24 FD_S[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-71 Pin Signal Pin Signal 4 NC 12 DDCDAT 5 GND 13 HSYNC 6 GND 14 VSYNC 7 GND 15 DDCCLK 8 GND 5.2.10 Keyboard and Mouse Connectors The keyboard and mouse connectors are functionally equivalent. Table 5 - 15 . Keyboard and Mouse Connector Pinouts Pin Keyboard Signal Pin Mouse Signal 1 KEYDAT [...]

Jumpers and Connectors STL2 Server Board TPS 5-72 Pin Signal Description 2 RXD Receive data 3 TXD Transmit data 4 DTR Data terminal ready 5 GND Ground 6 DSR Data set ready 7 RTS Return to send 8 CTS Clear to send 9 RIA Ring indication active 5.2.13 RJ-45 LAN Connector Table 5 - 18 . RJ-45 LAN Connector Signals Pin Signal Description 1 TX+ Transmit [...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-73 5.2.15 Ultra SCSI Connector (P9) Table 5 - 20 . Ultra SCSI Connector Pinout Pin Signal Pin Signal 1-16 GND 49-50 GND 17 TERMPWR 51 TERMPWR 18 TERMPWR 52 TERMPWR 19 NC 53 NC 20-34 GND 54 GND 35 SCD12_L 55 SATN_L 36 SCD13_L 56 GND 37 SCD14_L 57 SBSY_L 38 SCD15_L 58 SACK_L 39 SCDPH_L 59 RE[...]

Jumpers and Connectors STL2 Server Board TPS 5-74 Pin Signal Pin Signal 15 GND 49 GND 16 DIFFSENSA 50 GND 17 TRMPWRA 51 TRMPWRA 18 TRMPWRA 52 TRMPWRA 19 No Connection 53 No Connection 20 GND 54 GND 21 ATNAP 55 ATNAN_L 22 GND 56 GND 23 BSY 57 BSYAN_L 24 ACK 58 ACKAN_L 25 RSTAP 59 RSTAN_L 26 MSGAP 60 MSGAN_L 27 SELAP 61 SELAN_L 28 CDAP 62 CDAN_L 29 R[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-75 Pin Signal Pin Signal 5 DD4 25 DD11 6 DD3 26 DD12 7 DD2 27 DD13 8 DD1 28 DD14 9 DD0 29 DD15 10 GND 30 No Connection 11 IDEDRQ 31 GND 12 DIOW_L 32 GND 13 DIOR_L 33 GND 14 IORDY 34 GND 15 IDEDAK_L 35 GND 16 IDEIRQ 36 No Connection 17 IDESA1 37 No Connection 18 IDESA0 38 IDESA2 19 IDECS0_L[...]

Jumpers and Connectors STL2 Server Board TPS 5-76 A21 +3.3 V B21 AD29 A52 CBE0_L B52 AD8 A22 AD28 B22 GND A53 +3.3 V B53 AD7 A23 AD26 B23 AD27 A54 AD6 B54 +3.3 V A24 GND B24 AD25 A55 AD4 B55 AD5 A25 AD24 B25 +3.3 V A56 GND B56 AD3 A26 IDSEL B26 CBE3_L A57 AD2 B57 GND A27 +3.3 V B27 AD23 A58 AD0 B58 AD1 A28 AD22 B28 GND A59 +5 V B59 +5 V A29 AD20 B2[...]

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-77 Pin Signal Pin Signal Pin Signal Pin Signal A27 +3.3 V B27 AD23 A74 AD54 B74 AD55 A28 AD22 B28 GND A75 +3.3 V B75 AD53 A29 AD20 B29 AD21 A76 AD52 B76 GND A30 GND B30 AD19 A77 AD50 B77 AD51 A31 AD18 B31 +3.3 V A78 GND B78 AD49 A32 AD16 B32 AD17 A79 AD48 B79 +3.3 V A33 +3.3 V B33 CBE2_L A[...]

Jumpers and Connectors STL2 Server Board TPS 5-78 16 Reserved 17 Reset Switch (GND) 18 Reserved 19 ACPI Sleep Switch (Low True) 20 Chassis Intrusion 21 ACPI Sleep Switch (GND) 22 Reserved 23 NMI to CPU Switch (Low True) 24 Reserved[...]

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STL2 Server Board TPS Power Consumption Revision 1.0 6-81 6. Power Consumption 6.1 Calculated Power Consumption The following table shows the calculated power consumption for each of the power supply voltage rails for the STL2 server board. These values were calculated using the specifications for the on-board components and processors. Assumptions[...]

Power Consumption STL2 Server Board TPS 6-82 The total power calculation assumes a system configuration containing dual Pentium® III 1 GHz processors with the VRM for both processors supplied by the 5V source, four 1 GHz DIMMs, all PCI slots containing 10W cards, two USB devices, keyboard & mouse, three chassis fans, and two processor fan heat[...]

STL2 Server Board TPS Mechanical Specifications Revision 1.0 7-83 7. Mechanical Specifications The diagram on the following page shows the mechanical specifications of the STL2 server board. All dimensions are in inches. Connectors are dimensioned to pin 1.[...]

Mechanical Specifications STL2 Server Board TPS 7-84 < This page intentionally left blank >[...]

STL2 Server Board TPS Regulatory and Integration Information Revision 1.0 8-85 8. Regulatory and Integration Information 8.1 Regulatory Compliance The STL2 server board complies with the following safety standard requirements. Table 8 - 1 . Safety Regulations Regulation Title UL 1950/CSA950 Bi-National Standard for Safety of Information Technology [...]

Regulatory and Integration Information STL2 Server Board TPS 8-86 • Intel’s UL File Number E139761 (Component side). • Battery “+” marking: located on the component side of the board in close proximity to the battery holder. • CE Mark: (Component side) • Australian C-Tick Mark: Consists of solid circle with white check mark and suppli[...]

STL2 Server Board TPS Regulatory and Integration Information Revision 1.0 8-87 8.2.2.1 In Europe The CE marking signifies compliance with all relevant European requirements. If the host computer does not bear the CE marking, obtain a supplier’s Declaration of Conformity to the appropriate standards required by the European EMC Directive and Low V[...]

Regulatory and Integration Information STL2 Server Board TPS 8-88 8.2.5 Use Only for Intended Applications This product was evaluated for use in ITE computers that will be installed in offices, schools, computer rooms and similar locations. The suitability of this product for other product categories other than ITE applications, (such as medical, i[...]

STL2 Server Board TPS Regulatory and Integration Information Revision 1.0 8-89 8.3.2 System Environmental Testing The system environmental tests include the following: • Temperature Operating and Non-Operating • Humidity Non-Operating • Shock Packaged and Unpackaged • Vibration Packaged and Unpackaged • AC Voltage , Freq. & Source Int[...]

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STL2 Server Board TPS Glossary Revision 1.0 I Glossary Term Definition ASIC Application Specific Integrated Circuit ASR Asynchronous Reset BMC Baseboard Management Controller BSP Bootstrap Processor EMP Emergency Management Port ESCD Extended System Configuration Data FRB Fault Resilient Booting FRU Field Replaceable Unit HPIB Hot-plug Indicator Bo[...]

Reference Documents STL2 Server Board TPS II Reference Documents • ServerWorks ServerSet* III LE North Bridge Specification. • ServerWorks ServerSet* III LE South Bridge Specification. • PCI Local Bus Specification , Revision 2.2. • USB Specification , Revision 1.0. • 5-Volt Flash File (28F008SAx8) Datasheet . • AIC-7899 PCI-Dual Channe[...]

STL2 Server Board EPS Index Revision 1.0 III Index A ACPI, 2-7, 3-23, 3-25, 3-26, 4-49, 5-73 Adaptec* AIC7899, 1-1, 2-8 Address, 2-9, 2-13, 2-17, 3-25, 4-39, 4-52 AIC-7899, 2-8, 2-9, 2-10, 2-20, 4-40 APIC, 2-6, 2-10, 2-14, 2-15, 2-17 Architecture, 2-5 ATI* Rage IIC, 2-12, 2-13, 2-20 B Baseboard Management Controller. See BMC BIOS, 1-2, 2-8, 2-10, 2[...]

Index STL2 Server Board TPS IV ISA, 2-14, 2-15, 2-16, 2-17, 3-21, 3-24, 4-48 J JEDEC, 1-1, 2-7 L LED, 5-73 Legacy, 2-15, 4-40 Logo, 4-41 LUN, 4-55 M Magic Packet, 3-22 Main Menu, 4-29, 4-30, 4-31, 4-32 Management Controller, 4-51, 4-53 Memory, 2-5, 2-7, 2-9, 2-13, 2-17, 3-22, 3-24, 4-34, 4-40, 4-50, 4-51, 4-52, 6-75 Message, 4-50 Modem, 4-39 MPS, 4[...]

STL2 Server Board EPS Index Revision 1.0 V Super I/O Controller, 1-2 System Event Log, See SEL System Management Software, 3-21 System Setup Utility, See SSU T Temperature, 3-22, 3-23, 4-51, 8-82 termination circuitry, 2-6 Third-party instrumentation, 1-1, 2-8, 2-20, 4-53, 4-54, 4-55 Timeout, 3-23, 3-24, 3-25 Transfer Mode, 4-33 Type Code 3-23 U Ul[...]