National Instruments AT-MIO-16X Bedienungsanleitung

AT-MIO-16X User Manual Multifunction I/O Board for the PC AT/EISA October 1997 Edition Part Number 320640B-01 © Copyright 1992, 1997 National Instruments Corporation. All rights reserved.[...]

support@ natinst. com E-mail: in fo@natin st.com FTP Site: ftp.na tinst.com Web Address: http://www.n atinst.co m BBS United States: ( 512 ) 794-54 22 BBS United Kingd om: 016 35 551422 BBS Fra nce : 01 48 65 1 5 5 9 (512) 4 18- 111 1 Tel: (512) 795-82 48 Fax: (512 ) 794-567 8 Australia 03 9879 5166, Austria 0662 45 79 90 0, Belgium 02 757 00 2 0, [...]

Important Information Warranty The AT-MIO- 16X is warranted against defects in m aterials and w orkmanship for a period of one year f rom the date of shipment, as evidenced by receipts or other documentation. Nation al Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty [...]

© Nat ional Instru ments Corpor ation v AT-MIO -16X Us er Manua l Table of Cont ents About This M anual Organization of This Manual .............. ................. ................. ................. ................. ...... xv Conventions Used in This Manual.................. ................. ................ ................. ............ xvi [...]

T able of Contents AT-MIO-1 6X User Manu al vi © Natio nal Inst rument s Corporati on Analog Output Reference Selection ................ ................. ................. ............. 2-11 Analog Output Polarity Selection .. ................. ................. ................. ............. 2-12 Digital I/O Configura tion ............ ........[...]

T able of Contents © Nat ional Instru ments Corpor ation vii AT-MIO -16X Us er Manua l Chapter 3 Theory of Operation Functional Overview................ ................. ................. ................. ................. ................. 3-1 PC I/O Channel Interface Circuitry ................ ................. ................ ...............[...]

T able of Contents AT-MIO-1 6X User Manu al viii © Natio nal Inst rument s Corporati on Command Regis ter 3 ............. ................. ................ ................. ........ 4-13 Command Regis ter 4 ............. ................. ................ ................. ........ 4-20 Status Register 1 .............. ................. ........[...]

T able of Contents © Nat ional Instru ments Corpor ation ix AT-M IO-16X Us er Manua l Chapter 5 Progra mming Register Prog ramming Considerations .............. ................ ................. ............ 5-1 Resource Allocation Considerations ........... ...... ................ ................. ............ 5-1 Initializing the AT-MIO-16 X .[...]

T able of Contents AT-MIO-1 6X User Manu al x © Natio nal Inst rument s Corporati on RTSI Switch Signal Conn ection Considerations...................... ................. ................. .. 5-38 Programming th e RTSI Switch ......... ................. ................. ................ ................. ........ 5-39 Programming DMA Oper ations [...]

T able of Contents © Nat ional Instru ments Corpor ation xi AT-M IO-16X Us er Manua l Figure 2-5. AT-MIO-16 X 68-Pin I/O Connecto r ............. ...... ................. ................. 2-16 Figure 2-6. AT- MIO-16X PGIA ................ ................. ................ ................. ............ 2-20 Figure 2-7. Diff erential Input Connec[...]

T able of Contents AT-MIO-1 6X User Manu al xii © Natio nal Inst rument s Corporati on Figure 5-7. C yclic Waveform Programmin g .................. ................ ................. ........ 5-27 Figure 5-8. Pro grammed Cycle Wavefor m Programming ......... ................. ............. 5-29 Figure 5-9. Puls ed Cyclic Waveform Programmin g . ..[...]

T able of Contents © Nat ional Instru ments Corpor ation xiii AT-M IO-16X User Ma nual Table A-1. Equivalent Offset Errors in 16-Bit Systems ................... ................. ...... A-3 Table A-2. Equivalen t Gain Errors in 16-B it Systems ........... ................. ................. A-4 Table A-3. Typical Multiple-Channel Scannin g Settlin[...]

© Nati onal Instrum ents Corporat ion xv A T- MIO-16X User Manual About This Manual This m anual desc ribes the mechanica l and elec trical asp ects of th e AT-MIO- 16X board and contains information con cerning its op eration and p rogra mm ing. T he AT -M IO-1 6X is a high- pe rform an ce, multifunct ion analog, digital, a nd timing I/O board fo[...]

About This Ma nual AT-MIO-16X User Manual xv i © Natio nal Inst rument s Corporati on • Appendix C, AMD Am9513A Data Sheet , contains the manufa cturer d ata sh ee t for the AM D Am95 13A System Ti ming Controller integrated circ uit (Advanced Micro Devices, Inc.). This contro ll er i s use d on t he AT -M IO-1 6X . • Appendix D, Custo mer Com[...]

About This Ma nual © Nati onal Instrum ents Corporat ion xvii A T- MIO-16X User Manual Related Documentation The follow ing document co ntains informat ion that you may find h elpful as you read this manual: • IBM P ersonal Computer AT Technical Referenc e You may also want to co nsult the following Advance d Micro Device s information if you pl[...]

© Nati onal Instrum ents Corporat ion 1-1 A T- MIO-16X User Manual Chapter 1 Introduction This chapter describes the AT-M IO-16X, lists the contents of your AT-MIO- 16X kit, the option al softwa re, and optiona l equipment, and explain s how to unpack the A T-MIO -16X. About the AT-MIO-16X Congratulation s o n your p urchase of the Nationa l Instr[...]

Chapter 1 Int roduction AT-MIO-16X User Manual 1 -2 © Natio nal Inst rument s Corporati on signals for communication and control. SCXI is the instrumentation front end for plug -in DAQ b oards . Analog Inpu t The AT -MIO- 16X is a hi gh-perform ance m ultifunction an alog, d igital, and timin g I/O bo ard f or the PC . The AT -M IO- 16X has a 10 ?[...]

Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-3 A T- MIO-16X User Manual Digita l and Tim ing I/O In addition to the a nalog input and analog output ca pabilities of the AT-MIO-16X , the AT -MIO -16X also ha s eight digital I/O line s th at can sink up to 24 mA of curre nt, and three indep endent 16-bit counter/timers fo r freq[...]

Chapter 1 Int roduction AT-MIO-16X User Manual 1 -4 © Natio nal Inst rument s Corporati on ❑ AT-MIO-1 6X U ser Man ual ❑ One of the fo llowing software packages and d ocumentation: Componen tWorks LabVIE W for Window s LabWin dows/CV I fo r W indo ws Measure NI-DAQ for PC Compa tibles Virt ualBen ch ❑ Your comput er Software Programming Choi[...]

Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-5 A T- MIO-16X User Manual VirtualBen ch featu res virtual instrum ents that com bine DAQ produc ts, softwar e, and your com puter to creat e a stand-alone in strument with the added benefit of the processing, display, and storage capabilitie s of your com puter. VirtualBen ch instr[...]

Chapter 1 Int roduction AT-MIO-16X User Manual 1 -6 © Natio nal Inst rument s Corporati on Figu re 1-1. The Relation ship bet ween th e Programmi ng Environ ment, NI-DAQ, and Your Hardware Register-Leve l Programmi ng The fi nal opt ion fo r program ming an y Nation al Inst rument s DAQ hardwa re i s to wr ite r eg iste r- lev el soft wa re . Writ[...]

Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-7 A T- MIO-16X User Manual Optional Equipment National Instru ments offer s a v ari ety of pr oducts to u se with your AT-MIO- 16X board , including ca bles, conn ector blocks, and other accessor ies, as f ollows: • Cables and ca ble assemblies, shielded and ribbon • Conne ctor [...]

© Nati onal Instrum ents Corporat ion 2-1 A T- MIO-16X User Manual Chapter 2 Configuration and Installation This chapter explains board configuration, installa tion of the AT-MIO-16X into the PC, signal connec tions to the AT-MIO- 16X, and cable considerations. Figu re 2-1 . AT-MIO-16X wit h 50-Pin I/O Connector P arts Locator Diagram 1 Product Na[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -2 © Natio nal Inst rument s Corporati on Figu re 2-2 . AT-MIO-16X wit h 68-Pin I/O Connector P arts Locator Diagram Board Configuration The AT-MI O-16X co ntains one D IP switch to configur e the base address selection for the AT bus interfa ce. The remai ning resource selectio [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-3 A T- MIO-16X User Manual The PC d efi nes a ccesses to plug-in b oa rds to be I/O mappe d ac cesses within the I/O space of the computer. Locations are either written to or read from as byte s or words. Eac h register in the register se t is mappe d to a certai[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -4 © Natio nal Inst rument s Corporati on The base ad dress DIP switch is arranged so that a logical 1 or true stat e for the assoc iated addres s selection bit is selected by pushing the toggle switch up, or towa rd the top of the bo ard. Altern ately, a logical 0 or false state[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-5 A T- MIO-16X User Manual AT-MIO-64F-5 No ne* None * 220 hex GPIB-PCII Chann e l 1 Line 7 2B8 hex GPIB-PCIIA Channel 1 Line 7 02E1 hex GPIB-PCIII Channel 1 Line 7 280 hex Lab-PC Channel 3 Line 5 260 hex PC-D IO- 24 None Line 5 210 hex PC-D IO- 96 None Line 5 180[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -6 © Natio nal Inst rument s Corporati on 01110 1C0 1C0 - 1DF 0 1 1 1 1 1E0 1E0 - 1FF 1 0 0 0 0 200 200 - 21F 1 0 0 0 1 220 220 - 23F 1 0 0 1 0 240 240 - 25F 1 0 0 1 1 260 260 - 27F 1 0 1 0 0 280 280 - 29F 10101 2A0 2A0 - 2BF 1 0 1 1 0 2C 0 2 C0 - 2DF 1 0 1 1 1 2E0 2E0 - 2FF 1 1 [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-7 A T- MIO-16X User Manual Interrupt and DM A Channel Selectio n The base I/O address selec tion is the only resourc e on the AT-MIO- 16X board that must be se t manually before the board is placed into the PC. The interr upt level and DMA channe ls used by the A[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -8 © Natio nal Inst rument s Corporati on While reading the followi ng paragraphs, you may find it helpful to refer to the Analo g Inpu t Sign al Conn ectio ns section lat er in this chapte r, which contains diag rams showing the signal paths for the three configura tions. DIFF I[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-9 A T- MIO-16X User Manual RSE Input (16 Channels) RSE inp ut means t hat all i nput signals are re ferenc ed to a c ommon ground po int that is also tied to the a nalog input gro und of the AT-MIO- 16X board . The nega tive (–) input of the diff eren tial inpu[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 10 © Natio nal Inst rument s Corporati on • Multip lexer contro l is configured to control up to 16 input chan nels. Note : The NRSE input mode is the only mode in which the AI SENSE signa l from the I/O connector is used as an input. In al l other modes, AI SENSE is either pr[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-11 A T - MIO-16X User Manual Analog Output Configuration The AT-MI O-16X supp lies two channe ls of analog outp ut voltage at the I/O connector. The ana log output circuitry is c onfigurable through program ming of a regis ter in the boa rd regis ter set. The ref[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 12 © Natio nal Inst rument s Corporati on Analog O utput Po larity Sele ction Each ana log ou tput c hann el ca n be c onfig ured fo r either unipo lar or bipolar output. A un ipolar configu ration has a rang e of 0 to V ref at the analog o utput. A b ipola r configu rat ion h a[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-13 A T - MIO-16X User Manual The AT-M IO-16X can use either its internal 10-MHz timebase, or it can use a timeb ase receive d over the RT SI bus. In additio n, if the boar d is conf igured to use the internal timebase, it can al so be progr ammed to drive its int[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 14 © Natio nal Inst rument s Corporati on Signal Connections This section describe s input and output signal conn ections to the AT-MIO- 16X board via the AT-MI O-16X I/O conn ector. This section also includes specifications and connection instructions for the sign als given on [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-15 A T - MIO-16X User Manual Figure 2-4 shows the pin assig nments for the AT -M IO-16X 50-pin I/O conn ector. Figu re 2-4. AT-MIO-16X 50-Pin I/O Con nector 1 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 16 © Natio nal Inst rument s Corporati on Figure 2-5 shows the pin assig nments for the AT-M IO-16X 68- pin I/O conn ector. Figu re 2-5. AT-MIO-16X 68-Pin I/O Con nector 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 43 44 11 12 13 14 15 16 17 18 45 46 47 48 49 50 51 52 53 19 20 2[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-17 A T - MIO-16X User Manual Signal Connect ion Descriptions Signal Names Reference Descrip tions AI GND N/A Analog Inpu t Ground—These pi ns are the refere nce point for single-ended me asurements and the bias current return point for differential measurem ent[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 18 © Natio nal Inst rument s Corporati on SCANCLK DIG GND Scan Clock—This pi n pulses once for each A/D conversion in the scanning mod es. The low-to-high ed ge indicates when the input signal can b e removed from the in put or switched to another s ignal. EXTSTROBE* DIG GND E[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-19 A T - MIO-16X User Manual The sig nals on the conn ector c an be cla ssified a s analog input si gnals, analog o utput signals, digita l I/O signals, digita l power conn ections, or timing I/ O si gn als . S ign al co nne c tion g uid el in es fo r ea ch o f t[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 20 © Natio nal Inst rument s Corporati on Figur e 2-6. AT-MIO-16X PGI A The AT-MI O-16X PGI A applies gain and co mmon-mod e voltage rejection, and presents high -input impedance to the analog input signals connected to the AT-MIO- 16X board. Signals are routed to the positive ([...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-21 A T - MIO-16X User Manual Types of Signal Sources When config uring the input mode of the AT-MIO-1 6X and makin g signal connec tions, you mu st first determin e wheth er the signal sou rce is floating or g round- refe re nced . These two type s o f signa ls a[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 22 © Natio nal Inst rument s Corporati on Table 2- 5 summarizes the recommende d input config uration for both types of signal sources. Differe ntial Co nnectio n Consideratio ns (DIFF Input Configur ation) Differ ential co nnections a re those in wh ich each AT-M IO-16X analog [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-23 A T - MIO-16X User Manual Differe ntial Co nnectio ns for Groun d-Referenced Signal So urces Figure 2-7 show s h ow to co nnec t a groun d-r efe renc ed signal s our ce to an AT- MIO-16X boa rd configur ed in the DIFF input mode . The AT-MIO-16X analog input c[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 24 © Natio nal Inst rument s Corporati on Differe ntial Co nnectio ns for Nonre ferenced o r Floati ng Signal So urces Figure 2-8 shows h ow to co nnec t a floating sign al sour ce to a n AT-MIO- 16X board configured in the DIFF input mode. The AT-MIO- 16X analog input circuitry[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-25 A T - MIO-16X User Manual connect the negative side of the signal to AI GND as well as to the negative (–) input of the PGIA. This works well for DC-coupled sources with low source impedan ce (less than 100 Ω ). Howeve r, for la rger source impeda nces, th[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 26 © Natio nal Inst rument s Corporati on resistors. Fo r exam ple, if tw o 100- k Ω bias resi stors are used, there could be a s much as 2 00 µ V of inpu t of f s et v ol tag e ( 0. 6 6 L S B at a g ai n of 1, bi pola r rang e). Single-En ded Connectio n Consideratio ns Sing[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-27 A T - MIO-16X User Manual and 15 are on pins 17 and 18, which are the farthest analo g inputs from AI GND. The sensiti vities to noi se of the other chan nels in the middle ar e betwee n those of Chan nels 0 and 15 and va ry accord ing to their di stance from [...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 28 © Natio nal Inst rument s Corporati on Single-En ded Connectio ns for Grounded Signal Sources (NRSE Configura tion) If a gr ounde d signa l sou rce is to be m easur ed w ith a single-ende d configura tion, then the AT- MIO-16X mus t be configur ed in the NRSE input configurat[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-29 A T - MIO-16X User Manual Common-Mo de Signa l Rejection Consideration s Figures 2-7 and 2-8, located earlier in this chapter, show connections for signal sources th at are alrea dy refere nced to some ground point with respec t to the AT-MIO-16 X. In these ca[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 30 © Natio nal Inst rument s Corporati on The follow ing r anges a nd ratings ap ply to the EX TR EF input: Normal input voltage ra nge ±10 V peak with respect to AO G ND Usable inpu t volta ge range ±18 V p eak wi th respec t to AO GN D Absolute maximum ratings ±30 V peak wi[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-31 A T - MIO-16X User Manual Digita l I/O Signa l Connection s The digital lines ADIO<0..3> are connec ted to digital I/O port A. The digital lin es BDIO<0..3> are connected to digital I/O port B. DIG GND is the digital ground p in for both dig ital I[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 32 © Natio nal Inst rument s Corporati on Figure 2-12. Dig ital I/O Connecti ons In Figure 2-12, port A is configur ed for digital outp ut, and port B is configured for digital input. Digita l input applications include receivi ng TTL signals an d sensing extern al device state [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-33 A T - MIO-16X User Manual Caution: Under no c ircumstances should these +5-V power pins be direc tly connected to analog or digital g round or to any other vo ltage source on the AT-MIO- 16X or a ny other de vice. Doing so can da mage the AT -MIO-16X and the P[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 34 © Natio nal Inst rument s Corporati on EXTCONV* Signal A/D conver sions ca n be ext ernally trigger ed with the EXT CONV* pin . Applyin g an act ive low pulse to th e EXTCONV* signal i nitiates an A/D conversio n. Figure 2-14 shows the timing requ irements for the EXTCONV* si[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-35 A T - MIO-16X User Manual EXTTRIG* Signal Any data acquisition se quence can be initiated by an external trigger applied to the EX TTRIG* pin. Applyi ng a falling edge to the EXTTRIG* pin starts the sample and sample-interva l counters, thereby initiating a da[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 36 © Natio nal Inst rument s Corporati on EXTGATE* Signal EXTGAT E* is an inpu t sign al use d for ha rd ware gating . EX TG AT E* contro ls A/D conve rsio n pulses. If EXT GAT E* is low, no A/D conversio n p ulses oc c ur fr om EXT CO NV* o r th e sample -inte rval counter. If [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-37 A T - MIO-16X User Manual Counter Signal Connections The gen eral-purpose timing signals include the G ATE and OUT signals for the Am 951 3A Co unte rs 1, 2, an d 5, SOU RC E sig nals fo r C ounters 1 and 5, and the FO U T signal ge nerated by the Am9513 A. Co[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 38 © Natio nal Inst rument s Corporati on Figur e 2-17. Event-Counti ng Appl ication with Extern al Switch Gating To perf orm pulse -width me asure ment, a c oun ter is p rog ramm ed to be level gated. The pulse to be measured is applied to the counter GATE input. The c ounter i[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-39 A T - MIO-16X User Manual To measur e frequen cy, a counte r is programme d to be level gated and the rising or falling edges a re counted in a signal applied to a SOURCE input. The g ate sign al applied to the counte r G ATE input is o f some known duration. [...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 40 © Natio nal Inst rument s Corporati on The signa ls f or Cou nter s 1 , 2, a nd 5, a nd the FOU T outpu t sign al are directly tied from the A m 9513A input a nd ou tput p ins to the I/O connec tor. In addi tion, the GATE, SO URCE, an d OUT1 pins are pu lled up to +5 V thro u[...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-41 A T - MIO-16X User Manual Figure 2-19. G eneral-P urpose Ti ming Signa ls The G ATE and O UT signal tran sitions in Figure 2-17 are refere nced to the rising edge of the SOURCE sign al. This timing diagram assumes that the counter s are programm ed to count ri[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 42 © Natio nal Inst rument s Corporati on register in the AT -MIO -1 6X r eg ister set an d th en div ided by 10 . Th e default value is 1 M Hz into the Am 9513A (10-M Hz clock signal on the AT-MIO- 16X) . The six inte rnal tim ebase cloc ks can be us ed a s countin g source s, [...]

Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-43 A T - MIO-16X User Manual You ca n minim ize n oise pic kup and ma ximize m easur emen t a ccur acy by doing th e following : • Use differ ential analog input conne ctions to reject comm on-mode noise. • Use individually shielded, twisted-pair wires to con[...]

Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 44 © Natio nal Inst rument s Corporati on The CB- 50 is use fu l fo r prot otyping a n ap plication or in s ituations where A T-MI O -16 X i nte rc onn ect ions ar e fr eq uent ly c ha ng ed . W hen you deve lop a f inal field w iring sche me , how eve r, y ou may wa nt to devel[...]

© Nati onal Instrum ents Corporat ion 3-1 A T- MIO-16X User Manual Chapter 3 Theory of Operation This chapter contain s a func tional ov erview of the AT-MIO-1 6X and e xplains the oper ation of e ach func tional un it ma king up the AT-MIO -16X. Functional Overview The bloc k diag ram in Figu re 3-1 is a f unctiona l over vie w of the AT-MI O-16X[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -2 © Natio nal Inst rument s Corporati on The following major compon ents make up the AT-MI O-16X boar d: • PC I/O channel interface circuit ry • Analog in put ci rcuitry • Data ac quisition cir cuitry • Analog output circu itry • DAC wa veform ge neratio n circuitr y • Dig ita l[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-3 A T- MIO-16X User Manual Figur e 3-2. PC I/O Channel I nterface Circui try Bloc k Diagram The PC I/O channel interface circuit ry consists of address latches, address dec oder circuitry, data buffers, PC I/O channe l interface timing signals, inte rrup t cir cuitry, an d DM [...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -4 © Natio nal Inst rument s Corporati on conflicts w ith a ny othe r e quipm ent in you r PC, you m ust chang e the base addre ss of the AT-MIO-16 X or of the other device. See Chapter 2, Configuration and Installation , for more info rmation. The PC I/O cha nnel interfac e timing signals a[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-5 A T- MIO-16X User Manual select ed for DMA transfer . These DMA ch annels are select able from one of the registe rs in the AT -MIO -16X r egister set. Analog Input and Data Acquisition Circuitry The A T-MI O-16X handle s 1 6 cha nnels of analo g in put with softwar e-progr [...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -6 © Natio nal Inst rument s Corporati on Analog Inpu t Circuitry The analog input circuitry consists of an input multiplexer, multiplexer-mode select ion circuitry, a PG IA, calibration cir cuitry, a 16- bit samp ling AD C, a nd a 1 6-b it, 5 12- word de ep FIFO. A/D Converter The A DC is a[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-7 A T- MIO-16X User Manual input of the PGIA in single -ended mode is conn ected to either the input ground or th e AI SE NS E signa l a t the I /O c onnec tor depe nding o n the nature of the inpu t signals. PGIA The PGIA fulfills two purpos es on the AT-MIO- 16X board. It co[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -8 © Natio nal Inst rument s Corporati on bipolar modes, and these valu es are also permanen tly stored in the EEPROM. Calibration constants can be read from the EEPROM then written to the calibration DACs that adjust pr egain offset, postgain offset , and g ain erro rs associated with th e [...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-9 A T- MIO-16X User Manual When the ADC value i s shifted into the AD C FIFO buffer by FIFO_LD*, a si gnal is generated that indicat es valid data is available to be read. Single conve rsion timing of th is type is appropr iate for reading channe l data on an ad ho c basis. Ho[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 10 © Natio nal Inst rument s Corporati on acquisition seque nce tha t e mpl oys ex ter nal co nve rsion tim ing, conversions are inhibited by the hardware until a trigger condition is receive d, then the progr ammed num ber of c onversio ns occurs , and conversio ns are inhibited after the [...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-11 A T - MIO-16X User Manual In this seque nce, the sample-interval coun ter, Coun ter 3, is prog rammed to generate c onver sion signals o nly under a certain gating signa l, such as the DAQPROG signal. In addition, the sa mple counter, Counter 4, is program med to count the [...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 12 © Natio nal Inst rument s Corporati on the sample tim er is inde pe ndent of the ga ting signal, and for pretrigg er sequences, the sample timer is dependent on the gating signal. Multipl e-Channel Data Acqui sition Multiple-c hann el data a cquisition is p erfor med by en ab ling sc ann[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-13 A T - MIO-16X User Manual Continuous Scann ing Data Acquisition Timing Continuous scanning data acqu isition uses the configur ation memory register to automatically se quence from one analog input channel setting to another during the data acquisition sequence. Continuous [...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 14 © Natio nal Inst rument s Corporati on Interval Sca nning Data Acquisitio n Timing Interval scan ning a ssigns a time betwe en the beginning of con sec utive scan se quenc es . If only on e scan se quenc e is in the con figuration memory li st, the circuitry stops at the end of the list [...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-15 A T - MIO-16X User Manual Data Acquisiti on Rates The acqu isition and chan nel selection ha rdware func tion so that in the channe l sc an ning mo de , the next c hann el in the c ha nnel co nfigura tio n registe r i s sele cted immed iate ly after the conversio n pr o ces[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 16 © Natio nal Inst rument s Corporati on Figu re 3-9. Analog Ou tput Circui try Block Di agram Analog Outp ut Circuitry Each a na lo g o u tp ut ch anne l contain s a 16-bi t DAC , re fe rence sel ection switches, unip olar/bipolar outpu t selection switches, a nd output data coding circu [...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-17 A T - MIO-16X User Manual The outpu t vo ltage is av aila ble on the AT -MIO -1 6X I /O conne ct or DAC0 O UT a nd DAC 1 O UT pins . The ana log ou tp ut o f the DAC s is updated to reflect the loaded 16-bit digital code in one of the following three ways: • Immediately w[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 18 © Natio nal Inst rument s Corporati on AT-MIO- 16X board c an b e reca librate d withou t e xterna l ha rdw are at any time u nder any number of different ope rating co nditions in orde r to remove errors c au s ed b y te mperatu r e dr if t a nd tim e. T he AT -M IO-16X is factory calib[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-19 A T - MIO-16X User Manual Figu re 3- 10. Analog Output Waveform C ircui try The local latch is used for im mediate updating of the DACs. When data is written to the DACs in imm ediate updating mode, the data is directly route d to the DACs to be converte d to a voltage at t[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 20 © Natio nal Inst rument s Corporati on latch concurre ntly or separately. In this instance, th e value written to the DAC through the local latch is not updated u ntil the update pulse trigger occurs. If the RTSI latch is used to transfer serial data from the AT-DSP2200 ov er the RTSI bu[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-21 A T - MIO-16X User Manual In Figure 3-11, the update trigger signal ser ves to update the previo usly written value to the DAC. I n the posted update mode, the DAC FIFO is used to bu f fe r th e dat a. Requests a re ge ne rated eit he r when th e FI FO is not full or when t[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 22 © Natio nal Inst rument s Corporati on continuous wave form. The adv antage of having the data in the DAC FIFO is that the FIFO ne ve r n eeds to have th e da ta re fr esh ed , theref o re it is ne ver empty. Rather than requesting new data, the FIFO simply reuses e xisting da ta, rem ov[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-23 A T - MIO-16X User Manual FIFO Programm ed Cyclic Waveform Gen eration One step beyon d the cont inuou s wavefo rm gene ratio n is the programmed cyclic waveform genera tion. This mode is also available only when the entire buffer fits within the DAC FIFO. Figur e 3-14 show[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 24 © Natio nal Inst rument s Corporati on In the pulsed wave form applica tion, Counte r 1 of the Am9513A is programmed to count the number o f retransmit signals, before termin ati ng t he sequ en ce . At th is point , Counter 2 serv es as an inte rval time r and th en restarti ng the sequ[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-25 A T - MIO-16X User Manual The digital I/O lines a re controlle d by th e D igital Ou tput R egister an d monitored by the Digital I n put Regi ster. The Digital Output Registe r is an 8-bit re gister that conta ins th e di gital output v alues for both ports 0 and 1. Whe n [...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 26 © Natio nal Inst rument s Corporati on Figur e 3-17. Timing I/O Circuitry Block Diagr am The Am9513A contains five independent 16-bit counter/timer s, a 4-bit fre que nc y outp ut chan nel , and fiv e in ter nal ly ge ne ra ted t ime bas es. T he five cou nter/ timer s ca n b e pr ogr am[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-27 A T - MIO-16X User Manual Figu re 3-18. Counter Block Diagram Each counte r has a SOURCE inp ut pin, a GATE input pin , and an output pin labele d OU T. T he Am 951 3A c ounter s a re n um bere d 1 thr oug h 5 , and their GA TE, SOURCE, and OUT pins are lab eled GATE N , SO[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 28 © Natio nal Inst rument s Corporati on counter applic ations, the counte r reloads from an interna l register whe n it reaches TC. In TC pu lse output mo de, the coun ter genera tes a pulse during the c ycle that it re aches TC an d reload s. In TC toggle ou tput mode, the c ounter outpu[...]

Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-29 A T - MIO-16X User Manual Counter 5 is sometimes used by the d ata acquisition timing circuitry and c oncatenate d with Counter 4 to form a 32-bit sam ple counter. The SCANCLK sign al is connected to th e SOURCE3 input of the Am9513A, a nd OUT1 is sent to the d ata ac quisi[...]

Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 30 © Natio nal Inst rument s Corporati on The RTSICLK line can be used to sour ce a 10-MHz signal ac ross the RTSI bus or to receive a nother clo ck signal from an other AT boa rd connect ed to the RTSI bus. BR DCLK is the system clock us ed by the AT-MIO-16X . Bits in a command registe r i[...]

© Nati onal Instrum ents Corporat ion 4-1 A T- MIO-16X User Manual Chapter 4 Register Map and Descriptio ns This chapter describ es in detail the ad dress an d funct ion of e ach of the AT-MIO- 16X contro l and status registe rs. Note : If you plan to use a programming software pac kage such as NI-DAQ or Lab Windows/CVI with your AT-MIO -16X board[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 2 © Natio nal Inst rument s Corporati on Analog Output R egister Group DAC0 Register DAC1 Register 10 12 Write-only Write-only 16-bit 16-bit ADC Ev ent Str o be Regis ter G ro up CONFIGMEMCLR Register CONFIGMEMLD Register DAQ Clear Register DAQ Start Register Single C onversion R [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-3 A T- MIO-16X User Manual Register Sizes Two differ ent tran sfer sizes fo r read- and-wr ite opera tions are ava ilable on the PC: byte ( 8-b it) and w ord ( 16-bit). T able 4-1 sho ws the size of each A T -M IO- 16X r eg is ter . Fo r ex am pl e , re ad in g t h[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 4 © Natio nal Inst rument s Corporati on Configuration a nd Status Regi ster Group The six regist ers ma king up the Conf igurat ion and S tatus R egister Group allow gen eral control an d monitoring of the AT-MIO-1 6X hardware . Com mand Re gisters 1, 2, 3, a nd 4 c ontai n bits [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-5 A T- MIO-16X User Manual Command R egister 1 Comm and Re gister 1 conta ins 11 bits that co ntrol AT-MIO- 16X se rial device access, and data a cquisition mode selection. The contents of this register a re not defined upo n power up a nd are not c leared afte r a[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 6 © Natio nal Inst rument s Corporati on application of the appropriate load signal. 12 SCANDIV Scan Divide—This bit controls the configura tion memory sse quencing during sca nned data acq uisition. If SCANDIV is set, then sequencing is contro lled by Coun ter 1 of the Am 9513A[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-7 A T- MIO-16X User Manual thereby initiating a data acquisition operation. If DA QE N is cl eare d, software and hard war e trigge rs have n o effect . 7 SCAN EN S can En ab le —T hi s b it co nt ro ls multiple-channe l sca nning during d ata acqu is itio n. If [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 8 © Natio nal Inst rument s Corporati on concate nat ed w ith Co unte r 5 to contr ol conversio n cou nting. A 16- bit c ount mode c an be used if the numb er o f A/D sample conv ersions to be perf ormed is less than 6 5,537. A 32- bit coun t mode should be used if the num ber of [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-9 A T- MIO-16X User Manual Command R egister 2 Command Re gister 2 contains 15 bits that control AT -MIO-16X RTSI bus transceiv ers, analog output configu ration, a nd DMA Channe ls A and B selec tion. Bits 8-15 of this register are cleare d upon power u p and afte[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 10 © Natio nal Inst rument s Corporati on 13 A2RCV RTSI A2 Receive—This bit controls the driver that allo ws the G ATE1 s ignal to be driven from pin A2 of the RTSI switch. If A2RCV is set, pin A2 of the RTSI switch drives the GAT E1 signal. In this case, GATE 1 may not be driv [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-11 A T - MIO-16X User Manual 9 EXTRE FDAC1 Exter nal Refer ence for DAC 1—This bit contro ls the re ference se lectio n for DAC 1 in the a nalog ou tput se ctio n. If this bit is set, the reference used for DAC 1 is the extern al ref erence v oltage fr om the I/O[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 12 © Natio nal Inst rument s Corporati on Tabl e 4-2. DM A Channe l Selectio n Bit P atte rn Effect Bit Pattern Effect DMACHAB2 DMACHAB1 DMACHAB0 Primary DMA Channel Selected (A) DMACHBB2 DMACHBB1 DMACHBB0 Secondary DMA Chan nel Selected (B) 000 DMA Ch ann el 0 0 0 0 DMA Chann el [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-13 A T - MIO-16X User Manual Command R egister 3 Command Register 3 c ontai ns 16 bits tha t con trol th e ADC link to the AT-DSP2200, digital I/O port, inter rupt and DM A modes, and interrupt channel selectio n. The c ontent s of this regist er are defined to be [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 14 © Natio nal Inst rument s Corporati on 13 DIOPAEN Digital I/O Port A Enable—Thi s bit cont rols t he 4- bit di git al por t A. I f DIOPAEN is set, the Digital Output Register drive s the DI O<4..1 > digital line s at the I/O conn ector. If DIO PAEN is cleared, the Digit[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-15 A T - MIO-16X User Manual data acquisition operation completes. The interrupt request is serviced by strobing the DAQ Clear Register. When DAQCMPLINT is clear ed, comp letion of a data acquisition sequence does not generate an interrupt. A da ta acquisition sequ[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 16 © Natio nal Inst rument s Corporati on 6 ADCREQ ADC Request Enable—This bit con trols DMA requesting an d interrupt genera tion f ro m an A /D c onver sio n. If this bit is set, an interrupt or DMA request is gene ra ted w he n an A /D conversion is available in the FIFO. If [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-17 A T - MIO-16X User Manual 011101 Channel A from AD C, Chann el B to DAC0 0 1 1 1 1 0 Channel A fr om ADC, Ch annel B to DAC 1 011111 Channel A from ADC, Chann el B to DAC0 and DAC1 (interleav ed) 100001 Timer interrupt 1 0 0 0 1 0 Timer interrupt 1 0 0 0 1 1 Tim[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 18 © Natio nal Inst rument s Corporati on 5 DAC1RE Q D AC 1 Re quest E nable— This bit controls D MA requesting a nd interrup t generation from D/A updates. I f this bit is set, an interrupt or DMA request is generated when the DAC is ready to receive data. If this bit is cleare[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-19 A T - MIO-16X User Manual Table 4-3 for av ailable m odes and ass ocia t ed b it pa tt ern s. 3 DRVAIS Drive Ana log In put Sens e—T his signa l contro ls th e AI SEN SE sign al at the I/O connect or. AI SENSE is al ways used as an input in the N RSE input con[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 20 © Natio nal Inst rument s Corporati on Command R egister 4 Command Register 4 c ontai ns 16 bits tha t con trol th e AT-M IO- 16X board c loc k sele ction, s er ial DA C link o ve r th e RT SI bus, D AC m od e selection, a nd miscellaneous configuration bits. Bits 8-15 o f this[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-21 A T - MIO-16X User Manual 13 DAC1DSP DA C 1 DSP Link Enable—T his bit controls the serial link from the AT-DSP2200 to DAC 1 of the analog output section. If DAC1DSP is set, then the serial link is enabled. Da ta is sent from the A T-DSP2200 ov er the RTSI bu s[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 22 © Natio nal Inst rument s Corporati on update. If DACMB3 is set, the cir cuitry will determ ine w het her to pe rf orm one rea d or two read s from t he DAC FI FO depending o n the da ta in the FI FO. See Table 4-6 for availa ble modes and bit patterns. 7 DACGATE DAC Update Gat[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-23 A T - MIO-16X User Manual Values can be directly written to the DAC, but not through the DAC FIFO. If DACGAT E is cl eare d, u pdatin g of an d writing to the DACs proceeds normally . 6 DB_DIS Double Buffer ing D isable— This bit controls the updating of the D[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 24 © Natio nal Inst rument s Corporati on If SRC3SEL is set, Source 3 is connected to the DAC FI FO retransmit signal . In the FIFO prog rammed cy cle wavefo rm modes, this bit s hould be set so th e counte r can ac cess to the D AC FI FO retransmit signal. I f SRC3SEL is cleare d[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-25 A T - MIO-16X User Manual Status Registe r 1 Status Register 1 c ontai ns 16 bits of AT -MIO -16X har dware statu s information, incl udin g in terrup t, a nal og inpu t status , an alog ou tput sta tus, an d data ac quisi tion pr ogr ess. Address: Bas e addre s[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 26 © Natio nal Inst rument s Corporati on data acquisition operation has complete d. 13 ADCFIFOHF* ADC FIFO Half-Full Flag—This bit reflec ts the stat e of the ADC IFO. If the appr opr iate c onver sion interrup ts are enabled , see T a ble 4-3, and ADCFIFOHF* is clea r, the cu [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-27 A T - MIO-16X User Manual until cleared by strobing the DMATCB Clear Register. 9 OVERFLOW Ove rflow—This bi t indicates whether the ADC FIFO has overflo wed during a sample run. O VER FLO W is a n er ror condition that occurs if the FIFO fil ls up with A/D c o[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 28 © Natio nal Inst rument s Corporati on I/O modes, TMRREQ m ust be cleared by strob ing th e TM RR EQ C le ar Re gis ter . 6 DACCOMP DAC Seque nce Comple te—T his bit reflec ts the stat us of the DAC sequen ce termination cir cuitry. When the DAC sequence has nor mally com ple[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-29 A T - MIO-16X User Manual DACs, and DACCOMP is set, this is an err or cond ition and sho uld be ha ndle d appro pri at ely . If D AC FIF OEF * is s et, then the DAC FIFO has at least one remaining point to be transfe rred. 2 EEPROMD ATA E EPROM Data—This bit r[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 30 © Natio nal Inst rument s Corporati on Status Registe r 2 Status Register 2 contains 1 bit of AT-MI O-16X hard ware status information for monitoring the status of the A/D conversion. Address: Base address + 1A (hex) Type: Read -only Word Size: 1-b it Bit Map : Bit Name Descrip[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-31 A T - MIO-16X User Manual Analog Inpu t Register Group The two r egisters ma king up the Analog I npu t Re gister G roup c ontrol the an alog i nput cir cuitry and can be used to r ead the AD C FIFO. Read ing fr om th e ADC FIFO Regi ster location transfers data[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 32 © Natio nal Inst rument s Corporati on ADC FIFO Regist er Reading the A DC FIFO Register returns the olde st ADC conversion valu e stor ed in th e ADC FIF O. Whe nev er th e ADC F IFO is read , the value read is removed fr om the ADC FIFO, th ereby leavi ng space for another A [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-33 A T - MIO-16X User Manual (0x8000 to 0x7 FFF) when the ADC is in bipolar mode . The A /D conve rsion resu lt ca n be r eturne d from the AD C FIFO as a two’s comple ment or straigh t binary value depending on the input mo de set by the C HAN_BIP bit in the con[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 34 © Natio nal Inst rument s Corporati on To conv ert from the AD C FIFO value to the input volta ge measu red, us e the following for mula: V = ADC reading * 10 V 32,768 Gain Table 4- 8. Two’ s Complem ent Mode A /D Conversi on Value s Input Vol tage (Gain = 1) A/D Conversion R[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-35 A T - MIO-16X User Manual CONFIGMEM Regi ster The CONFIGMEM Register controls the input channel-selection multiplexers, gain, ra nge, and mode settings, and can contain up to 512 c hanne l con figuration settings for u se in sc anning se quen ce s. Address: Bas [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 36 © Natio nal Inst rument s Corporati on 12 CHAN_BIP Cha nnel Bipolar—T his bit configures the ADC for unip olar or bipolar mod e. When CHAN _BIP is clear, th e ADC is configure d for unipolar ope ration and values read from th e ADC FIFO ar e in straight b ina ry forma t. Whe [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-37 A T - MIO-16X User Manual 5-3 CH_GAIN<2..0> C hannel Gain Select–T hese three bits control the gain setting of the i nput PGIA for the selected channel. The following gains can be selecte d on the AT-MIO -16X: 0111 7 7 and 15 1000 8 0 and 8 1001 9 1 and [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 38 © Natio nal Inst rument s Corporati on 2 CHAN_LAST Channel Last—This bit sh ould be se t in the last entry of the scan sequence loaded into the chan nel config uration memo ry. More tha n on e oc cu rrenc e of the CHAN_LAST bit i s possible in the configuration memory list f [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-39 A T - MIO-16X User Manual Writing to the chann el config uration m emory must be preced ed with a strobe to the CONFIGMEMCL R Register. After the channel configura tion memo ry is set up , the fir st value must b e pr eloa ded by accessing the CONFIGM EMLD Regis[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 40 © Natio nal Inst rument s Corporati on Continual strobi ng of the CONFIGM EMLD Register with only one value in the list serves only to reload this one value. Continual strobing with more than one value in the memory sequences thr ough the channel configura tion list. In the sin[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-41 A T - MIO-16X User Manual Analog Outp ut Regist er Group The two register s making up the Analog Output Register Group access the two analog output channels. Data can be tra nsferre d to the DACs in one of three ways d ep ending on the m ode c onfigur ation in C[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 42 © Natio nal Inst rument s Corporati on The formu la for the voltage outp ut versus digital cod e for a bipolar analog output configuration in two’s complement form is as follows: V out = V ref * (digital code) 32,768 where V re f is the positive reference voltage applied to t[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-43 A T - MIO-16X User Manual Bit descriptions f or the registers making up the A nalog Output Register Group are give n on the following pages. 16,384 40 00 5.0 V 32,767 7FFF 9 .999695 V Table 4- 11. Analo g Out put Vo ltage Versus Digi tal Co de (B ipolar Mode) (C[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 44 © Natio nal Inst rument s Corporati on DAC0 Register Writing to the DA C0 Register loads t he value written to the analog output DA C C hanne l 0 in im media te upd ate m ode. If p osted u pda te mode is used, t he value written to the DAC0 Register is buffered and updated to t[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-45 A T - MIO-16X User Manual DAC1 Register Writing to the DA C1 Register loads t he value written to the analog output DA C C hanne l 1 in im media te upd ate m ode. If p osted u pda te mode is used, t he value written to the DAC1 Register is buffered and updated t[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 46 © Natio nal Inst rument s Corporati on ADC Event Strobe Re gister Group The A DC E ve nt Strobe Registe r Group c ons ists of six register s tha t, when written to, cause the occurrence of cer tain events on the AT-MIO- 16X board , such as cleari ng flags and starting A/ D conv[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-47 A T - MIO-16X User Manual CONFIGMEM CLR Regist er Accessing the CONFIGMEMCLR Register clears all informat io n in the channel confi guration memory and resets the write pointer to the first location in the memory. Address: Bas e addres s + 1B (hex ) Type: Read -[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 48 © Natio nal Inst rument s Corporati on CONFIGMEMLD Reg ister Accessi ng t he CONFI GMEMLD Register loa ds and sequen ces thr ough the cha nnel c onfigur ation m emory . Address: Bas e addres s + 1B (hex ) Type: Write-only Word Size: 8-b it Bit Map : Not applicable, no bits used[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-49 A T - MIO-16X User Manual DAQ Clear Register Accessi ng the D AQ Clear R egister location clears t he data a cquisition circu itry. Address: Bas e addre ss + 19 (hex) Type: Read -only Word Size: 8-b it Bit Map : Not applicable, no bits used Strobe Effec t: Canc [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 50 © Natio nal Inst rument s Corporati on DAQ Start Re gister Accessing t he DAQ Start Register location ini tiates a multiple A/D conversio n data ac quisition ope ration. Note : Several other pieces of AT -MIO-16X circ uitry must be set up be fore a data acquisition run ca n occ[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-51 A T - MIO-16X User Manual Single Conversion Register Accessing the Single Conversion Register location initiates a single A/D c onversio n. Address: Base address + 1D (hex) Type: Write-only Word Size: 8-b it Bit Map : Not applicable, no bits used Strobe Effec t:[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 52 © Natio nal Inst rument s Corporati on ADC Calibration Regi ster Accessing the AD C Calibration Register location initiates an ADC calibration p rocedure. Th is register shou ld be strobed after powe r up to assure the ADC is in a calibrated state. Address: Base address + 1F (h[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-53 A T - MIO-16X User Manual DAC Event Strobe Re gister Group The DAC E vent Strobe Registe r Group c onsists of three re gister s that, when written to, cause the occurrence of certa in events on the AT-MIO- 16X board , such as cleari ng flags and upda ting the an[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 54 © Natio nal Inst rument s Corporati on TMRREQ Clear Reg ister Accessi ng the TMRREQ Clear Regist er clears the TMRREQ and DACCOMP bits after a TMRTRIG* pulse is detected. Clearing TMRREQ when interrupt or DMA mode is enabled clears the respective interrupt or DMA request. Addre[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-55 A T - MIO-16X User Manual DAC Up date Re gister Accessi ng the DAC Upda te Register with p osted update mode en abled updates b oth DAC0 and DA C1 simultaneo usly with the pre viously written values and r emoves DAC FIFO data for DAC0, DAC1, or both, as program [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 56 © Natio nal Inst rument s Corporati on DAC Clear Register Accessi ng the DAC Clea r Register clears parts of the DAC circuit ry, including emptyin g the DAC FIFO. Address: Base address + 1E (hex) Type: Read -only Word Size: 8-b it Bit Map : Not applicable, no bits used Strobe E[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-57 A T - MIO-16X User Manual General Event Strobe Register Group The Gene ral Event Strobe Reg ister Group co nsists of six register s that, when written to, cause the occurrence of certa in events on the AT-MIO- 16X board , such as cleari ng flags and starting A/ [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 58 © Natio nal Inst rument s Corporati on DMA Channel Clear Regi ster Accessi ng the DM A Channel Clear Regist er cl ears the ci rcuitry asso ci ated with du al-cha nnel D MA op eration . Two D MA ch annel s are program med f or dual ch an nel DMA. Wh en the f irst D MA cha nnel t[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-59 A T - MIO-16X User Manual DMATCA Cl ear Regi ster Accessi ng the DMATCA C lear Regi ster will clear th e DMATCA signal in Status Reg ister 1, a nd it will ac know led ge the inte rrupt ge nera ted from the Channel A terminal counter inter rupt. When the selected[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 60 © Natio nal Inst rument s Corporati on DMATCB Cl ear Register Accessi ng the DMATCB Cl ear Register clears the DMAT CB signal i n Status Register 1, an d acknowledge s the interru pt generated fro m the Channe l B ter minal cou nter i nterrupt . When the select ed DMA Channe l [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-61 A T - MIO-16X User Manual Extern al Strobe Register Accessi ng the Extern al Strobe Register locati on gene rates an activ e low signal at the EXTS TROBE* output of the I/O conn ector. This signal ha s a minimum low tim e of 500 n sec . The E XTS TR OB E* pu ls [...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 62 © Natio nal Inst rument s Corporati on Calibration DAC 0 Load Register Accessi ng the Cal ibration DAC 0 L oad Registe r loads th e serial d ata previously shifted into one of the eight selected 8-bit calibration DACs. Address: Base address + 0A (hex) Type: Write-only Word Size[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-63 A T - MIO-16X User Manual Calibration DAC 1 Load Register Accessi ng the Cal ibration DAC 1 L oad Registe r loads th e serial d ata shifted into the 12-bit ADC pregain offset calibration DACs. Address: Base address + 1A (hex) Type: Write-only Word Size: 8-b it B[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 64 © Natio nal Inst rument s Corporati on Am9513A Count er/Timer Register Group The thre e re giste rs ma king up the Am 951 3A Co unte r/Time r R egis ter Group access the onboa rd c ounter/timer. The Am 951 3A contr ols onboard data acquisition timing as well as general-purpose [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-65 A T - MIO-16X User Manual Am9513A D ata Register With the Am9513A Data Register, any of the 18 internal register s of the Am9513A can be written to or read from. The Am9513A Command Register must be written to in order to select the re gister to be accessed by t[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 66 © Natio nal Inst rument s Corporati on Am9513A Comm and Register The Am9 513A Command Reg ister controls the overall ope ration of the Am9513A Counter/Timer and co ntrols selection of the inte rnal registers ac cessed throu gh the A m9513 A Data R egister. Address: Bas e addre [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-67 A T - MIO-16X User Manual Am9513A Statu s Register The Am95 13A Status Register conta ins information ab out the output pin status of each counte r in the Am9513A . Address: Bas e addre ss + 16 (hex) Type: Read -only Word Size: 16- bit Bit Map : Bit Name Descrip[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 68 © Natio nal Inst rument s Corporati on Digita l I/O Register G roup The two register s making up the Digital I/O Registe r Group monitor an d control the AT-MIO- 16X digital I/O lines. The Digital Input Register returns the digital state of the eight digital I/O lines. A patter[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-69 A T - MIO-16X User Manual Digital I nput R egister The Digital Input Register, when read, re turns the logic state of the eight AT-M IO-1 6X dig ital I /O lin es. Address: Bas e addres s + 1C (hex ) Type: Read -only Word Size: 16- bit Bit Map : Bit Name Descript[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 70 © Natio nal Inst rument s Corporati on Digital O utput Register Writing to the Digital Output Register controls the eight AT-MIO-16X digital I/O lines. The Digital Output Register controls both ports A and B. When ei ther digital port is enabled, the patt ern contained i n the [...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-71 A T - MIO-16X User Manual RTSI Switch R egister Group The two registers ma king up the RTSI Switch Register Group, allow the AT-MIO-16X RTSI switch to be programm ed for r outing of signals on the RTSI bus trigger lines to and from sever al AT-MI O-16X signal li[...]

Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 72 © Natio nal Inst rument s Corporati on RTSI Switch Shif t Register The RTSI Switch Shift Register is written to in order to load the RTSI switch inte rnal 56-bit Control Register with routing info rmation for switching signals to and from the R TSI bus trigger lines. The RTSI S[...]

Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-73 A T - MIO-16X User Manual RTSI Switch Strobe Register The RTSI Switch Strobe Register is written to in order to load the contents of the RTSI Switch Shift Register into the RTSI Switch Control Register, thereby updating the RTSI sw itch routing pattern. The RTSI[...]

© Nati onal Instrum ents Corporat ion 5-1 A T- MIO-16X User Manual Chapter 5 Programming This chapter contains pro gramming instru ctions for ope rating the circ uitry on t he AT-M IO-16 X. Programm ing the AT-MI O-16X invo lves writing to and reading from the variou s registers on the board. T he progra mming instruct ions list the sequence of st[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -2 © Natio nal Inst rument s Corporati on Table 5-1 provide s a general overv iew of the AT-MI O-16X resou rces to ensure there are no conflicts when using the cou nters/timers. As an example , if an interval scann ing data acquisition sequence tha t requires less than 65,537 sample s is in operatio[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-3 A T- MIO-16X User Manual 4. Disable all RTSI swi tch conn ections (see Programming the R TSI Switch section later in this chapter). This sequence lea ves the AT-MIO-16X circ uitry in the following state: • DMA and inte rrupts ar e disa bled. • The DMA ci rcuitr y is c leare d. ?[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -4 © Natio nal Inst rument s Corporati on Figur e 5-1. Ini tiali zing t he Am9 513A Counte r/Ti mer W rite 0xFFFF to the Am9513A Command Register W rite 0xFFEF to the Am9513A Command Register W rite 0xFF17 to the Am9513A Command Register W rite 0xF000 to the Am9513A Data Register W rite 0xFF00 + ctr[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-5 A T- MIO-16X User Manual Programm ing the Analog I nput Circu itry The ana log input circuitry can be programm ed for a number of differen t modes de pend ing o n th e a pplication. I f single cha nnels a re to be monitore d on an a d hoc b asis, the n the sing le co nversion m ode [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -6 © Natio nal Inst rument s Corporati on Figur e 5-2. Sin gle Conv ersion Pr ogramm ing Generating a Single Conversio n An A/D c onver sion can be in itiated in one of tw o w ays: a software-genera ted pulse or a hardware pulse. To initiate a single A/D conversio n through softw are, access the Sin[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-7 A T- MIO-16X User Manual Readin g a Single Conver sion Result A/D conversion results are available when ADCFIFOE F* is set in the Status Register and can be obtained by reading the ADC FIFO Re gister. To read t he A/D conversion result, use the following steps: 1. Read the Statu s R[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -8 © Natio nal Inst rument s Corporati on In posttrigger sequences, the sample counter starts counting after receipt of the first trigger, while in the pr etrigger a cquisition mode, the sample counter does not start counting until a secon d trigger co ndition occurs. The data acquisit ion operation[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-9 A T- MIO-16X User Manual Figur e 5-3. Sin gle-Chan nel Dat a Acquisi tion Pr ogramming ST AR T Program a single analog input channel, gain, mode, and range Program the sample-interv al counter Program the sample counter Clear the A/D circuitry Enable a single-channel data acquisitio[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 10 © Natio nal Inst rument s Corporati on Programm ing Data Acquisiti on Seque nces with Channel Sca nning The prec eding data ac quisition program ming sequenc e progra ms the AT-MIO-16X for multiple A/D conversions on a single input chan nel. T he AT -M IO-1 6X c an a lso be p rog ramm ed fo r sc[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-11 A T - MIO-16X User Manual Figu re 5-4 . Scanni ng Dat a Acquisi tion P rogrammi ng Setting the SCANEN bit in conjunction with the D AQEN bit in Command Register 1 e nable s scan ning during mu ltiple A/ D conversio ns. The SCAN EN bit mu st be set rega rdless o f th e type o f scan[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 12 © Natio nal Inst rument s Corporati on Interval-Channe l Scanning Data Acqu isition Follow the prog ra mming steps listed in Figu re 5-5 to p rogram scan ne d multiple A/D conversions with a scan interval (pseudo-simulta neous) for po sttrigger and pretrigg er modes, as well as internal and exte[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-13 A T - MIO-16X User Manual Figur e 5-5. Interval Scann ing Data Ac quisition Programmi ng ST AR T Program multiple analog input channels, gains, modes, and ranges END Program the sample-interv al counter Program the sample counter Clear the A/D circuitry Enable an interv al scanning[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 14 © Natio nal Inst rument s Corporati on Setting the SCANEN bit in conjunction with the D AQEN bit in Command Register 1 e nable s scan ning during mu ltiple A/ D conversio ns. The SCAN EN bit mu st be set rega rdless o f th e type o f scanning use d (continuous or interval ); otherwise, only a si[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-15 A T - MIO-16X User Manual Program ming Single-Ana log Inp ut Chann el Confi gurations The analo g input cha nn el, gain, mod e, and ra nge fo r single conv ersion and single cha nnel acquisition are sele cted by writing a single configura tion value to th e CONF IGME M Re gister. T[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 16 © Natio nal Inst rument s Corporati on configura tion memory, perform th e followin g write opera tions where N is the number of entries in the scan sequence: • Stro be the CONFIGMEMC LR Re gister . •F o r i = 0 to N -1, use the following steps: a. Write the desired analog channel selection [...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-17 A T - MIO-16X User Manual found in Appe ndix C, AMD Am 9513A Data Sheet . Use on e of the following m ode v alues: 8225 — Selec ts 5- MH z c loc k (fr om SOU RCE2 p in) 8B25 — Selec ts 1- MHz cl ock 8C25 — Selects 100-k Hz clock 8D25 — Selects 10- kHz clock 8E25 — Select [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 18 © Natio nal Inst rument s Corporati on Sample Counts 2 t hrough 65,536 Use the following programming sequence to program t he sample counter for sample counts up to 65 ,536. The mi nimum permitted sample count is 2. All writes are 16-bit operations . All values given ar e hexadecim al. 1. Write [...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-19 A T - MIO-16X User Manual 1. Write FF04 to the Am9513A Com mand Register to select the Coun ter 4 Mod e Regis ter . 2. Write 1025 to the A m9513A Data Register to store the Counter 4 mode value for posttr igger acquisition mo des. Write 9025 to the Am9513A Da ta Register to store t[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 20 © Natio nal Inst rument s Corporati on acquisition operation is terminated when Cou nter 4 and Counter 5 reach zero . Programm ing the Sca n-Interval Counter Counter 2 of the A m9513A Counte r/Timer is used a s the sc an-inte rval counter. Counte r 2 ca n be pr ogram me d to g en erate a p ulse [...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-21 A T - MIO-16X User Manual 7. En tries stored in the mux-channe l gain memory should be s canned once during a sca n interv al. T he f ollow ing condition mus t be satisfied: scan interval ≥ sample inter val * x , where x is the number of entries in th e scan sequ ence. Write the [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 22 © Natio nal Inst rument s Corporati on Serv icing the Data Acqui sitio n Operat ion Once the data a cquisition operation is initiate d with the application of a trigg er , the opera tion must be s ervice d by re a ding the AD C FI FO. The ADC FIFO ca n be se rv ice d in tw o diff er en t w ay s.[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-23 A T - MIO-16X User Manual Resetting a Single Am95 13A Counter/Ti mer To reset a p articular co unter in the A m951 3A , use the follow ing program ming sequenc e. All writes ar e 16-bit operation s. All values given ar e hexa decim al. T he e qua tion {2 ^ (ctr - 1) } mea ns {2 “[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 24 © Natio nal Inst rument s Corporati on Figu re 5-6. R esetting an Am9513A Count er/Timer Write 0xFF00 + ctr to the Am9513A Command Re gister Write 0x0004 to the Am9513A Data Re gister END ST AR T Point to the Counter X mode re gister Store the Counter X mode v alue Store a nonterminal count v al[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-25 A T - MIO-16X User Manual Programm ing the Analog O utput Circuitry The volta ges a t the a nal og ou tput c irc uitry ou tput p ins ( pins DAC 0 OUT and DAC1 OU T on t he AT-M IO-16 X I/O co nnecto r) are controlled by loa ding the DAC in the analog output channe l with a 16-bit d[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 26 © Natio nal Inst rument s Corporati on Cyclic Waveform Generation The simple st mode of w aveform genera tion is the cyclic m ode in wh ich an internal or external timi ng signal is used to update the DACs. In this case, DAC updat ing be gins wh en the tim ing sig nal sta rts, and en ds when the[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-27 A T - MIO-16X User Manual Figur e 5-7. Cy clic Wavefo rm Programmin g END ST AR T Clear the analog output circuitry including the D A C FIFO Program the update interv al counter Set the A4RCV bit in Command Register 2 Set the wa v eform generation mode Service update requests Clear[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 28 © Natio nal Inst rument s Corporati on Programmed Cycle Waveform Generation A superset of the waveform f unctionality exists if DAC data buffer i s less than o r e qual to 2, 048 fo r one c ha nnel, or less than o r equal 1,0 24 per DAC for two channels. In these cases, the entire buffer resides[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-29 A T - MIO-16X User Manual Figur e 5-8. Prog rammed Cycl e Waveform Programmi ng END ST AR T Clear the analog output circuitry including the D A C FIFO Program the update interv al counter Set the A4RCV bit in Command Register 2 Set the wa v eform generation mode Service update requ[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 30 © Natio nal Inst rument s Corporati on One disad vantage of the programm ed cycle waveform ge neration is that it uses yet another counter to perfo rm the cycle counting. For this mode , the SRC3SEL bit in Command Register 4 must be set so that th e programmed counter can count the buffer retran[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-31 A T - MIO-16X User Manual Figu re 5-9. Puls ed Cyclic Waveform Program ming In thi s mode, C ounter 1 counts the prog rammed number of cycles before terminating the sequence. Coun ter 2 then begins counting the time b etween cy cles, t he cyc le in terval , then resta rts th e seq [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 32 © Natio nal Inst rument s Corporati on sequence of events continues ad infinitum and does not stop until the update sign al is rem oved or the D AC c ircuitry is clear ed. This sequence requires that the GATE2SEL signal in addition to the SRC3SEL signal be set in Com mand Register 4. This allows[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-33 A T - MIO-16X User Manual sequence. All writes ar e 16-bit operations. A ll values given are hexadecim al. 1. Write FF00 + n to the Am9513A Comman d Register to select th e Counter n Mode Reg ister. 2. Write the mod e value to the Am95 13A Data Registe r to stor e the Counter n mod[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 34 © Natio nal Inst rument s Corporati on Programming t he Waveform Cycle Counter Select the appr opr iate c ounter (1 , 2, or 5 ) fro m the Am95 13A Counter /Timer to be used for co unting DAC bu ffer cyc les. To prog ram the cyc le counte r, comp lete the f ollowing pr ogr amming se quenc e. All [...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-35 A T - MIO-16X User Manual 2. Write the mod e value to the Am95 13A Data Registe r to stor e the Counter 2 mod e value. Am9513 A counter mod e informatio n can be found in Appe ndix C, AMD Am 9513A Data Sheet . C225 — Selec ts 5- MHz cl ock (fr om SOURCE 2 p in) CB25 — Selects 1[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 36 © Natio nal Inst rument s Corporati on Clear Register before exiting the interrupt routine. This clears the interrupt re quest. The best method of ser vicing update requests is with DMA since this is done in parallel with the PC CPU. If DMA is enabled, DMA requests are genera ted when TMRREQ is [...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-37 A T - MIO-16X User Manual If any digital I/O line is not driven, it floats to an indeterminate value. If more than one device is driving any digital I/O line, the voltage at that line may a lso be indeterminate. In these cases , the digital line has no meaningf ul log ic valu e, a [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 38 © Natio nal Inst rument s Corporati on Figure 3-19 in Ch apter 3, Th eory of Operation , diag rams t he AT-MIO-16X RTSI switc h con nections . RTSI Switch Signal Connection Considerations The AT-MI O-16X boa rd has a total of nine signa ls connec ted to the seven A-si de pi ns of the RTS I cro s[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-39 A T - MIO-16X User Manual Note : If both the A2DRV and A2RCV b its are set, the GATE1 signal is driven by the signal OUT2. This arrangem ent is probably not desirable. • To drive the RTSI switch pin A4 with the signal OUT5, set the A4D RV b it in C omm and Re gister 2. Othe rwise[...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 40 © Natio nal Inst rument s Corporati on Figu re 5-10. RTSI S witch Cont rol Pattern In Figure 5-10, the fi elds labeled A6 throug h A0 and B6 through B0 a re the 4-bit c ontrol fields for each RTSI switch pin of the same na me. The 4-bit control fiel d for pin A0 is shown in Figure 5- 10. The bit[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-41 A T - MIO-16X User Manual To pr ogr am t h e RTS I s w it ch , co mp le t e t he se st ep s: 1. Calcula te the 56-bit pattern base d on the desired signa l routing. a. Clear the OUTEN bit for all input pins and for all unused pins. b. Select the signal sour ce p in f or a ll outpu [...]

Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 42 © Natio nal Inst rument s Corporati on 3. Program the DMA controller to service DMA request s from the AT-MI O-16X boa rd . Refe r to t he IBM Pers onal Computer AT Technical Reference manual f or mo re i nf orma tion o n DM A contro ller progra mming. 4. If a DMA terminal co unt is received aft[...]

Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-43 A T - MIO-16X User Manual Interrupt Programm ing Seven dif fere nt interr upts are ge nera ted by the AT-M IO- 16X boa rd : • Wheneve r a conversion is available to be re ad from the ADC FIFO • Whenever the ADC FIFO is more than half-ful l • Wheneve r a data acqu isition sequ[...]

© Nati onal Instrum ents Corporat ion 6-1 A T- MIO-16X User Manual Chapter 6 Calibration Procedures This chap ter discu sses the calibration resourc e s and procedur es for the AT-MIO- 16X analog input and analog outpu t circuitr y. The calibra tion process involv es reading off set and gain errors from the ana log input an d anal og output se cti[...]

Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -2 © Natio nal Inst rument s Corporati on Figu re 6-1 . AT-M IO-16X EEPR OM Map The A T-MI O-16X is fac tory calibr ated befor e shipm e nt, and th e associate d calibra tion const ants are stored in t he fact ory area of the EEPRO M . Tabl e 6- 1 list s wh at is st or ed in t he EEP RO M [...]

Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-3 A T- MIO-16X User Manual 124 Reserved 123 Board Code (AT-MIO-1 6X = 2) 122 Revision and Sub-Re vision Fiel d 121 Configurat ion Memory Depth 120 ADC and DAC FIFO Depths 119 Factory Reference Value MSB 118 Factory Reference Value LSB 117 Area Information 116 Factory ADC B[...]

Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -4 © Natio nal Inst rument s Corporati on When the AT-MIO- 16X board is powered on, or t he conditions under which it is opera ting ch ange , the calibra tion DAC s sh ould be loa ded with values from the EEPROM, or if desired, the board can be recalibrate d. The AT-MI O-16X calibration pr[...]

Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-5 A T- MIO-16X User Manual Figur e 6-2. Revisi on and Subrevi sion Field If the R evision a nd Sub revision Field conta in the bina ry va lue 00100010, this signifies that the accessed A T-MIO-16 X board is at Revision C a nd Sub revision 2. T his n umbe r can be very us e[...]

Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -6 © Natio nal Inst rument s Corporati on Figur e 6-4. ADC and DAC F IFO Dep th Fiel d If the AD C an d DA C FIFO De pth Field co ntain s the b ina ry value 000100 11, th en the A T-M IO -1 6X boa rd that w a s acce ssed c onta ins a n ADC FIFO bu ffer of d epth 512 a nd a DAC FIFO b uffer[...]

Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-7 A T- MIO-16X User Manual be XXXXX00 0. If the a nalog input section is c alibrated using the utility librar y funct ions an d the constant s are saved to User A rea 7, then the ADC Range bit in the area informa tion field for User Area 7 is set or cleared according to th[...]

Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -8 © Natio nal Inst rument s Corporati on It is important to realize that inaccuracy of the internal voltage refere nce resul ts only i n gain erro r. Off set er ror is unaff ecte d. If an application can tolerate slight gain inaccuracy, there should no t be a need to re deter mine the va [...]

Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-9 A T- MIO-16X User Manual a two 's comp lemen t binary n umb er in the on boa rd E EPROM f or subsequent use by the analog input calibra tion routines. Because the onboard reference is very stable with respect to time and temper ature, it is seldom necessary to use t[...]

Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6- 10 © Natio nal Inst rument s Corporati on CALDAC1 until the measured voltage is equal to the value of the refere nce a s stor ed in the on board E EPROM . Onc e the bo ar d is calibrated at a gain of 1, there is only a small residual gain error (±0.0 2% maxim um) at the othe r gains. Th [...]

Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-11 A T - MIO-16X User Manual output to 5 V and adjusts CALDA C4 and CALDAC5 until it measures 5 V betwee n each a nalog output and AO GND. The ga in error is al ways calibrated immedia tely after the offset is calibrate d. Notice that CALDAC4 and CALDAC5 adjust the gain by[...]

© Nat ional Instru ments Corpor ation A-1 AT-MIO -16X Us er Manua l Appendix A Specifications This appendix lists the specifica tions of the AT-MIO-16X. These are typical at 25° C unless o therwise state d. The operatin g temperat ure range is 0° to 70° C. A warmup time of at least 15 minute s is required. Analog Input Number of i np ut c ha nn[...]

Appendix A S pecification s AT-MIO-16X U ser Manual A-2 © Natio nal Inst rument s Corporati on Input i m peda nc e ... .. .... .. .. .... ... .. .... .. .... . 100 G Ω in parallel with 100 pF Gains ....... ...... ...... ...... ...... ..... ...... ...... .. 1, 2, 5, 10, 20, 5 0, and 100, software -selecta ble Pregain of fset erro r After c ali b [...]

Appendix A Specific ations © Nat ional Instru ments Corpor ation A-3 AT-MIO -16X Us er Manua l Long-term stability .......................15 pp m (75 µ V/ ) Explanatio n of Analog Inpu t Specificati ons Linear E rrors Pregain offset error is the amoun t of possibl e voltag e offset err or in the circu itr y b efo re th e gai n s tag e. Its co nt [...]

Appendix A S pecification s AT-MIO-16X U ser Manual A-4 © Natio nal Inst rument s Corporati on Nonlin ear Errors Relative accuracy i s a measur e of the (non )linearity of an analog system. It indicates the maximum de viation of the aver aged analog-inp ut-to- digital-outpu t transf er cur ve fr om a n end poin t-fit straight line. If the analog c[...]

Appendix A Specific ations © Nat ional Instru ments Corpor ation A-5 AT-MIO -16X Us er Manua l Multipl e-Channel Sca nning Acquisition Rates When sc anning a mong chann els with dif ferent vol tages, the analog circui try on the AT-MIO-16X needs time to settle fr om one voltage to the next. Beca use of its complex transient response, the AT-MIO-16[...]

Appendix A S pecification s AT-MIO-16X U ser Manual A-6 © Natio nal Inst rument s Corporati on the same gain and all t he signals are within 10% of the full- scale range of each other (fo r exam ple, within 2 V of each other with a ±10-V range), the circuitry settles t o full 16-bit accuracy (±0.5 LSB) in 10 µ sec and the ch an nels can be sca [...]

Appendix A Specific ations © Nat ional Instru ments Corpor ation A-7 AT-MIO -16X Us er Manua l Output vol tag e rang es ... ..... .. .... .. .. .... .. . 0 to 1 0 V , un ipol ar mod e; ±10 V , bi polar mode , (softwa re-select able) Curren t d ri ve ca pa bi lit y ....... .... .. .. .. .... . ±5 m A (sh o rt- cir cu it pro tec ted ) 2 k Ω mini[...]

Appendix A S pecification s AT-MIO-16X U ser Manual A-8 © Natio nal Inst rument s Corporati on Diff er enti al n on lin ear ity in a DA C is a m easur e of devia tio n of co de width f rom 1 LSB. For a D AC, code width is the differenc e between the analog va lues produce d by consec utive digital codes. A specification of ±0.5 LSB differ entia l[...]

Appendix A Specific ations © Nat ional Instru ments Corpor ation A-9 AT-MIO -16X Us er Manua l Power Requirement (from PC I/O Channel) Power c on sump t io n ..... .. .. ... .... .. .. .. .... .. . 2.0 A ty pic al at + 5 VD C Power availab le at I/O c onnector ....... . 4.75 V to 5.2 5 V at 1 A Physical Board di men si ons . .... .... ..... .. ...[...]

© Nat ional Instru ments Corpor ation B-1 AT-MIO -16X Us er Manua l Appendix B I/O Connector This a ppend ix de scribe s the pino ut and signa l nam es for the AT-MIO- 16X 50- pin I/O conn ec tor a nd the 68 -pin I/O co nnecto r. Figure B-1 sho ws t he A T -MIO -1 6X 5 0-p i n I /O c onnec tor.[...]

Appendix B I/O Connector AT-MIO-16X U ser Manual B-2 © Natio nal Inst rument s Corporati on Figur e B-1. AT-MIO-16X 50-Pin I/O C onnector 1 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 FOUT GA TE5 OUT2 EXTTMR TRIG* GA TE1 EXTCONV* EXTTRIG* SCANCLK +5 V BD[...]

Appen dix B I/O Connec tor © Nat ional Instru ments Corpor ation B-3 AT-MIO -16X Us er Manua l Figure B-2 sho ws th e p in a ssign me nts f or the AT -M IO-1 6X 6 8-p in I/O connec tor. Figur e B-2. AT-MIO-16X 68-Pin I/O C onnector 1 2 3 4 5 6 7 8 9 10 35 36 37 38 39 40 41 42 43 44 11 12 13 14 15 16 17 18 45 46 47 48 49 50 51 52 53 19 20 23 21 22 [...]

Appendix B I/O Connector AT-MIO-16X U ser Manual B-4 © Natio nal Inst rument s Corporati on Table B -1. Signal C onnectio n Description s 68-Pin Pins 50-Pin Pins Si gnal Names Descriptions 24, 27, 29, 32, 56, 59, 64, 67 1-2 AI GND Analog Input Grou nd—These pins are the reference point fo r single-ended measurements and the bias current return p[...]

Appen dix B I/O Connec tor © Nat ional Instru ments Corpor ation B-5 AT-MIO -16X Us er Manua l 8, 14 34, 35 +5 V +5 VDC Source—These pins are fu sed for up to 1 A of +5 V supply. 46 36 SCANC LK Scan Clock—This pin pulses once f or each A/D conversion in the scanning modes. The low-to-high edge in dicates when the input signal can be remo ved f[...]

Appendix B I/O Connector AT-MIO-16X U ser Manual B-6 © Natio nal Inst rument s Corporati on 40 43 OUT1 OUTPUT1— This pin is fro m the Am9513A Coun ter 1 sign al. 6 44 EXTTMRTRIG* External Timer Tr igger—If selected, a high-to-low ed ge on EXTTMRTRI G* results in the output DACs being u pdated with the value writt en to them in the posted updat[...]

© Nat ional Instru ments Corpor ation C-1 AT-MIO -16X Us er Manua l Appendix C AMD Am9513A Data Sheet 1 This a ppend ix c ontai ns the manu fa cturer d ata sh eet f or the A MD Am9513A Sy stem Timing Controller integra ted circui t (Advan ced Micro Devices, Inc.) data sheet. This controller is used on the AT-MIO -16X. 1. Co pyright © Advance d Mi[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-2 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-3 AT-MIO -16X Us er Manua l[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-4 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-5 AT-MIO -16X Us er Manua l[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-6 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-7 AT-MIO -16X Us er Manua l[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-8 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-9 AT-MIO -16X Us er Manua l[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-10 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-11 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-12 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-13 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-14 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-15 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-16 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-17 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-18 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-19 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-20 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-21 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-22 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-23 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-24 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-25 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-26 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-27 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-28 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-29 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-30 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-31 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-32 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-33 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-34 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-35 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-36 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-37 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-38 © Natio nal Inst rument s Corporati on[...]

Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-39 AT-MIO-16X User Ma nual[...]

Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-40 © Natio nal Inst rument s Corporati on[...]

© Nat ional Instru ments Corpor ation D-1 AT-MIO-1 6X Use r Manual Appendix D Customer Communication For yo ur convenience, t his append ix contain s forms t o help you gather the inf ormatio n necessary to help us solve you r technical problems and a form you can use to commen t on the pro duct documentation. When you contact us, we need the info[...]

Fax-on- Demand is a 2 4-hour inf ormation retr ieval syst em containing a library of d ocuments on a wide range of tech nical information. You can access Fax-on-Demand fro m a touch-tone telephone at (512 ) 418-1111 . You can submit technical su pport questions to the applications enginee ring team through e-mail at the Internet address listed belo[...]

Technical Support Form Photocopy this fo rm and u pdate it each time y ou make ch anges to you r software or h ardware, and use the completed copy of this form as a reference for your current configuratio n. Completing this form accurately befor e contacting National Instruments for technical su pport helps our applications engineers answer your qu[...]

AT-MIO-16X Hardware and Software Configuration Form Record the settings and revisions of your h ardware and software on the line to the right of each item. Complete a new copy of this form each time you revi se your software or hardware conf iguration, and use this form as a reference for your current configur ation. Completing this form accu ratel[...]

Documentation Comment Form National Instrum ents encourages you to commen t on the do cumentatio n supplie d with our prod ucts. This information hel ps us provide quality pro duc ts to meet your needs. Title: AT-MIO-1 6X User Manua l Edition Date: Octobe r 1997 Part Number: 320640 B-01 Please comment on the co mpleteness, clarity, and organization[...]

© Nat ional Instru ments Corpor ation G-1 AT-MIO-1 6X Use r Manual Glossary Numbers/Symbols % perce nt + positive of, or plus – n egative of, or minus /p e r °d e g r e e Ω ohm A A amper es AC alternating c urrent Prefix Meanings Value p- p ico- 10 -12 n- nano- 10 -9 µ- m icro- 10 -6 m- m illi- 10 -3 k- kilo- 1 0 3 M- mega - 10 6 G- giga- 10[...]

Gloss ar y AT-MIO-1 6X User Manu al G-2 © Natio nal Inst rument s Corporati on AC coup led allowing the trans mission of AC signals w hile bloc king D C signals A/D analog-to-digital ADC analog-to-digital c onverter—an electronic device, often an integrated circ uit, th at conve rts an a nalog vol tage t o a digit al numbe r ADC resolution the r[...]

Glossary © Nat ional Instru ments Corpor ation G-3 AT-MIO-1 6X Use r Manual B b bit—one binary digit, either 0 or 1 B byte— eight r elated bits o f data, an eight- bit binary n umb er. Also used to denote the amount of me mory requir ed to store one byte of data. bandwidth the range of freque ncies presen t in a signal, o r the range of freque[...]

Gloss ar y AT-MIO-1 6X User Manu al G-4 © Natio nal Inst rument s Corporati on bus master a type of a plug-in board or controller with the ability to read and write devices on the c ompute r b us C CC e l s i u s cache high-spee d proces sor memory that buffer s common ly used instru ctions or data to increa se proces sing throughp ut CalDAC calib[...]

Glossary © Nat ional Instru ments Corpor ation G-5 AT-MIO-1 6X Use r Manual common- mod e range the input ra ng e ov er w hich a ci rcuit ca n ha ndle a co mmo n- mod e signal common- mode signal the math ematical ave rage voltage, re lative to the compu ter’s groun d, of the signa ls fro m a diff eren tial input common-mode voltage any voltage [...]

Gloss ar y AT-MIO-1 6X User Manu al G-6 © Natio nal Inst rument s Corporati on D D/A digital-t o-analog. DAC digital-to-a nalog conve rter—an electr onic device, often an integrated circ uit, that conv erts a digit al number int o a correspo nding anal og voltage or c urre nt daisy-cha in a method of propagating signals along a bus, in which the[...]

Glossary © Nat ional Instru ments Corpor ation G-7 AT-MIO-1 6X Use r Manual derivative c ontrol a con trol action with a n output that is propo rtional to the rate of change of the error sig nal. Deri vative c ontrol a nticipates t he magni tude dif fere nce bet ween th e process varia ble an d the set point . device a plug- in data acq uisition b[...]

Gloss ar y AT-MIO-1 6X User Manu al G-8 © Natio nal Inst rument s Corporati on drive rs software th at co ntr o ls a spec ifi c hardware de vice suc h as a DAQ boar d or a GPIB inte rface boa rd DSP digital signal processing dual-acce ss memory memory th at can be sequentially ac cessed by more than one controller or processo r but not simultaneou[...]

Glossary © Nat ional Instru ments Corpor ation G-9 AT-MIO-1 6X Use r Manual external trigger a voltage pulse from an external source that triggers an event such as A/D conv ersion F F farad s false triggering triggering that occurs at an unintended time fetch-and- deposit a data transfe r in which the data bytes are transferred from the source to [...]

Gloss ar y AT-MIO-1 6X User Manu al G -10 © Natio nal Inst rument s Corporati on Some co mmon ex ampl e of floati ng sign al sour ces ar e batte ries, transfor mers, o r thermoc ouples. flyby a type of high-perform ance data transfe r in which the data bytes pass directly from the source to the target without being transferred to the contro ller F[...]

Glossary © Nat ional Instru ments Corpor ation G-11 AT-MIO -16X Us er Manua l handle pointe r to a pointer to a block of me mory; handles refe rence arrays an d strings. An array of strin gs is a handle to a block of me mory containing handles to string s. handler a device driv er that is installed as part of the operating syste m of the compu ter[...]

Gloss ar y AT-MIO-1 6X User Manu al G -12 © Natio nal Inst rument s Corporati on sine wave a dded in a 4 :1 a mpl itude ratio. DIN—A 25 0 Hz sine wave and an 8 kHz sine wave a dded in a 4 :1 a mpl itude ratio. CCIF—A 14 kHz sine w ave and a 1 5 k Hz sine wave a dded in a 1 :1 a mpl itude ratio. immediate digital I/O a type of digital acqui sit[...]

Glossary © Nat ional Instru ments Corpor ation G-13 AT-MIO -16X Us er Manua l interrupt le vel the relative pr iority at which a devic e can interrupt interval scanning scannin g method where th ere is a longer interval b etween scans than there is be tween indi vidual chan nels compr ising a scan I/O input/output—t he transfer o f data to/fro m[...]

Gloss ar y AT-MIO-1 6X User Manu al G -14 © Natio nal Inst rument s Corporati on L LabVIEW labo rat ory v irt ual instrume nt eng in eering w or kbenc h latch latched digital I/O a type of digital acquisition/generation where a device or module accept s or transfers da ta after a digital pulse has been received . Also called handshaked digital I/O[...]

Glossary © Nat ional Instru ments Corpor ation G-15 AT-MIO -16X Us er Manua l MB megabytes o f memo ry MBLT eight-by te block tran sfers in whic h both the Add ress b us and the Data bus ar e used to transfer data Mbytes/s a unit for data transfer that means 1 million or 10 6 bytes/s memory buf fer See buffe r. MFLOPS million floating-point operat[...]

Gloss ar y AT-MIO-1 6X User Manu al G -16 © Natio nal Inst rument s Corporati on NIST National Institute of Standards and Technology node s execut ion ele ments of a block d iagram co nsis ting of fu nctio ns, structur es, and su bVIs noise an undesirable electrical sign al—Noise come s from external sou rces such as the AC power line, motors, g[...]

Glossary © Nat ional Instru ments Corpor ation G-17 AT-MIO -16X Us er Manua l operating system base-lev el softwa re tha t c ontr ols a com puter, r uns progr am s, inter a cts with users, a nd c ommun ica tes with insta lled hard ware o r pe ripher al devices optical co upler, a device designe d to trans fer el ectrica l signals b y u tilizing li[...]

Gloss ar y AT-MIO-1 6X User Manu al G -18 © Natio nal Inst rument s Corporati on PCMCIA an expansion bus ar chitecture that has found widespr ea d acceptance as a de f ac to s tand ar d in n ot eb ook -si ze co mpu t ers . It o ri gi nat ed a s a specification for add-on memory c ards written by the Person al Computer Mem ory Card I nterna tiona l[...]

Glossary © Nat ional Instru ments Corpor ation G-19 AT-MIO -16X Us er Manua l ppm parts per million pretri ggering the tech nique used on a DAQ boar d to keep a continu ous buffer filled with data, so that when the trigger conditions a re met, the sam ple includes the data leading up to the trigger condition propagatio n the transmission of a sign[...]

Gloss ar y AT-MIO-1 6X User Manu al G -20 © Natio nal Inst rument s Corporati on R RAM random-acc ess memory real time a property of an event or syste m in which data is process ed as it is acquire d ins tead o f bein g accu mu lated and pr ocesse d a t a later time referenc ed sign al signal sourc es with v oltag e signa ls that are re fere nced [...]

Glossary © Nat ional Instru ments Corpor ation G-21 AT-MIO -16X Us er Manua l RTSI Real-Time System Integrat ion RTSI bus real-time syst em integration bus—the National Instruments tim ing bus that conne ct s DA Q bo ar ds di rectly, b y mea ns of c onn ector s on top of the boards, for precis e synchronization of functions S s secon ds Ss a m p[...]

Gloss ar y AT-MIO-1 6X User Manu al G -22 © Natio nal Inst rument s Corporati on SE single-ended—a term used to de scribe an a nalog input that is m easured with respec t to a common gro und self-ca librating a property of a DAQ board t hat has an extremel y stable o nboard referenc e and ca librates its o wn A /D and D/A cir cuits with out ma n[...]

Glossary © Nat ional Instru ments Corpor ation G-23 AT-MIO -16X Us er Manua l S/s samples per secon d—used to express the rate at which a DAQ board samples an analog signal STC system timing controller strain gauge a thin conductor, which is attached to a material, that detects stress or vibrations in that ma terial. The conducto r’s resistanc[...]

Gloss ar y AT-MIO-1 6X User Manu al G -24 © Natio nal Inst rument s Corporati on thermistor a semicondu ctor sensor that ex hibits a repeata ble change in elec trical resistan ce as a function of temp erature. Mo st thermistors exhi bit a negat ive temp eratur e coeffic ient. thermoco uple a temperat ure sensor cr eated by joining two dissimilar m[...]

Glossary © Nat ional Instru ments Corpor ation G-25 AT-MIO -16X Us er Manua l update rate the number of output upda tes per second V V volts V DC volts direct curre nt VDMAD virtual DMA driver VI virtual instr ument—( 1) a comb ina tion o f hardw are and/o r softw are elemen ts, typically used with a PC, th at has the funct ionality of a cl assi[...]

Gloss ar y AT-MIO-1 6X User Manu al G -26 © Natio nal Inst rument s Corporati on word the sta ndard numb er of bits that a proc essor or me m ory manipula tes at one time. Micr oprocess ors typically use 8, 16, or 32-b it words. working v oltag e the high est voltage that should be app lied to a p roduc t in norma l use, normally we ll under the b[...]

© Nati onal Instrum ents Corporat ion I-1 AT - MIO-16X User Manual Index Numb ers +5 V signal desc ri ption (table) , 2-17, B-5 power connecti ons, 2-32 t o 2-33 A A2DRV bit descr ip t io n, 4-10 RTSI sw itch sign a l conne c tions, 5- 38 to 5-39 A2RCV b it descr ip t io n, 4-10 RTSI sw itch signal c onnectio ns, 5-38 to 5-39 A4DRV bit desc ripti [...]

Index AT-MIO-16X User Manual I-2 © Natio nal Inst rument s Corporati on ADCDSP bit, 4-13 ADCFIFOEF* bit descr ip t io n, 4-26 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 reading sin gle conversion result, 5-7 servici ng data acquisitio n operation, 5-22 ADCFIFOHF* bit descr ip t io n, 4-26 DMA op e rations , 5-41 inter r up t pro gram[...]

Inde x © Nati onal Instrum ents Corporat ion I-3 AT - MIO-16X User Manual NRSE input , 2-9 to 2-10 RSE i nput, 2-9 common-mo de signal r ejectio n, 2-29 considerations for selectin g input ranges, 2-10 different ial connections DIFF inp ut configur ation, 2-22 float ing sign al sources , 2-24 to 2-26 ground- referenced sign al sourc e s, 2-23 nonr[...]

Index AT-MIO-16X User Manual I-4 © Natio nal Inst rument s Corporati on analog output specifications differential nonlinearity , A-8 gain e r ror, A-7 list of, A -6 to A -7 offset error, A-7 relative accuracy, A-7 AOGND signal analog out put connections , 2-30 desc ri ption (table) , 2-17, B-4 AT-MIO-16X. See also specifications; theory of oper at[...]

Inde x © Nati onal Instrum ents Corporat ion I-5 AT - MIO-16X User Manual CH_GAIN<2..0>, 4 -37 to 4-38 CLKMODEB<1..0>, 4 -20 to 4-21 CNT32/1 6*, 4-7 to 4 -8, 5-18, 5 -19 CYCLICS TOP, 3-22, 4 -23, 5-26 D<15..0>, 4- 44, 4-45, 4-65 DAC 0D SP, 4- 21 DAC0REQ, 4-1 8 to 4-19 DAC 1D SP, 4- 21 DAC1REQ, 4-18 DACCMPLINT, 4-14 DAC CO MP, 4 -[...]

Index AT-MIO-16X User Manual I-6 © Natio nal Inst rument s Corporati on Confi guration Memo ry Depth Fi eld (figur e), 6-5 EEPROM map, 6-2 factory area inf ormation (table), 6-2 to 6-4 Revis ion and Subrevi sion fi eld (figur e), 6-5 storage area, 6-4 equipmen t requiremen ts, 6-7 to 6-8 input calibrati on, 3-7 to 3-8 output calibratio n, 3-17 to [...]

Inde x © Nati onal Instrum ents Corporat ion I-7 AT - MIO-16X User Manual example switch set tings (figure), 2-3 switch setting s, with base I/O address and address sp ace (table), 2-5 to 2-6 DMA channel select ion, 2-7 interrupt channel s election, 2-7 Confi guration an d Status Register Group, 4-4 to 4-30 Command R egister 1, 4-5 to 4-8 Command [...]

Index AT-MIO-16X User Manual I-8 © Natio nal Inst rument s Corporati on DAC FI FO continuo us cyclic waveform generation, 3-22 to 3- 23 cyclic waveform generati on, 5-26 to 5-27 DAC waveform and circui try tim in g, 3-19 to 3- 22 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 programmed cycle waveform generation , 5-28 to 5- 30 progr a m[...]

Inde x © Nati onal Instrum ents Corporat ion I-9 AT - MIO-16X User Manual descr ip t io n, 4-49 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 DAQ Start Register, 4-50 DAQCMPLINT bit, 4-14 to 4-15 DAQCOMP bit descr ip t io n, 4-25 inter r up t pro gramm ing, 5-43 DAQEN bit continuo us channel s canning da ta acquisition, 5 -11 descr ip t[...]

Index AT-MIO-16X User Manual I- 10 © Natio nal Inst rument s Corporati on descr ip t io n, 2-22 ground- referenced sign al sources , 2-23 nonreferen ced or floating signal sources, 2-24 to 2- 26 recommended configurat ion (tab le), 2-22 single- ended connections , 2-26 to 2-37 float ing signal sources (RSE) , 2-27 grounded signal s ources (NRSE), [...]

Inde x © Nati onal Instrum ents Corporat ion I-11 A T- MIO-16X User Manual programmin g DMA operations, 5 -42 DMATCB Clear Register clearing analog outpu t circuitry, 5-32 descr ip t io n, 4-60 inter r up t pro gramm ing, 5-43 programmin g DMA operations, 5 -41 DMATCINT bit, 4-14 documentation convent ions used in manual, xvi organizati on of manu[...]

Index AT-MIO-16X User Manual I- 12 © Natio nal Inst rument s Corporati on F fax an d telephone s upport, D-2 Fax-on- Demand su pport, D-2 field wiring consi derati on s, 2-42 to 2-43 FIFO. See AD C FIFO R egister; DAC FIFO. FIFO/DAC bit, 4-24 floating signal sources descr ip t io n, 2-21 differen tial conn ections, 2- 24 to 2-26 recommended config[...]

Inde x © Nati onal Instrum ents Corporat ion I-13 A T- MIO-16X User Manual I immediat e update mode, 3 -18 input con fi gur at io ns. See also CONFIGMEM Regist er. avail a ble input m o des, 2- 7 to 2-10 DIFF (table), 2-8 NRSE (table), 2-8 RSE (table), 2-8 common-mo de signal r ejectio n, 2-29 different ial connections DIFF inp ut configur ation, [...]

Index AT-MIO-16X User Manual I- 14 © Natio nal Inst rument s Corporati on data acq uisition rates, 3-15 inter val scanning, 3-14 posttr igger dat a acquisi tion tim ing, 3-13 multiple-chann e l scan ning acquisitio n rates specifications, A-5 to A-6 typical settling times (t able), A-5 multiplexer, input. See input multiplexe r. N NI-DAQ driver so[...]

Inde x © Nati onal Instrum ents Corporat ion I-15 A T- MIO-16X User Manual physical specifications, A-9 pin assi gnments. S ee I/O connectors. polarity input polarity and range, 2-10 to 2-11 output polarity selectio n, 2-12 posted up date mode, 3-18 to 3-20 postgain offs et error, analog input circuitry, A-3 posttrigg e r data acq uis ition timing[...]

Index AT-MIO-16X User Manual I- 16 © Natio nal Inst rument s Corporati on R refer ence ca libra tio n, 6- 8 to 6-9 reference selection, analo g output, 2-11 referenced sing le-ended input (RSE ). See RSE (referenced sing le-ended input). regist er-level pr ogramming, 1- 6 regi ste rs ADC Calib ration Regis ter, 4-52 ADC Event Strobe Re gister Grou[...]

Inde x © Nati onal Instrum ents Corporat ion I-17 A T- MIO-16X User Manual descr ip t io n, 4-56 DMA op e rations , 5-41 servici ng update r equests, 5-36 DAC Event Strobe Regi ster Group, 4-53 to 4- 56 DAC Update R egister, 4-55 DAC0 R egist e r descr ip t io n, 4-44 progr a mming analog outpu t circ uit ry, 5- 2 5 DAC1 R egist e r descr ip t io [...]

Index AT-MIO-16X User Manual I- 18 © Natio nal Inst rument s Corporati on RTSI latch, 3-19 RTSI switch defini tion, 3-3 0 programmi ng, 5-39 to 5-43 control pattern (figur e), 5-40 DMA op e rations , 5-41 to 5- 42 inte rrup ts, 5 -43 selecting i nternal up date counter, 5-32 signal conn ecti o ns descr ip tio n, 3-30 progr a mming conside ration s[...]

Inde x © Nati onal Instrum ents Corporat ion I-19 A T- MIO-16X User Manual analog out put, 2-29 to 2-30 digit al I/O, 2- 31 to 2-32 field wiring consi derati on s, 2-42 to 2-43 I/O connector exceeding maximu m ratings (warning ), 2-14 pin assi gnments 50-pin con nector (figure), 2-15, B-2 68-pin con nector (figure), 2-16, B-3 power connecti ons, 2[...]

Index AT-MIO-16X User Manual I- 20 © Natio nal Inst rument s Corporati on programmed cycle waveform generati on, 5-30 pulse d cyclic wa veform g eneratio n, 5-32 STARTDAQ Regi ster, 3-28 Status Register 1 descr iption, 4-25 to 4 -29 servici ng update r equests, 5-36 Status Register 2, 4-30 storage environm ent specifications, A-9 straight binary m[...]

Inde x © Nati onal Instrum ents Corporat ion I-21 A T- MIO-16X User Manual TMRREQ Clear Register clearing analog outpu t circuitry, 5-32 descr ip t io n, 4-54 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 programmin g DMA operations, 5 -41 servici ng update r equests, 5-35 to 5-3 6 TMRREQ signal DAC waveform timing circu itry, 3 -20 int[...]