SMSC LAN1198 Bedienungsanleitung

SMSC AN 12.12 APPLICA TION NOTE Revision 1.0 (12-14-09) AN 12.12 LAN91 18 Family Programmer Reference Guide 1 Introduction This application no te describes how to successfully develop a network device dr iver for LAN91 18 Family products. It covers device features, so ftware design te chniques, network operating system interfaces, and criti cal des[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 2 SMSC AN 12.12 APPLICA TION NOTE  An octet or byte is a group of 8 bits, treated as a single unit, with a value of 0-255 unsigned, or - 127 to +127 signed. A byte is genera lly the smallest unit of data that can be individually ad dressed.  A word or short int is a group of 1[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 3 Revision 1.0 (12-14-09) APPLICA TION NOTE 2.1.2 System Level Block Diagram Figure 2.2 LAN91 18 Family Devi ce System-Level Blo ck-Diagram 2.2 Common Product Family Features  Single chip Ethernet contro ller Fully compliant with I EEE 802.3/802. 3u standards Integrated Ethernet MAC and PH[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 4 SMSC AN 12.12 APPLICA TION NOTE  High-Performance ho st bus interface Simple SRAM-like interface Large, 16Kbyte FIFO memory with adj ustable Tx/Rx allocation Memory Alignment T echnology (MA T) suppo rts interleaved transmit/receive/command/status access One configura ble Host [...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 5 Revision 1.0 (12-14-09) APPLICA TION NOTE 3 Register Description Refer to the LAN91 18 Family datasheets for complete descriptions of the Cont rol and S tatus Registers (CSRs), as well as for descrip tions of register and bit names, nomenclature and attri butes used in this application note[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 6 SMSC AN 12.12 APPLICA TION NOTE 3.1 Directly Addressable Registers These registers are also referre d to as “Slave Registers”. T able 3.1 LAN91 1 8 Family Directly Addressable Register Map OFFSET SYMBOL REGISTER NAME DEFAULT 50h ID_REV Chip IP and Rev 01 1 80001h 54h INT_CFG M[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 7 Revision 1.0 (12-14-09) APPLICA TION NOTE 3.2 MAC Control and St atus Registers The registers listed below are accessed indire ctly thro ugh the MAC_CSR_CMD and MAC_CSR_DA T A Registers. These registers are used in Section 5.1 .2 and Section 5.5 . . 3.3 PHY Registers The PHY registers are a[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 8 SMSC AN 12.12 APPLICA TION NOTE 3.4 Restrictions on Read -Follow-W rite CSR Accesses There are timing restrictions on successive operat ions to some CSRs. These restrictions come into play whenever a write operation to a con trol regist er is followed by a rea d operation from a r[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 9 Revision 1.0 (12-14-09) APPLICA TION NOTE 3.5 Restrictions on Re ad-Follow-Read CSR Accesses There are also restrictions on certain CSR read operations following other read operations. These restrictions arise when a read oper ation has a side-effect that affect s another read operation. In[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 10 SMSC AN 12.12 APPLICA TION NOTE 4 Programming Recommendations The fundamental operations of the driver are initialization, transmit packet processing, receive packet processing, and inte rrupt processing. In ad dition, the dr iver needs to manage link negotiation and interact wit[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 1 1 Revision 1.0 (12-14-09) APPLICA TION NOTE 4.4 Register Functionality in the LAN91 18 Family Devices T able 4.1, "Independent Dat a Threads Register Usage" details the functions of the most important LAN91 18 Family CSRs Note: Notice that both the filt er and link management fu n[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 12 SMSC AN 12.12 APPLICA TION NOTE 4.5 An Example of Concurrency The need of maintaining the ind ependence of th e transmit an d receive packet processing functions has already b een mentioned. For exa mple, suppose that th e transmit thread needs to e xecute operations T0-T9 below [...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 13 Revision 1.0 (12-14-09) APPLICA TION NOTE The first example works because of th e assumption th at only one thre ad will ever write to the flag and signal the SwInt. The SwInt handl er can use the flag to interpret th e requested operation. This is known as a producer-consumer relationship[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 14 SMSC AN 12.12 APPLICA TION NOTE TX_FIFO_INF Read Only . Used in TX thread, in Tx_GetTxS tatusCount, Tx_SendSkb, and Tx_CompleteTx PMT_CTRL Only used during initialization, in Ph y_Initialize GPIO_CFG Only used during ini tialization, in Lan_ Initialize GPT_CFG Not Used GPT_CNT No[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 15 Revision 1.0 (12-14-09) APPLICA TION NOTE 5 Initialization 5.1 MAC Initialization The ID_REV register is a good starting point from which to beg in initialization, in th at it provides a known locatio n in memory cont aining a known value; in the case of a LAN91 18, revision B, the va lue [...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 16 SMSC AN 12.12 APPLICA TION NOTE Besides the MAC address, no other values are automatically loaded to the controller from EEPROM in a reload cycle. 5.1.3.4 Saving the MAC Address to EEPROM A likely scenario during the manufacturing p hase is to fix the MAC address of the host in t[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 17 Revision 1.0 (12-14-09) APPLICA TION NOTE has the bits corresponding with the inte rrupts to be ena bled set to “1”. T o disable specific inte rrupts, AND the contents with a bit-mask which has the bits correspond ing to the interru pts to be disabled set to “0”. Write the modified[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 18 SMSC AN 12.12 APPLICA TION NOTE 5.5 Configuring Addr ess Filtering Options T able 5.2, "Address Filtering Modes" shows the relations betwee n the control flags which affect the address filter mode. 5.5.1 Configuring Multicast Filtering Multicast applications act very mu[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 19 Revision 1.0 (12-14-09) APPLICA TION NOTE 5.6 PHY Detection and Initialization Applications commonly delegate link set-u p to the physical media device (PHY). At initialization, the driver can direct the PHY to determine the link para meters by auto-negotiatin g with its link partner (the [...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 20 SMSC AN 12.12 APPLICA TION NOTE has completed, or else spurious o per ations could result. Setti ng of the CSR Address , R/nW and CSR busy bits can all be do ne with a single write command to the MAC_C SR_CMD Register . When using the MII_ACC register to access the PHY registers,[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 21 Revision 1.0 (12-14-09) APPLICA TION NOTE Figure 5.1 PHY Access Command and Data Pathways The driver can verify the existence of the internal PHY by reading the PHY R egisters 2 and 3 at PHY Address 1 and ensuring the contents are 0x0007 and 0xc0 c1 respecti vely . The existence of e xtern[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 22 SMSC AN 12.12 APPLICA TION NOTE Basic Control Register (index 0) and comple tes when the Auto-negotiate Complete bit (5) is set in the Ba sic St atus Reg ister (index 1). Auto-negotiate Complete status should be available within 1.5 seconds. Beyond this time, the driver can then [...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 23 Revision 1.0 (12-14-09) APPLICA TION NOTE Figure 5.2 The MII Switching Pr ocedure 1. Both the internal PHY and the exte rnal PHY must be placed in a stable state. The TX_CLK and RX_CLKs of both devices must be stable and glit ch-free before the switch can be made. If either device does not[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 24 SMSC AN 12.12 APPLICA TION NOTE 4. The PHY_CLK_SE L field must be set to 10b. This action will disable the MII clocks from the internal and external PHYs to the controller ’s internal logic. 5. The host m ust wait a period of time not less than 5 cycles of the slowest operating[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 25 Revision 1.0 (12-14-09) APPLICA TION NOTE Step Three: Keep reading the MAC_CSR_CMD Regi ster until the CSR Busy Bit =0. Load the MII write command word (MII W/nR == 1) th at is to be written to the MII ACC register into the MAC_CSR_Data register . The command word will write the co ntents [...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 26 SMSC AN 12.12 APPLICA TION NOTE Step s Thre e - Seven: 3. Read the MAC_CSR_CMD Register until the CSR Busy Bit = 0. 4. Write the MAC_CSR_CMD as follows: Busy Bit = 1, R/nW = 1, CSR Addre ss = 0x06. 5. Read the MAC_CSR_CMD Register until the CSR Busy Bit = 0 6. Read the MAC_CSR_Da[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 27 Revision 1.0 (12-14-09) APPLICA TION NOTE 6 T ransmit Packet Processing T ransmitti ng packets i s a straightforward process comp ared with receiving packets; in that the host can efficiently synchronize the entire transmit process wit h the application . In practice though , interrupts ar[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 28 SMSC AN 12.12 APPLICA TION NOTE Last Segment i s also a 1-bit field, marking the data transfer as the end of a sing le packet. T o better understand the use of these last two fields, let’s discuss two popular operating systems that utilize different packet allocation schem es. [...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 29 Revision 1.0 (12-14-09) APPLICA TION NOTE 6.4 Packet T ransfer Completion: Manageme nt St atistics Once a data packet has been transferred into the T X_Data_FIFO , most protocol stacks have no need for the sending thread to acknowledge the transfer result; the upper protocol layers are exp[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 30 SMSC AN 12.12 APPLICA TION NOTE 6.5 T ransmit Packet Examples Let’s take a look at T able 6.2, "T ransmit Packet Example" , which shows a 78-byte (0x4e) transmit packet used in the example, which begins at location 0xb4002013 in physical memory . In this case, it happ[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 31 Revision 1.0 (12-14-09) APPLICA TION NOTE Keep in mind that this example is running in a Little Endian environment. T o begin the transfer sequence, write the two command word s as DWORDs, followed by th e packet data. Since th e transfer is aligned on 4-byte boundaries, the data transfe r[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 32 SMSC AN 12.12 APPLICA TION NOTE Figure 6.1 Multiple (3) Buffer Data Single Packet T ransfer Sequence 78-byte Pay load Data Data Transfer s to the LAN911x Data Passed on to the TX Data FIFO 31 0 31 0 31 0 TX Command A Word TX Command B Word 3-byte Data Start Offset 29-byte Pay loa[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 33 Revision 1.0 (12-14-09) APPLICA TION NOTE 6.5.1 T ransmit Command Words for Figure 6.1, "Multiple (3) Buffer Dat a Single Packet T ransfer Sequence" Note: The use of the First Segment and Last Segment flags in the example detailing the head, middle, and tail of the chained transf[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 34 SMSC AN 12.12 APPLICA TION NOTE 6.6 The Overall Pack et T ransmit Process Now that we’ve established a background for transmi tting packets with the device, let’ s look at the diagram in Figure 6.2, "Packet T r ansmission" depicting a packet transmit scheme. This ex[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 35 Revision 1.0 (12-14-09) APPLICA TION NOTE Figure 6.2 Packet T ransmission Once the device is initiali zed, the application can co ntinue sending packets until the first indication appears that the devic e can no longer accept packe ts (since we cannot kn ow the size of the next transmit pa[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 36 SMSC AN 12.12 APPLICA TION NOTE 7 Receive Packet Processing A receive process must signal the host that there ar e incoming packets to be read in, it must identify the validity and length of each i ndividual packet, copy the packet data from device to memory , hand off the pa cke[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 37 Revision 1.0 (12-14-09) APPLICA TION NOTE Figure 7.1 Packet Reception In the F igure 7.1 above we only begin reading packets whenever the RX St atus FIFO cont a ins any entries (see RX_FIFO_INF:RSXUSED ). Then, a s long as we have more packets remaining in the device, we check the individu[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 38 SMSC AN 12.12 APPLICA TION NOTE 7.1 Receive Dat a T ransfer Given that the device makes al l data transfers in DW ORD pieces, the driver can easily align the receiving data memory address to a D WORD boundary . Recall too, that the data transfer length must also be rounded u p wh[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 39 Revision 1.0 (12-14-09) APPLICA TION NOTE : Enabling a receive transfer requires setting up the RX_CFG register , shown in T able 7.4, "Recei ver Configuration Word" below . For thi s example , the RX_CFG: RX Data Offset is given a value of 18 (0x12), which gives the starting ali[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 40 SMSC AN 12.12 APPLICA TION NOTE RX_DA T A_FIFO must be read a n appropriate n umber of DWORDS to purge the miniscule p acket. This should only happe n if the MAC_CR is configur ed to P ASSBAD packets ( == ‘1’). 7.3 Flow Control Function The flow control functi on monitors spa[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 41 Revision 1.0 (12-14-09) APPLICA TION NOTE 8 Instrument ation and Debug This chapter is base d upon the experience gained from the development of the simple Linu x Driver for the LAN91 18 family . It assume s that the driver will have a rich feature set in its run-time en vironment to draw [...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 42 SMSC AN 12.12 APPLICA TION NOTE 8.1.3 SMSC_ASSERT(condition) SMSC_ASSERT points are enabled wh en USE_ASSER T is defined during co mpile time. It has no run time dependency on debug mode. This macro is u sed to test assumptions made when coding. It is useful to ensure consistency[...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 43 Revision 1.0 (12-14-09) APPLICA TION NOTE Figure 8.1 Oscilloscope/Logic Analyzer Dis play GPIOs can also be used with a scope for instrumentat ion. Most scopes provid e a way to measure the time between events. In the trace above, the sco pe could be used to measure the time between the ri[...]

LAN91 18 Family Programmer Reference Guide Revision 1.0 (12-14-09) 44 SMSC AN 12.12 APPLICA TION NOTE Some other useful error interrupts to be aware of include:  TXSO  TDFO  TSFF – TX st atus FIFO full  RSFF – RX status FIFO full 8.5 Integrating the Driver: Early T esting When the driver development h as come to the point wh ere it [...]

LAN91 18 Family Programmer Reference Guide SMSC AN 12.12 45 Revision 1.0 (12-14-09) APPLICA TION NOTE 80 ARKA Y DRIVE, HAU PP AUGE, NY 1 1788 (631) 43 5-6000, FA X (631) 273-3123 Copyright © 200 9 SMSC or its sub sidiaries. All rights reserv ed. Circuit diagrams and o ther information re lati ng to SMSC products are incl uded as a mean s of illust[...]