Texas Instruments TMS320C64X Bedienungsanleitung

TMS320C64x+ DSP Little-Endian DSP Library Programmer ’ s Reference Literature Number: SPRUEB8 February 2006[...]

IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orde[...]

i Read This First Preface Read This First About This Manual This document describes the C64x+ digital signal processor little-endian (DSP) Library , or DSPLIB for short. Notational Conventions This document uses the following conventions: - Hexadecimal numbers are shown with the suffix h. For example, the following number is 40 hexadecimal (decimal[...]

T rademarks ii SPRAA84 — TMS320C64x to TMS320C64+ CPU Migration Guide. Describes migrating from the T exas Instruments TMS320C64x digital signal processor (DSP) to the TMS320C64x+ DSP . The objective of this document is t o indicate dif ferences between the two cores. Functionality in the devices that is identical is not included. Trademarks C600[...]

Contents iii Contents 1 Introduction 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Provides a brief introduction to the TI C64x+ DSPLIBs, shows the organization of the routines contained in the libraries, and lists the features and benefits of the DSPLIB[...]

Contents iv A Performance/Fractional Q Formats A-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Describes performance considerations related to the C64x+ DSPLIB and provides information about the Q format used by DSPLIB functions. A.1 Performance Considerations A-2 . . . . . . . . . . . . . . . . . .[...]

T ables v Contents T ables 2−1 DSPLIB Data T ypes 2-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−1 Argument Conventions 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−2 Adaptive Filtering 3-4 . . [...]

vi[...]

1-1 Introduction This chapter provides a brief introduction to the TI C64x+ DSP Libraries (DSPLIB), shows the organization of the routines contained in the library , and lists the features and benefits of the DSPLIB. T opic Page 1.1 Introduction to the TI C64x+ DSPLIB 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Features and Bene[...]

Introduction to the TI C64x+ DSPLIB 1-2 1.1 Introduction to the TI C64x+ DSPLIB The TI C64x+ DSPLIB is an optimized DSP Function Library for C programmers using devices that include the C64x+ megamodule. It includes many C-callable, assembly-optimized, general-purpose signal-processing routines. These routines are typically used in computationally [...]

Introduction to the TI C64x+ DSPLIB 1-3 Introduction - Filtering and convolution J DSP_fir_cplx J DSP_fir_cplx_hM4X4 J DSP_fir_gen J DSP_fir_gen_hM17_rA8X8 J DSP_fir_r4 J DSP_fir_r8 J DSP_fir_r8_hM16_rM8A8X8 J DSP_fir_sym J DSP_iir - Math J DSP_dotp_sqr J DSP_dotprod J DSP_maxval J DSP_maxidx J DSP_minval J DSP_mul32 J DSP_neg32 J DSP_recip16 J DSP[...]

Features and Benefits 1-4 1.2 Features and Benefits - Hand-coded assembly-optimized routines - C and linear assembly source code - C-callable routines, fully compatible with the TI C6x compiler - Fractional Q.15-format operands supported on some benchmarks - Benchmarks (time and code) - T ested against C model[...]

2-1 Installing and Using DSPLIB This chapter provides information on how to install and rebuild the TI C64x+ DSPLIB. T opic Page 2.1 How to Install DSPLIB 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Using DSPLIB 2-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

How to Install DSPLIB 2-2 2.1 How to Install DSPLIB Note: Y ou should read the README.txt file for specific details of the release. Th e DSPLIB is provided in the file dsp64plus.zip. The file must be unzipped to provide the following directory structure: dsp | +−−README.txt Top−level README file | +−−docs library documentation | +−−ex[...]

Using DSPLIB 2-3 Installing and Using DSPLIB 2.2 Using DSPLIB 2.2.1 DSPLIB Arguments and Data T ypes 2.2.1.1 DSPLIB T ypes T able 2−1 shows the data types handled by the DSPLIB. T able 2−1. DSPLIB Data T ypes Name Size (bits) T ype Minimum Maximum short 16 integer −32768 32767 int 32 integer −2147483648 2147483647 long 40 integer −5497558[...]

Using DSPLIB 2-4 2.2.2 Calling a DSPLIB Function From C In addition to correctly installing the DSPLIB software, follow these steps to include a DSPLIB function in the code: - Include the function header file corresponding to the DSPLIB function - Link the code with dsp64plus.lib - Use a correct linker command file for the platform used. The exampl[...]

How to Rebuild DSPLIB 2-5 Installing and Using DSPLIB 2.2.6 Interrupt Behavior of DSPLIB Functions All of the functions in this library are designed to be used in systems with interrupts. Thus, it is not necessary to disable interrupts when calling any of these functions. The functions in the library will disable interrupts as needed t o protect th[...]

2-6[...]

3-1 DSPLIB Function T ables This chapter provides tables containing all DSPLIB functions, a brief description of each, and a page reference for more detailed information. T opic Page 3.1 Arguments and Conventions Used 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 DSPLIB Functions 3-3 . . . . . . . . . . . . . . . . . . . . . . .[...]

Arguments and Conventions Used 3-2 3.1 Arguments and Conventions Used The following convention has been used when describing the arguments for each individual function: T able 3−1. Argument Conventions Argument Description x,y Argument reflecting input data vector r Argument reflecting output data vector nx,ny ,nr Arguments reflecting the size of[...]

DSPLIB Functions 3-3 DSPLIB Function T ables 3.2 DSPLIB Functions The routines included in the DSP library are organized into eight functional categories and listed below in alphabetical order . - Adaptive filtering - Correlation - FFT - Filtering and convolution - Math - Matrix functions - Miscellaneous - Obsolete functions[...]

DSPLIB Function T ables 3-4 3.3 DSPLIB Function T ables T able 3−2. Adaptive Filtering Functions Description Page long DSP_firlms2(short *h, short *x, short b, int nh) LMS FIR 4-2 T able 3−3. Correlation Functions Description Page void DSP_autocor(short *r ,short *x, int nx, int nr) Autocorrelation 4-4 void DSP_autocor_rA8(short *r ,short *x, i[...]

DSPLIB Function T ables 3-5 DSPLIB Function T ables T able 3−4. FFT (Continued) Functions Page Description void DSP_ifft16x16(short *w , int nx, short *x, short *y) Complex out of place, Inverse FFT mixed radix with digit reversal. Input/Output data in Re/Im order . 4-28 void DSP_ifft16x16_imre(short *w , int nx, short *x, short *y) Complex out o[...]

DSPLIB Function T ables 3-6 T able 3−5. Filtering and Convolution (Continued) Functions Page Description void DSP_iir(short *r1, short *x, short *r2, short *h2, short *h1, int nr) IIR with 5 Coefficients 4-54 void DSP_iirlat(short *x, int nx, short *k, int nk, int *b, short *r) All−pole IIR Lattice Filter 4-56 T able 3−6. Math Functions Descr[...]

DSPLIB Function T ables 3-7 DSPLIB Function T ables T able 3−8. Miscellaneous Functions Description Page short DSP_bexp(int *x, short nx) Max Exponent of a V ector (for scaling) 4-76 void DSP_blk_eswap16(void *x, void *r , int nx) Endian-swap a block of 16-bit values 4-78 void DSP_blk_eswap32(void *x, void *r , int nx) Endian-swap a block of 32-b[...]

Differences Between the C64x and C64x+ DSPLIBs 3-8 3.4 Differences Between the C64x and C64x+ DSPLIBs Th e C64x+ DSPLIB was developed by optimizing some of the functions of the C64x DSPLIB to take advantage of the C64x+ architecture. T able 3−10 shows the optimized functions for the C64x+ DSPLIB. There are two optimization types: - SPLOOP convers[...]

Differences Between the C64x and C64x+ DSPLIBs 3-9 DSPLIB Function T ables T able 3−10. Functions Optimized in the C64x+ DSPLIB (Continued) Function Optimization T ype C64x+ Optimized DSP_fir_cplx_hM4X4 Ye s Kernel re−design, SPLOOP Optimization resulted in new requirements. New name is used. DSP_fir_gen No DSP_fir_gen_hM17_rA8X8 Y es Kernel re[...]

Differences Between the C64x and C64x+ DSPLIBs 3-10 T able 3−10. Functions Optimized in the C64x+ DSPLIB (Continued) Function Optimization T ype C64x+ Optimized DSP_blk_eswap16 No DSP_blk_eswap32 No DSP_blk_move Y es SPLOOP conversion DSP_fltoq15 No DSP_minerror No DSP_q15tofl No DSP_bitrev_cplx No Obsolete DSP_radix2 No Obsolete DSP_r4fft No Obs[...]

4-1 DSPLIB Reference This chapter provides a list of the functions within the DSP library (DSPLIB) organized into functional categories. The functions within each category are listed in alphabetical order and include arguments, descriptions, algorithms, benchmarks, and special requirements. T opic Page 4.1 Adaptive Filtering 4-2 . . . . . . . . . .[...]

DSP_firlms2 4-2 4.1 Adaptive Filtering LMS FIR DSP_firlms2 Function long DSP_firlms2(short * restrict h, const short * restrict x, short b, int nh) Arguments h[nh] Coefficient Array x[nh+1] Input Array b Error from previous FIR nh Number of coefficients. Must be multiple of 4. return long Return value Description The Least Mean Square Adaptive Filt[...]

DSP_firlms2 4-3 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - The loop is unrolled 4 times. Benchmarks Cycles 3 * nh/4 + 17 Codesize 148 bytes[...]

DSP_autocor 4-4 4.2 Correlation AutoCorrelation DSP_autocor Function void DSP_autocor(short * restrict r , const short * restrict x, int nx, int nr) Arguments r[nr] Output array x[nx+nr] Input array . Must be double-word aligned. nx Length of autocorrelation. Must be a multiple of 8. nr Number of lags. Must be a multiple of 4. Description This rout[...]

DSP_autocor 4-5 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - The inner loop is unrolled 8 times. - The outer loop is unrolled 4 times. - Th e outer loop is conditionally executed in parallel with the inner loop. This allows for a z[...]

DSP_autocor_rA8 4-6 AutoCorrelation DSP_autocor_rA8 Function void DSP_autocor_rA8(short * restrict r , const short * restrict x, int nx, int nr) Arguments r[nr] Output array , Must be double word aligned. x[nx+nr] Input array . Must be double-word aligned. nx Length of autocorrelation. Must be a multiple of 8. nr Number of lags. Must be a multiple [...]

DSP_autocor_rA8 4-7 C64x+ DSPLIB Reference Benchmarks Cycles nx<40: 6*nr+ 20 nx>=40: nx*nr/8 + 2*nr + 20 Codesize 304 bytes[...]

DSP_fft16x16 4-8 4.3 FFT Complex Forward Mixed Radix 16 x 16-bit FFT DSP_fft16x16 Function void DSP_f ft16x16(const short * restrict w , int nx, short * restrict x, short * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4 , and 16 ≤ nx ≤ 32768. x[2*nx] Pointer t[...]

DSP_fft16x16 4-9 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is als[...]

DSP_fft16x16 4-10 T o vectorize the FFT , it is desirable to access the twiddle factor array using double word wide loads and fetch the twiddle factors needed. T o do this, a modified twiddle factor array is created, in which the factors WN/4, WN/2, W3N/4 are arranged to be contiguous. This eliminates the separation between twiddle factors within a[...]

DSP_fft16x16_imre 4-1 1 C64x+ DSPLIB Reference Complex Forward Mixed Radix 16 x 16-bit FFT , With Im/Re Order DSP_fft16x16_imre Function void DSP_f ft16x16_imre(const short * restrict w , int nx, short * restrict x, short * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of [...]

DSP_fft16x16_imre 4-12 The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is also a radix-4 transform, otherwise it is a radix-2 transform. The conventional Cooley T ukey FFT is written using three loops. The [...]

DSP_fft16x16_imre 4-13 C64x+ DSPLIB Reference T o vectorize the FFT , it is desirable to access twiddle factor array using double word wide loads and fetch the twiddle factors needed. T o do this, a modified twiddle factor array is created, in which the factors WN/4, WN/2, W3N/4 are arranged to be contiguous. This eliminates the separation between [...]

DSP_fft16x16r 4-14 Complex Forward Mixed Radix 16 x 16-bit FFT With Rounding DSP_fft16x16r Function void DSP_fft16x16r(int nx, short * restrict x, const short * restrict w , const un- signed char * restrict brev , short * restrict y , int radix, int offset, int nmax) Arguments nx Length of FFT in complex samples. Must be power of 2 or 4, and ≤ 16[...]

DSP_fft16x16r 4-15 C64x+ DSPLIB Reference void dft(int n, short x[], short y[]) { int k,i, index; const double PI = 3.14159654; short * p_x; double arg, fx_0, fx_1, fy_0, fy_1, co, si; for(k = 0; k<n; k++) { p_x = x; fy_0 = 0; fy_1 = 0; for(i=0; i<n; i++) { fx_0 = (double)p_x[0]; fx_1 = (double)p_x[1]; p_x += 2; index = (i*k) % n; arg = 2*PI*[...]

DSP_fft16x16r 4-16 The function takes the twiddle factors and input data, and calculates the FFT producing the frequency domain data in the y[ ] array . As the FFT allows every input point to affect every output point, which causes cache thrashing in a cache based system. This is mitigated by allowing the main FFT of size N to be divided into sever[...]

DSP_fft16x16r 4-17 C64x+ DSPLIB Reference DSP_fft16x16r(N, &x[0], &w[0], brev,y,N/4,0, N) DSP_fft16x16r(N/4,&x[0], &w[2*3*N/4],brev,y,rad,0, N) DSP_fft16x16r(N/4,&x[2*N/4], &w[2*3*N/4],brev,y,rad,N/4, N) DSP_fft16x16r(N/4,&x[2*N/2], &w[2*3*N/4],brev,y,rad,N/2, N) DSP_fft16x16r(N/4,&x[2*3*N/4],&w[2*3*N/4],brev[...]

DSP_fft16x16r 4-18 { int i, l0, l1, l2, h2, predj; int l1p1,l2p1,h2p1, tw_offset, stride, fft_jmp; short xt0, yt0, xt1, yt1, xt2, yt2; short si1,si2,si3,co1,co2,co3; short xh0,xh1,xh20,xh21,xl0,xl1,xl20,xl21; short x_0, x_1, x_l1, x_l1p1, x_h2 , x_h2p1, x_l2, x_l2p1; short *x,*w; short *ptr_x0, *ptr_x2, *y0; unsigned int j, k, j0, j1, k0, k1; short[...]

DSP_fft16x16r 4-19 C64x+ DSPLIB Reference x_1 = x[1]; x_h2 = x[h2]; x_h2p1 = x[h2+1]; x_l1 = x[l1]; x_l1p1 = x[l1+1]; x_l2 = x[l2]; x_l2p1 = x[l2+1]; xh0 = x_0 + x_l1; xh1 = x_1 + x_l1p1; xl0 = x_0 − x_l1; xl1 = x_1 − x_l1p1; xh20 = x_h2 + x_l2; xh21 = x_h2p1 + x_l2p1; xl20 = x_h2 − x_l2; xl21 = x_h2p1 − x_l2p1; ptr_x0 = x; ptr_x0[0] = ((sh[...]

DSP_fft16x16r 4-20 ptr_x2[h2p1] = (yt0 * co2 − xt0 * si2 + 0x00008000) >> 16; ptr_x2[l2 ] = (xt2 * co3 + yt2 * si3 + 0x00008000) >> 16; ptr_x2[l2p1] = (yt2 * co3 − xt2 * si3 + 0x00008000) >> 16; } tw_offset += fft_jmp; stride = stride>>2; } /* end while */ j = offset>>2; ptr_x0 = ptr_x; y0 = y; /* determine _norm(n[...]

DSP_fft16x16r 4-21 C64x+ DSPLIB Reference k = (k0 << 6) | k1; if (l0 < 0) k = k << −l0; else k = k >> l0; j++; /* multiple of 4 index */ x0 = ptr_x0[0]; x1 = ptr_x0[1]; x2 = ptr_x0[2]; x3 = ptr_x0[3]; x4 = ptr_x0[4]; x5 = ptr_x0[5]; x6 = ptr_x0[6]; x7 = ptr_x0[7]; ptr_x0 += 8; xh0_0 = x0 + x4; xh1_0 = x1 + x5; xh0_1 = x2 + x6[...]

DSP_fft16x16r 4-22 xl1_1 = x6; xl0_1 = x7; } yt2 = xl0_0 + xl1_1; yt3 = xl1_0 − xl0_1; yt6 = xl0_0 − xl1_1; yt7 = xl1_0 + xl0_1; if (radix == 2) { yt7 = xl1_0 − xl0_1; yt3 = xl1_0 + xl0_1; } y0[k] = yt0; y0[k+1] = yt1; k += n>>1; y0[k] = yt2; y0[k+1] = yt3; k += n>>1; y0[k] = yt4; y0[k+1] = yt5; k += n>>1; y0[k] = yt6; y0[k+[...]

DSP_fft16x16r 4-23 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is[...]

DSP_fft16x32 4-24 Complex Forward Mixed Radix 16 x 32-bit FFT With Rounding DSP_fft16x32 Function void DSP_f ft16x32(const short * restrict w , int nx, int * restrict x, int * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] Pointer[...]

DSP_fft16x32 4-25 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is [...]

DSP_fft32x32 4-26 Complex Forward Mixed Radix 32 x 32-bit FFT With Rounding DSP_fft32x32 Function void DSP_fft32x32(const int * restrict w , int nx, int * restrict x, int * restrict y) Arguments w[2*nx] Pointer to complex 32-bit FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] Pointer [...]

DSP_fft32x32 4-27 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is [...]

DSP_fft32x32s 4-28 Complex Forward Mixed Radix 32 x 32-bit FFT With Scaling DSP_fft32x32s Function void DSP_fft32x32s(const int * restrict w , int nx, int * restrict x, int * restrict y) Arguments w[2*nx] Pointer to complex 32-bit FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] Pointe[...]

DSP_fft32x32s 4-29 C64x+ DSPLIB Reference - The FFT coefficients (twiddle factors) are generated using the program tw_fft32x32 provided in the directory ‘supportfft’. The scale factor must be 1073741823.5. The input data must be scaled by 2 (log2(nx) − ceil[ log4(nx)− 1 ]) to completely prevent overflow . Implementation Notes - Bank Confli[...]

DSP_ifft16x16 4-30 Complex Inverse Mixed Radix 16 x 16-bit FFT With Rounding DSP_ifft16x16 Function void DSP_if ft16x16(const short * restrict w , int nx, short * restrict x, short * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] [...]

DSP_ifft16x16 4-31 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last stage is[...]

DSP_ifft16x16_imre 4-32 Complex Inverse Mixed Radix 16 x 16-bit FFT With Im/Re Order DSP_ifft16x16_imre Function void DSP_if ft16x16_imre(const short * restrict w , int nx, short * restrict x, short * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ?[...]

DSP_ifft16x16_imre 4-33 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The routine uses log 4 (nx) − 1 stages of radix-4 transform and performs either a radix-2 or radix-4 transform on the last stage depending on nx. If nx is a power of 4, then this last sta[...]

DSP_ifft16x32 4-34 Complex Inverse Mixed Radix 16 x 32-bit FFT With Rounding DSP_ifft16x32 Function void DSP_ifft16x32(const short * restrict w , int nx, int * restrict x, int * restrict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] Point[...]

DSP_ifft16x32 4-35 C64x+ DSPLIB Reference - The FFT coefficients (twiddle factors) are generated using the program tw_fft16x32 provided in the directory ‘supportfft’. The scale factor must be 32767.5. No scaling is done with the function; thus the input data must be scaled by 2 log2(nx) to completely prevent overflow . Implementation Notes - B[...]

DSP_ifft32x32 4-36 Complex Inverse Mixed Radix 32 x 32-bit FFT With Rounding DSP_ifft32x32 Function void DSP_ifft32x32(const int * restrict w , int nx, int * restrict x, int * restrict y) Arguments w[2*nx] Pointer to complex 32-bit FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4, and 16 ≤ nx ≤ 32768. x[2*nx] Point[...]

DSP_ifft32x32 4-37 C64x+ DSPLIB Reference - The FFT coefficients (twiddle factors) are generated using the program tw_fft32x32 provided in the directory ‘supportfft’. The scale factor must be 2147483647.5. No scaling is done with the function; thus the input data must be scaled by 2 log2(nx) to completely prevent overflow . Implementation Note[...]

DSP_fir_cplx 4-38 4.4 Filtering and Convolution Complex FIR Filter DSP_fir_cplx Function void DSP_fir_cplx (const short * restrict x, const short * restrict h, short * restrict r , int nh, int nr) Arguments x[2*(nr+nh−1)] Complex input data. x must point to x[2*(nh−1)]. h[2*nh] Complex coefficients (in normal order). r[2*nr] Complex output data[...]

DSP_fir_cplx 4-39 C64x+ DSPLIB Reference Special Requirements - The number of coefficients nh must be a multiple of 2. - The number of output samples nr must be a multiple of 4. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - The outer loop is unrolled 4 ti[...]

DSP_fir_cplx_hM4X4 4-40 Complex FIR Filter DSP_fir_cplx_hM4X4 Function void DSP_fir_cplx _hM4X4(const short * restrict x, const sh ort * restrict h, short * restrict r , int nh, int nr) Arguments x[2*(nr+nh−1)] Complex input data. x must point to x[2*(nh−1)]. h[2*nh] Complex coefficients (in normal order). r[2*nr] Complex output data. nh Number[...]

DSP_fir_cplx_hM4X4 4-41 C64x+ DSPLIB Reference Special Requirements - The number of coefficients nh must be larger or equal to 4 and a multiple of 4. - The number of output samples nr must be a multiple of 4. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is fully interruptible. - The outer loop is unr[...]

DSP_fir_gen 4-42 FIR Filter DSP_fir_gen Function void DSP_fir_gen (const short * restrict x, const short * restrict h, short * restrict r , int nh, int nr) Arguments x[nr+nh−1] Pointer to input array of size nr + nh − 1. h[nh] Pointer to coefficient array of size nh (coef ficients must be in reverse order). r[nr] Pointer to output array of size[...]

DSP_fir_gen 4-43 C64x+ DSPLIB Reference Special Requirements - The number of coefficients, nh, must be greater than or equal to 5. Coefficients must be in reverse order . - The number of outputs computed, nr , must be a multiple of 4 and greater than or equal to 4. - Array r[ ] must be word aligned. Implementation Notes - Bank Conflicts: No bank co[...]

DSP_fir_gen_hM17_rA8X8 4-44 FIR Filter DSP_fir_gen_hM17_rA8X8 Function void DSP_fir_gen_hM17_rA8X8 (const short * restrict x, const short * restrict h, short * restrict r , int nh, int nr) Arguments x[nr+nh−1] Pointer to input array of size nr + nh − 1. h[nh] Pointer to coefficient array of size nh (coef ficients must be in reverse order). r[nr[...]

DSP_fir_gen_hM17_rA8X8 4-45 C64x+ DSPLIB Reference Special Requirements - The number of coefficients, nh, must be greater than or equal to 17. Coefficients must be in reverse order . - The number of outputs computed, nr , must be a multiple of 8 and greater than or equal to 8. - Array r[ ] must be word aligned. Implementation Notes - Bank Conflicts[...]

DSP_fir_r4 4-46 FIR Filter (when the number of coefficients is a multiple of 4) DSP_fir_r4 Function void DSP_fir_r4 (const short * restrict x, co nst short * restrict h, short * restrict r , int nh, int nr) Arguments x[nr+nh−1] Pointer to input array of size nr + nh – 1. h[nh] Pointer to coefficient array of size nh (coef ficients must be in re[...]

DSP_fir_r4 4-47 C64x+ DSPLIB Reference Special Requirements - The number of coefficients, nh, must be a multiple of 4 and greater than or equal to 8. Coefficients must be in reverse order . - The number of outputs computed, nr , must be a multiple of 4 and greater than or equal to 4. Implementation Notes - Bank Conflicts: No bank conflicts occur . [...]

DSP_fir_r8 4-48 FIR Filter (when the number of coefficients is a multiple of 8) DSP_fir_r8 Function void DSP_fir_r8_hM16_rM8A8X8 (short *x, short *h, short *r , int nh, int nr) Arguments x[nr+nh−1] Pointer to input array of size nr + nh – 1. h[nh] Pointer to coefficient array of size nh (coef ficients must be in reverse order). r[nr] Pointer to[...]

DSP_fir_r8 4-49 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interruptible. - The load double-word instruction is used to simultaneously load four values in a single clock cycle. - The inner loop is unrolled 4 times and will always compute a multiple of 4 output samples. - T[...]

DSP_fir_r8_hM16_rM8A8X8 4-50 FIR Filter (the number of coefficients is a multiple of 8) DSP_fir_r8_hM16_rM8A8X8 Function void DSP_fir_r8_hM16_rM8A8X8 (short *x, short *h, short *r , int nh, int nr) Arguments x[nr+nh−1] Pointer to input array of size nr + nh – 1. h[nh] Pointer to coefficient array of size nh (coef ficients must be in reverse ord[...]

DSP_fir_r8_hM16_rM8A8X8 4-51 C64x+ DSPLIB Reference Special Requirements - The number of coefficients, nh, must be a multiple of 8 and greater than or equal to 16. Coefficients must be in reverse order . - The number of outputs computed, nr , must be a multiple of 8 and greater than or equal to 8. - Array r[ ] must be double word aligned. Implement[...]

DSP_fir_sym 4-52 Symmetric FIR Filter DSP_fir_sym Function void DSP_fir_sym (const short * restrict x, const short * restrict h, short * re- strict r , int nh, int nr , int s) Arguments x[nr+2*nh] Pointer to input array of size nr + 2*nh. Must be double-word aligned. h[nh+1] Pointer to coefficient array of size nh + 1. Coef ficients are in normal o[...]

DSP_fir_sym 4-53 C64x+ DSPLIB Reference y0 += (short) (x[j + i] + x[j + 2 * nh − i]) * h[i]; y0 += x[j + nh] * h[nh]; r[j] = (int) (y0 >> s); } } Special Requirements - nh must be a multiple of 8. The number of original symmetric coef ficients is 2*nh+1. Only half (nh+1) are required. - nr must be a multiple of 4. - x[ ] and h[ ] must be do[...]

DSP_iir 4-54 IIR With 5 Coefficients DSP_iir Function void DSP_iir (short * restrict r1, const short * restrict x, short * restrict r2, const short * restrict h2, const short * restrict h1, int nr) Arguments r1[nr+4] Output array (used in actual computation. First four elements must have the previous outputs.) x[nr+4] Input array r2[nr] Output arra[...]

DSP_iir 4-55 C64x+ DSPLIB Reference Special Requirements - nr is greater than or equal to 8. - Input data array x[ ] contains nr + 4 input samples to produce nr output samples. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - Output array r1[ ] contains nr +[...]

DSP_iirlat 4-56 All-Pole IIR Lattice Filter DSP_iirlat Function void DSP_iirlat(const short * restrict x, int nx, const short * restrict k, int nk, int * restrict b, short * restrict r) Arguments x[nx] Input vector (16-bit). nx Length of input vector . k[nk] Reflection coefficients in Q.15 format. nk Number of reflection coefficients/lattice stages[...]

DSP_iirlat 4-57 C64x+ DSPLIB Reference rt = rt − (short)(b[i] >> 15) * k[i]; b[i + 1] = b[i] + (short)(rt >> 15) * k[i]; } b[0] = rt; r[j] = rt >> 15; } } Special Requirements - nk must be >= 4. - No special alignment requirements - See Bank Conflicts for avoiding bank conflicts Implementation Notes - Bank Conflicts: nk shoul[...]

DSP_dotp_sqr 4-58 4.5 Math V ector Dot Product and Square DSP_dotp_sqr Function int DSP_dotp_sqr(int G, const short * restrict x, const short * restrict y , int * restrict r , int nx) Arguments G Calculated value of G (used in the VSELP coder). x[nx] First vector array y[nx] Second vector array r Result of vector dot product of x and y . nx Number [...]

DSP_dotp_sqr 4-59 C64x+ DSPLIB Reference Special Requirements nx must be a multiple of 4 and greater than or equal to 12. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. Benchmarks Cycles nx/2 + 21 Codesize 128[...]

DSP_dotprod 4-60 V ector Dot Product DSP_dotprod Function int DSP_dotprod(const short * restrict x, const short * restrict y , int nx) Arguments x[nx] First vector array . Must be double-word aligned. y[nx] Second vector array . Must be double word-aligned. nx Number of elements of vector . Must be multiple of 4. return int Dot product of x and y .[...]

DSP_dotprod 4-61 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur if the input arrays x[ ] and y[ ] are offset by 4 half-words (8 bytes). - Interruptibility: The code is fully interruptible. - The code is unrolled 4 times to enable full memory and multiplier bandwidth to be utilized. - Interrupts are masked by b[...]

DSP_maxval 4-62 Maximum V alue of V ector DSP_maxval Function short DSP_maxval (const short *x, int nx) Arguments x[nx] Pointer to input vector of size nx. nx Length of input data vector . Must be multiple of 8 and ≥ 32. return short Maximum value of a vector . Description This routine finds the element with maximum value in the input vector and [...]

DSP_maxidx 4-63 C64x+ DSPLIB Reference Index of Maximum Element of V ector DSP_maxidx Function int DSP_maxidx (const short *x, int nx) Arguments x[nx] Pointer to input vector of size nx. Must be double-word aligned. nx Length of input data vector . Must be multiple of 16 and ≥ 48. return int Index for vector element with maximum value. Descriptio[...]

DSP_maxidx 4-64 Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - The code is unrolled 16 times to enable the full bandwidth of LDDW and MAX2 instructions to be utilized. This splits the search into 16 sub-ranges. The global maximum is then found from the lis[...]

DSP_minval 4-65 C64x+ DSPLIB Reference Minimum V alue of V ector DSP_minval Function short DSP_minval (const short *x, int nx) Arguments x [nx] Pointer to input vector of size nx. nx Length of input data vector . Must be multiple of 4 and ≥ 20. return short Maximum value of a vector . Description This routine finds the minimum value of a vector a[...]

DSP_mul32 4-66 32-Bit V ector Multiply DSP_mul32 Function void DSP_mul32(const int * restrict x, const int * restrict y , int * restrict r , short nx) Arguments x[nx] Pointer to input data vector 1 of size nx. Must be double-word aligned. y[nx] Pointer to input data vector 2 of size nx. Must be double-word aligned. r[nx] Pointer to output data vect[...]

DSP_mul32 4-67 C64x+ DSPLIB Reference e+=d; /* Xhigh*Yhigh + */ /* (Xhigh*Ylow+Xlow*Yhigh)>>16 */ *(r++)=e; } } Special Requirements - nx must be a multiple of 8 and greater than or equal to 16. - Input and output vectors must be double-word aligned. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code[...]

DSP_neg32 4-68 32-Bit V ector Negate DSP_neg32 Function void DSP_neg32(int *x, int *r , short nx) Arguments x[nx] Pointer to input data vector 1 of size nx with 32-bit elements. Must be double-word aligned. r[nx] Pointer to output data vector of size nx with 32-bit elements. Must be double-word aligned. nx Number of elements of input and output vec[...]

DSP_recip16 4-69 C64x+ DSPLIB Reference 16-Bit Reciprocal DSP_recip16 Function void DSP_recip16 (short *x, short *rfrac, short *rexp, short nx) Arguments x[nx] Pointer to Q.15 input data vector of size nx. rfrac[nx] Pointer to Q.15 output data vector for fractional values. rexp[nx] Pointer to output data vector for exponent values. nx Number of ele[...]

DSP_recip16 4-70 *(rexp++)=normal−15; /* store exponent */ b=0x80000000; /* dividend = 1 */ for(j=15;j>0;j−−) b=_subc(b,a); /* divide */ b=b&0x7FFF; /* clear remainder /* (clear upper half) */ if(neg) b=−b; /* if originally /* negative, negate */ *(rfrac++)=b; /* store fraction */ } } Special Requirements None Implementation Notes - [...]

DSP_vecsumsq 4-71 C64x+ DSPLIB Reference Sum of Squares DSP_vecsumsq Function int DSP_vecsumsq (const short *x, int nx) Arguments x[nx] Input vector nx Number of elements in x. Must be multiple of 4 and ≥ 8. return int Sum of the squares Description This routine returns the sum of squares of the elements contained in the vector x[ ]. Algorithm Th[...]

DSP_w_vec 4-72 Weighted V ector Sum DSP_w_vec Function void DSP_w_vec(const short * restrict x, const short * restrict y , short m, short * restrict r , short nr) Arguments x[nr] V ector being weighted. Must be double-word aligned. y[nr] Summation vector . Must be double-word aligned. m Weighting factor r[nr] Output vector nr Dimensions of the vect[...]

DSP_mat_mul 4-73 C64x+ DSPLIB Reference 4.6 Matrix Matrix Multiplication DSP_mat_mul Function void DSP_mat_mul(const short * restrict x, int r1, int c1, const short * restrict y , int c2, short * restrict r , int qs) Arguments x [r1*c1] Pointer to input matrix of size r1*c1. r1 Number of rows in matrix x. c1 Number of columns in matrix x. Also numb[...]

DSP_mat_mul 4-74 for (i = 0; i < r1; i++) for (j = 0; j < c2; j++) { sum = 0; for (k = 0; k < c1; k++) sum += x[k + i*c1] * y[j + k*c2]; r[j + i*c2] = sum >> qs; } } Special Requirements - The arrays x[], y[], and r[] are stored in distinct arrays. That is, in-place processing is not allowed. - The input matrices have minimum dimensi[...]

DSP_mat_trans 4-75 C64x+ DSPLIB Reference Matrix T ranspose DSP_mat_trans Function void DSP_mat_trans (const short *x, short rows, short columns, short *r) Arguments x[rows*columns] Pointer to input matrix. rows Number of rows in the input matrix. Must be a multiple of 4. columns Number of columns in the input matrix. Must be a multiple of 4. r[col[...]

DSP_bexp 4-76 4.7 Miscellaneous Block Exponent Implementation DSP_bexp Function short DSP_bexp(const int *x, short nx) Arguments x[nx] Pointer to input vector of size nx. Must be double-word aligned. nx Number of elements in input vector . Must be multiple of 8. return short Return value is the maximum exponent that may be used in scaling. Descript[...]

DSP_bexp 4-77 C64x+ DSPLIB Reference Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. Benchmarks Cycles nx/2 + 21 Codesize 216 bytes[...]

DSP_blk_eswap16 4-78 Endian-Swap a Block of 16-Bit V alues DSP_blk_eswap16 Function void blk_eswap16(void * restrict x, void * restrict r , int nx) Arguments x [nx] Source data. Must be double-word aligned. r [nx] Destination array . Must be double-word aligned. nx Number of 16-bit values to swap. Must be multiple of 8. Description Th e data in the[...]

DSP_blk_eswap16 4-79 C64x+ DSPLIB Reference Special Requirements - Input and output arrays do not overlap, except when “r == NULL” so that the operation occurs in-place. - The input array and output array are expected to be double-word aligned, and a multiple of 8 half-words must be processed. Implementation Notes - Bank Conflicts: No bank conf[...]

DSP_blk_eswap32 4-80 Endian-Swap a Block of 32-Bit V alues DSP_blk_eswap32 Function void blk_eswap32(void * restrict x, void * restrict r , int nx) Arguments x [nx] Source data. Must be double-word aligned. r [nx] Destination array . Must be double-word aligned. nx Number of 32-bit values to swap. Must be multiple of 4. Description Th e data in the[...]

DSP_blk_eswap32 4-81 C64x+ DSPLIB Reference t2 = _x[i*4 + 1]; t3 = _x[i*4 + 0]; _r[i*4 + 0] = t0; _r[i*4 + 1] = t1; _r[i*4 + 2] = t2; _r[i*4 + 3] = t3; } } Special Requirements - Input and output arrays do not overlap, except where “r == NULL” so that the operation occurs in-place. - The input array and output array are expected to be double-wo[...]

DSP_blk_eswap64 4-82 Endian-Swap a Block of 64-Bit V alues DSP_blk_eswap64 Function void blk_eswap64(void * restrict x, void * restrict r , int nx) Arguments x[nx] Source data. Must be double-word aligned. r[nx] Destination array . Must be double-word aligned. nx Number of 64-bit values to swap. Must be multiple of 2. Description Th e data in the x[...]

DSP_blk_eswap64 4-83 C64x+ DSPLIB Reference t2 = _x[i*8 + 5]; t3 = _x[i*8 + 4]; t4 = _x[i*8 + 3]; t5 = _x[i*8 + 2]; t6 = _x[i*8 + 1]; t7 = _x[i*8 + 0]; _r[i*8 + 0] = t0; _r[i*8 + 1] = t1; _r[i*8 + 2] = t2; _r[i*8 + 3] = t3; _r[i*8 + 4] = t4; _r[i*8 + 5] = t5; _r[i*8 + 6] = t6; _r[i*8 + 7] = t7; } } Special Requirements - Input and output arrays do [...]

DSP_blk_move 4-84 Block Move (Overlapping) DSP_blk_move Function void DSP_blk_move(short * x, short * r , int nx) Arguments x [nx] Block of data to be moved. r [nx] Destination of block of data. nx Number of elements in block. Must be multiple of 8 and ≥ 32. Description This routine moves nx 16-bit elements from one memory location pointed to by [...]

DSP_fltoq15 4-85 C64x+ DSPLIB Reference Float to Q15 Conversion DSP_fltoq15 Function void DSP_fltoq15 (float *x, short *r , short nx) Arguments x[nx] Pointer to floating-point input vector of size nx. x should contain the numbers normalized between [−1,1). r[nx] Pointer to output data vector of size nx containing the Q.15 equivalent of vector x. [...]

DSP_fltoq15 4-86 Implementation Notes - Loop is unrolled twice. - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. Benchmarks Cycles 3 * nx/2 + 14 Codesize 224 bytes[...]

DSP_minerror 4-87 C64x+ DSPLIB Reference Minimum Energy Error Search DSP_minerror Function int minerror (const short * restrict GSP0_T ABLE, const short * restrict errCoefs, int * restrict max_index) Arguments GSP0_T ABLE[9*256] GSP0 terms array . Must be double-word aligned. errCoefs[9] Array of error coefficients. max_index Pointer to GSP0_T ABLE[...]

DSP_minerror 4-88 Special Requirements Array GSP0_T ABLE[] must be double-word aligned. Implementation Notes - Bank Conflicts: No bank conflicts occur . - Interruptibility: The code is interrupt-tolerant but not interruptible. - The load double-word instruction is used to simultaneously load four values in a single clock cycle. - The inner loop is [...]

DSP_q15tofl 4-89 C64x+ DSPLIB Reference Q15 to Float Conversion DSP_q15tofl Function void DSP_q15tofl (short *x, float *r , int nx) Arguments x[nx] Pointer to Q.15 input vector of size nx. r[nx] Pointer to floating-point output data vector of size nx containing the floating-point equivalent of vector x. nx Length of input and output data vectors. M[...]

DSP_bitrev_cplx 4-90 4.8 Obsolete Functions 4.8.1 FFT Complex Bit-Reverse DSP_bitrev_cplx NOTE: This function is provided for backward compatibility with the C62x DSPLIB. It has not been optimized for the C64x architecture. Y ou are advised to use one of the newly added FFT functions which have been optimized for the C64x. Function void DSP_bitrev_[...]

DSP_bitrev_cplx 4-91 C64x+ DSPLIB Reference int nbits, nbot, ntop, ndiff, n2, halfn; short *xs = (short *) x; nbits = 0; i = nx; while (i > 1){ i = i >> 1; nbits++;} nbot = nbits >> 1; ndiff = nbits & 1; ntop = nbot + ndiff; n2 = 1 << ntop; mask = n2 − 1; halfn = nx >> 1; for (i0 = 0; i0 < halfn; i0 += 2) { b = i[...]

DSP_bitrev_cplx 4-92 if (t){x[i3] = xj3; x[j3] = xi3;} } } Special Requirements - nx must be a power of 2. - The array index[] is generated by the routine bitrev_index provided in the directory ‘supportfft’. - If nx ≤ 4K, you can use the char (8-bit) data type for the “index” variable. This requires changing the LDH when loading index va[...]

DSP_radix2 4-93 C64x+ DSPLIB Reference Complex Forward FFT (radix 2) DSP_radix2 NOTE: This function is provided for backward compatibility with the C62x DSPLIB. It has not been optimized for the C64x architecture. Y ou are advised to use one of the newly added FFT functions which have been optimized for the C64x. Function void DSP_radix2 (int nx, s[...]

DSP_radix2 4-94 xt = x[2*l] − x[2*i]; x[2*i] = x[2*i] + x[2*l]; yt = x[2*l+1] − x[2*i+1]; x[2*i+1] = x[2*i+1] + x[2*l+1]; x[2*l] = (c*xt + s*yt)>>15; x[2*l+1] = (c*yt − s*xt)>>15; } } ie = ie<<1; } } Special Requirements - 2 ≤ nx ≤ 32768 (nx is a power of 2) - Input x and coefficients w should be in dif ferent data secti[...]

DSP_r4fft 4-95 C64x+ DSPLIB Reference Complex Forward FFT (radix 4) DSP_r4fft NOTE: This function is provided for backward compatibility with the C62x DSPLIB. It has not been optimized for the C64x architecture. Y ou are advised to use one of the newly added FFT functions which have been optimized for the C64x. Function void DSP_r4fft (int nx, shor[...]

DSP_r4fft 4-96 si1 = w[ia1 * 2]; co2 = w[ia2 * 2 + 1]; si2 = w[ia2 * 2]; co3 = w[ia3 * 2 + 1]; si3 = w[ia3 * 2]; ia1 = ia1 + ie; for (i0 = j; i0 < nx; i0 += n1) { i1 = i0 + n2; i2 = i1 + n2; i3 = i2 + n2; r1 = x[2 * i0] + x[2 * i2]; r2 = x[2 * i0] − x[2 * i2]; t = x[2 * i1] + x[2 * i3]; x[2 * i0] = r1 + t; r1 = r1 − t; s1 = x[2 * i0 + 1] + x[...]

DSP_r4fft 4-97 C64x+ DSPLIB Reference >>15; x[2 * i3 + 1] = (s2 * co3−r2 * si3)>>15; } } ie <<= 2; } } Special Requirements - 4 ≤ nx ≤ 65536 (nx a power of 4) - x is aligned on a 4*nx byte boundary for circular buffering - Input x and coefficients w should be in dif ferent data sections or memory spaces to eliminate memory b[...]

DSP_fft 4-98 Complex Forward FFT With Digital Reversal DSP_fft Function void DSP_fft (const short * restrict w , int nx, short * restrict x, short * restrict y) Arguments w[2*nx] Pointer to vector of Q.15 FFT coefficients of size 2 * nx elements. Must be double-word aligned. nx Number of complex elements in vector x. Must be a power of 4 and 4 ≤ [...]

DSP_fft 4-99 C64x+ DSPLIB Reference #include <stdio.h> #include <stdlib.h> #if 0 # define DIG_REV(i, m, j) ((j) = (_shfl(_rotl(_bitr(_deal(i)), 16)) >> (m))) #else # define DIG_REV(i, m, j) do { unsigned _ = (i); _ = ((_ & 0x33333333) << 2) | ((_ & ~0x33333333) >> 2); _ = ((_ & 0x0F0F0F0F) << [...]

DSP_fft 4-100 _nassert((int)x % 8 == 0); _nassert((int)y % 8 == 0); _nassert((int)w % 8 == 0); _nassert(n >= 16); _nassert(n < 32768); #endif /* −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft 4-101 C64x+ DSPLIB Reference { #ifndef NOASSUME _nassert(i % 4 == 0); _nassert(s >= 4); #pragma MUST_ITERATE(2,,2); #endif for (j = 0; j < s; j += 2) { for (k = 0; k < 2; k++) { short w1c, w1s, w2c, w2s, w3c, w3s; short x0r, x0i, x1r, x1i, x2r, x2i, x3r, x3i; short y0r, y0i, y1r, y1i, y2r, y2i, y3r, y3i; /* −−−−−−−−[...]

DSP_fft 4-102 /* the stride between the elements as follows: */ /* x(n), x(n + s), x(n + 2*s), x(n + 3*s). */ /* */ /* These four inputs are used to calculate four outputs */ /* as shown below: */ /* */ /* X(4k) = x(n) + x(n + N/4) + x(n + N/2) + x(n + 3N/4) */ /* X(4k+1)= x(n) −jx(n + N/4) − x(n + N/2) +jx(n + 3N/4) */ /* X(4k+2)= x(n) − x(n[...]

DSP_fft 4-103 C64x+ DSPLIB Reference xl1 = x0i − x2i; xl20 = x1r − x3r; xl21 = x1i − x3i; xt0 = xh0 + xh20; yt0 = xh1 + xh21; xt1 = xl0 + xl21; yt1 = xl1 − xl20; xt2 = xh0 − xh20; yt2 = xh1 − xh21; xt3 = xl0 − xl21; yt3 = xl1 + xl20; /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft 4-104 /* −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− */ /* Offset to next subtable of twiddle factors. With each iteration */ /* of the above block, six twiddle factors get read, s times, */ /*[...]

DSP_fft 4-105 C64x+ DSPLIB Reference x0r = x[2*(i + 0) + 0]; x0i = x[2*(i + 0) + 1]; x1r = x[2*(i + 1) + 0]; x1i = x[2*(i + 1) + 1]; x2r = x[2*(i + 2) + 0]; x2i = x[2*(i + 2) + 1]; x3r = x[2*(i + 3) + 0]; x3i = x[2*(i + 3) + 1]; /* −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft 4-106 Special Requirements - In-place computation is not allowed. - nx must be a power of 4 and 4 ≤ nx ≤ 65536. - Input x[ ] and output y[ ] are stored on double-word aligned boundaries. - Input data x[ ] is stored in the order real0, img0, real1, img1, ... - The FFT coefficients (twiddle factors) must be double-word aligned and are gen[...]

DSP_fft16x16t 4-107 C64x+ DSPLIB Reference Complex Forward Mixed Radix 16- x 16-Bit FFT With T runcation DSP_fft16x16t Function void DSP_f ft16x16t(const short * restrict w , int nx, short * restrict x, short * re- strict y) Arguments w[2*nx] Pointer to complex Q.15 FFT coefficients. nx Length of FFT in complex samples. Must be power of 2 or 4 , an[...]

DSP_fft16x16t 4-108 # define DIG_REV(i, m, j) ((j) = (_shfl(_rotl(_bitr(_deal(i)), 16)) >> (m))) #else # define DIG_REV(i, m, j) do { unsigned _ = (i); _ = ((_ & 0x33333333) << 2) | ((_ & ~0x33333333) >> 2); _ = ((_ & 0x0F0F0F0F) << 4) | ((_ & ~0x0F0F0F0F) >> 4); _ = ((_ & 0x00FF00FF) <[...]

DSP_fft16x16t 4-109 C64x+ DSPLIB Reference /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ /* Determine the magnitude od the number of points to be transformed. */ /* Check whether we ca[...]

DSP_fft16x16t 4-1 10 /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ /* Set up offsets to access ”N/4”, ”N/2”, ”3N/4” complex point or */ /* ”N/2”, ”N”, ”3N/2” half word */ /[...]

DSP_fft16x16t 4-1 1 1 C64x+ DSPLIB Reference /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−*/ co10 = w[j+1]; si10 = w[j+0]; co11 = w[j+3]; si11 = w[j+2]; co20 = w[j+5]; si20 = w[j+4]; co21 = w[j+7]; si21 = w[j+6]; [...]

DSP_fft16x16t 4-1 12 xl0_1 = x_2 − x_l1_2; xl1_1 = x_3 − x_l1_3; xh20_0 = x_h2_0 + x_l2_0; xh21_0 = x_h2_1 + x_l2_1; xh20_1 = x_h2_2 + x_l2_2; xh21_1 = x_h2_3 + x_l2_3; xl20_0 = x_h2_0 − x_l2_0; xl21_0 = x_h2_1 − x_l2_1; xl20_1 = x_h2_2 − x_l2_2; xl21_1 = x_h2_3 − x_l2_3; /*−−−−−−−−−−−−−−−−−−−−−[...]

DSP_fft16x16t 4-1 13 C64x+ DSPLIB Reference /* y0i = x0i + x2i + x1i + x3i = xh1 + xh21 */ /* y1r = x0r − x2r + (x1i − x3i) = xl0 + xl21 */ /* y1i = x0i − x2i − (x1r − x3r) = xl1 − xl20 */ /* y2r = x0r + x2r − (x1r + x3r) = xh0 − xh20 */ /* y2i = x0i + x2i − (x1i + x3i = xh1 − xh21 */ /* y3r = x0r − x2r − (x1i − x3i) = xl0[...]

DSP_fft16x16t 4-1 14 x2[h2+1] = (co10 * yt1_0 − si10 * xt1_0) >> 15; x2[h2+2] = (si11 * yt1_1 + co11 * xt1_1) >> 15; x2[h2+3] = (co11 * yt1_1 − si11 * xt1_1) >> 15; x2[l1 ] = (si20 * yt0_0 + co20 * xt0_0) >> 15; x2[l1+1] = (co20 * yt0_0 − si20 * xt0_0) >> 15; x2[l1+2] = (si21 * yt0_1 + co21 * xt0_1) >> 15; [...]

DSP_fft16x16t 4-1 15 C64x+ DSPLIB Reference } else { y1 = y0 + (int) (npoints >> 1); y3 = y2 + (int) (npoints >> 1); l1 = norm + 2; j0 = 4; n0 = npoints >> 2; } /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft16x16t 4-1 16 xl0_1 = x_2 − x_6; xl1_1 = x_3 − x_7; n00 = xh0_0 + xh0_1; n01 = xh1_0 + xh1_1; n10 = xl0_0 + xl1_1; n11 = xl1_0 − xl0_1; n20 = xh0_0 − xh0_1; n21 = xh1_0 − xh1_1; n30 = xl0_0 − xl1_1; n31 = xl1_0 + xl0_1; if (radix == 2) { /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft16x16t 4-1 17 C64x+ DSPLIB Reference if (radix == 2) { n02 = x_8 + x_a; n03 = x_9 + x_b; n22 = x_8 − x_a; n23 = x_9 − x_b; n12 = x_c + x_e; n13 = x_d + x_f; n32 = x_c − x_e; n33 = x_d − x_f; } /*−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−?[...]

DSP_fft16x16t 4-1 18 Special Requirements - In-place computation is not allowed. - The size of the FFT , nx, must be power of 2 or 4, and 16 ≤ nx ≤ 32768. - The arrays for the complex input data x[ ], complex output data y[ ], and twiddle factors w[ ] must be double-word aligned. - The input and output data are complex, with the real/imaginary [...]

DSP_fft16x16t 4-1 19 C64x+ DSPLIB Reference The following statements can be made based on above observations: 1) Inner loop “i0” iterates a variable number of times. In particular , the number of iterations quadruples every time from 1..N/4. Hence, software pipelining a loop that iterates a variable number of times is not profitable. 2) Outer l[...]

DSP_fft16x16t 4-120 There is one slight break in the flow of packed processing. The real part of the complex number is in the lower half, and the imaginary part is in the upper half. The flow breaks for “xl0” and “xl1” because in this case the real part needs to be combined with the imaginary part because of the multiplication by “j”. T[...]

A-1 Appendix A Performance/Fractional Q Formats This appendix describes performance considerations related to the C64x+ DSPLIB and provides information about the Q format used by DSPLIB functions. T opic Page A.1 Performance Considerations A-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.2 Fractional Q Formats A-3 . . . .[...]

Performance Considerations A-2 A.1 Performance Considerations The ceil( ) is used in some benchmark formulas to accurately describe the number of cycles. It returns a number rounded up, away from zero, to the nearest integer . For example, ceil(1.1) returns 2. Although DSPLIB can be used as a first estimation of processor performance for a specific[...]

Fractional Q Formats A-3 Performance/Fractional Q Formats A.2 Fractional Q Formats Unless specifically noted, DSPLIB functions use Q15 format, or to be more exact, Q0.15. In a Q m . n format, there are m bits used to represent the two’s complement integer portion of the number , and n bits used to represent the two’s complement fractional porti[...]

Fractional Q Formats A-4 A.2.3 Q.31 Format Q.31 format spans two 16-bit memory words. The 16-bit word stored in the lower memory location contains the 16 least significant bits, and the higher memory location contains the most significant 15 bits and the sign bit. The approximate allowable range of numbers in Q.31 representation is (−1,1) and the[...]

B-1 Appendix A Software Updates and Customer Support This appendix provides information about software updates and customer support. T opic Page B.1 DSPLIB Software Updates B-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.2 DSPLIB Customer Support B-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

DSPLIB Software Updates B-2 B.1 DSPLIB Software Updates C64x DSPLIB software updates may be periodically released incorporating product enhancements and fixes as they become available. Y ou should read the README.TXT available in the root directory of every release. B.2 DSPLIB Customer Support If you have questions or want to report problems or sug[...]

C-1 Appendix A Glossary A address: The location of program code or data stored; an individually accessible memory location. A-law companding: See compress and expand (compand) . API: See application programming interface. application programming interface (API): Used for proprietary application programs to interact with communications software or t[...]

Glossary C-2 board support library (BSL): The BSL is a set of application programming interfaces (APIs) consisting of target side DSP code used to configure and control board level peripherals. boot: The process of loading a program into program memory . boot mode: The method of loading a program into program memory . The C6x DSP supports booting f[...]

Glossary C-3 Glossary compress and expand (compand): A quantization scheme for audio signals in which the input signal is compressed and then, after processing, is reconstructed at the output by expansion. There are two distinct companding schemes: A-law (used in Europe) and μ -law (used in the United States). control register: A register that con[...]

Glossary C-4 DSP_blk_move: Block move. DSP_dotp_sqr: V ector dot product and square. DSP_dotprod: V ector dot product. DSP_fft: Complex forward FFT with digital reversal. DSP_fft16x16r: Complex forward mixed radix 16- x 16-bit FFT with rounding. DSP_fft16x16t: Complex forward mixed radix 16- x 16-bit FFT with truncation. DSP_fft16x32: Complex forwa[...]

Glossary C-5 Glossary DSP_minval: Minimum value of a vector . DSP_mul32: 32-bit vector multiply . DSP_neg32: 32-bit vector negate. DSP_q15tofl: Q15 to float conversion. DSP_radix2: Complex forward FFT (radix 2). DSP_recip16: 16-bit reciprocal. DSP_r4fft: Complex forward FFT (radix 4). DSP_vecsumsq: Sum of squares. DSP_w_vec: Weighted vector sum. E [...]

Glossary C-6 H HAL: Hardware abstraction layer of the CSL. The HAL underlies the service layer and provides it a set of macros and constants for manipulating the peripheral registers at the lowest level. It is a low-level symbolic interface into the hardware providing symbols that describe peripheral registers/bitfields, and macros for manipulating[...]

Glossary C-7 Glossary interrupt service table (IST) A table containing a corresponding entry for each of the 16 physical interrupts. Each entry is a single-fetch packet and has a label associated with it. Internal peripherals: Devices connected to and controlled by a host device. The C6x internal peripherals include the direct memory access (DMA) c[...]

Glossary C-8 N nonmaskable interrupt (NMI): An interrupt that can be neither masked nor disabled. O object file: A file that has been assembled or linked and contains machine language object code. off chip: A state of being external to a device. on chip: A state of being internal to a device. P peripheral: A device connected to and usually controll[...]

Glossary C-9 Glossary reset: A means of bringing the CPU to a known state by setting the registers and control bits to predetermined values and signaling execution to start at a specified address. RTOS Real-time operating system. S service layer: The top layer of the 2-layer chip support library architecture providing high-level APIs into the CSL a[...]

C-10[...]

Index-1 Index A adaptive filtering functions 3-4 DSPLIB reference 4-2 address, defined C-1 A-law companding, defined C-1 API, defined C-1 application programming interface, defined C-1 argument conventions 3-2 arguments, DSPLIB 2-3 assembler , defined C-1 assert, defined C-1 B big endian, defined C-1 bit, defined C-1 block, defined C-1 board suppor[...]

Index Index-2 DSP_dotprod defined C-4 DSPLIB reference 4-60 DSP_fft defined C-4 DSPLIB reference 4-98 DSP_fft16x16r defined C-4 DSPLIB reference 4-14 DSP_fft16x16t defined C-4 DSPLIB reference 4-8, 4-1 1, 4-107 DSP_fft16x32 defined C-4 DSPLIB reference 4-24 DSP_fft32x32 defined C-4 DSPLIB reference 4-26 DSP_fft32x32s defined C-4 DSPLIB reference 4-[...]

Index-3 DSP_w_vec defined C-5 DSPLIB reference 4-72 DSPLIB argument conventions, table 3-2 arguments 2-3 arguments and data types 2-3 calling a function from Assembly 2-4 calling a function from C 2-4 customer support B-2 data types, table 2-3 features and benefits 1-4 fractional Q formats A-3 functional categories 1-2 functions 3-3 adaptive filter[...]

Index Index-4 F fetch packet, defined C-5 FFT (fast Fourier transform) defined C-5 functions 3-4 FFT (fast Fourier transform) functions, DSPLIB reference 4-8 filtering and convolution functions 3-5 DSPLIB reference 4-38 flag, defined C-5 fractional Q formats A-3 frame, defined C-5 function calling a DSPLIB function from Assembly 2-4 calling a DSPLI[...]

Index-5 Q Q.3.12 bit fields A-3 Q.3.12 format A-3 Q.3.15 bit fields A-3 Q.3.15 format A-3 Q.31 format A-4 Q.31 high-memory location bit fields A-4 Q.31 low-memory location bit fields A-4 R random-access memory (RAM), defined C-8 rebuilding DSPLIB 2-5 reduced-instruction-set computer (RISC), defined C-8 register , defined C-8 reset, defined C-9 rout[...]