National Instruments NI 5401 manual

Computer-Based Instruments NI 5401 User Manual PXI /PCI Arbitrary Function Generator NI 5401 User Manual ™ March 1999 Edition Part Number 3224 19A-01[...]

Worldwide Technical Support and Product Info rmation www.natinst.com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin, Texas 78759-3504 USA Tel: 512 794 0100 Worldwide Offices Australia 03 9879 5166, Austria 0662 45 79 90 0, Belgium 02 757 00 20, Brazil 011 284 5011, Canada (Ontario) 905 785 0085, Can ada (Québec) 51[...]

Important Information Warranty The NI 5401 is warrant ed against defects in mat erials and workmanshi p for a period of one year from th e date of shipment, as evidenced by receipts or other documentati on. National Instruments wi ll, at its option, repair or replace equipment that proves to be defect ive d uring th e warranty p e riod. T hi s wa r[...]

Conventions The following con ventions are used in this manual: » The » symbol lead s you through nested menu items and dialog box options to a final action. The sequence File»Page Setup»Options directs you to pull down the File menu, select the Page Setup item, and select Options from the last dialog box. ♦ The ♦ symbol indicates that the [...]

© National Instruments Corporation v NI 5401 User Manual Contents Chapter 1 Generating Functions with the NI 5401 About Your NI 5401 ............. ........... .............. .............. ............... .............. .............. ....... 1-1 Connecting Signals ..................... .............. ........... .............. .............. ....[...]

Contents NI 5401 User Manual vi www.natinst.com SYNC Output and Duty Cycle ........................ ........... .............. .............. ......... 2-9 Output Attenuation ................ ... .............. ........... ... .............. ............ ... .............. 2-9 Output Impedance .............. ............... ........... ... ........[...]

Contents © National Instruments Corporation vii NI 5401 User Manual Figure 2-1. NI 5401 Blo ck Diagram ........................................................................ 2-1 Figure 2-2. Waveform Data Path Block Diagram............................... .............. ....... 2-2 Figure 2-3. DDS Building Blocks ..................... ............[...]

© National Instruments Corporation 1-1 NI 5401 User Manual 1 Generating Functions with the NI 5401 The NI 5401 User Manual describes the features, functions, and operation of the NI 5401 arbitrary function generator. This device performs comparably to stan dalone instruments w hile providing the flexibility of computer-based operation. About Y our[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-2 www .natinst.com Connecting Signals Figure 1 -1 sho ws the front panels for the NI 5401 for the PXI and PCI buses. The front panel contains three types of connectors: BNC, SMB, and 50-pin very high-density SCSI (VHDSCSI). The main waveform is generated through the connector lab[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-3 NI 5401 User Manual ARB Connector The ARB connector provides the wa veform output. The maximum output lev els on this connector depend on the type of load termination. If the output of your NI 5401 terminates into a 50 Ω load, the output levels are ±5 V , as [...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-4 www .natinst.com sine wave being generated and t w is the pulse width of the SYNC output. The duty cycle is (t w /t p ) × 100%. Figure 1-3. SYNC Output and Duty Cycle For your NI 5401 for PCI, you can route the SYN C output to the R TSI lines ov er the R TSI bus. For your NI 5[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-5 NI 5401 User Manual Pattern Out Connector (PCI Only) This connector is used on the NI 5401 for PCI to supply the external trigger input to the b oard. Connector Pin Assignments Figure 1 -4 shows the NI 5401 50-pin digital con nector. Refer to Table 1-1 for a des[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-6 www .natinst.com Signal Descriptions Table 1-1 shows the pin names and signal descriptions used on the NI 5401 digital output connector. SHC50-68 50-Pin Cable Connector You can use an option al SHC50-68 50-pin to 68-pin cable for external trigger input. The cable connects to th[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-7 NI 5401 User Manual Figure 1-5. SHC50-68 68-Pin Connector Pin Assignments 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-8 www .natinst.com Software Options for Y our NI 5401 This section describes the NI-FGEN driver software and development tools that you can use to create application software for your N I 5401. Software Included with Y our NI 5401 Your N I 5401 kit includes several VirtualBench s[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-9 NI 5401 User Manual Wav eform Editor You use the Waveform Editor to create, sketch, and edit complex waveforms that the VirtualBench-FG player can then generate. A library of standard waveforms for creating complex waveforms is included, and you can also write e[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-10 www .natinst.com as C, includin g looping and case structures, configuration management tools, and compiled performance. Note Use the NI-FGEN instrument driv er to program and control your NI 5401 using LabVIEW . LabWindows/CVI LabWindows/CVI is an interactive, ANSI C programm[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-11 NI 5401 User Manual Using the Soft Front Panels to Generate W aveforms You use the VirtualBench soft front panels to interactively control your NI 5401 as you would a desktop func tio n generator. Generating Standard Functions If you need to generate standard w[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-12 www .natinst.com T o control ad ditional instrument parameters, select Edit»54xx Settings to bring up the dialog box shown in Figures 1-7 and 1-8. Figure 1-7. VirtualBench-FG General Settings Dialog Box for the NI 5401 Figure 1-8. VirtualBench-FG Signals Setting s Dialog Box [...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-13 NI 5401 User Manual Y ou can also load a custom wa v eform pattern with V irtualBench-FG. This wa veform should be a text f ile and should co ntain exactly 16,384 samples. If the defined wa veform does not contain exactly 16,384 samples, you may see undesired e[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-14 www .natinst.com them using the VirtualBench-FG Frequency List Editor. Follow these steps to create a list of multiple frequen cies: 1. Select Window»Frequency List Editor from the V irtualBench-FG soft front panel to bring up the dialog box sho wn in Figure 1-10 . Figure 1-1[...]

Chapter 1 Generating Functions with the NI 5401 © National Instruments Corporation 1-15 NI 5401 User Manual W aveform Editor You can use the Waveform Editor shown in Figure 1-11 to create a custom waveform. To launch the Waveform Editor, select Start»Programs» National Instruments FGEN»Waveform Editor . You can select waveforms from the functio[...]

Chapter 1 Generating Functions with the NI 5401 NI 5401 User Manual 1-16 www .natinst.com Power -Up and Reset Conditions When you power up your computer, the NI 5401 is in the followin g state: • The output is disabled and set to 0 V . • The trigger mode is set to continuous. • The trigger source is set to automatic (the software provides the[...]

© National Instruments Corporation 2-1 NI 5401 User Manual 2 Function Generator Operation This chapter describes how to use your NI 5401. Figure 2 -1 shows the NI 5401 block d iagram. Figure 2-1. NI 5401 Block Diagram Data Path PXI/PCI Channel Waveform Sequencer IFIFO Control RTSI/PXI Trigger Bus Instruction FIFOs RTSI Control ARB SYNC PLL Ref Ana[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-2 www .natinst.com The NI 54 01 has se veral main components: • A PXI or PCI bu s interface that handles Plug and Play protocols for assigning resources to the device and pro viding driv ers for the data and address bus that are local to the de vice • A wa veform sequencer that perfor[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-3 NI 5401 User Manual Direct Digital Synthesis (DDS) Direct digital synthesis (DDS) is a technique for deriving, under digital control, an analog frequency source from a single reference clock frequency. This technique produces high-frequency accuracy and resolution, tempe[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-4 www .natinst.com Each stage is made up of tw o instructions: the frequency , which specifies the frequency of the wav eform to be generated, and the time , which specifies the time for which the frequency is to be generated. Note Y ou cannot specify the number of iterations for a wa vef[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-5 NI 5401 User Manual Figure 2-4. Waveform Generation T rigger Sources If you need to automatically trigger the wav eform generation, use software to generate the triggers. A rising TTL edge is required for external triggering. For more information on triggering over R TSI[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-6 www .natinst.com Figure 2-5. Single T rigger Mode For e xample, assume that one c ycle of a sine wa ve is stored in the DDS lookup memory . For stage 1, f1 specif ies the sine frequency to be generated for time ∆ T1, f2 and ∆ T2 for stage 2, and so on. If there are four stages in th[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-7 NI 5401 User Manual Stepped T rigger Mode After a start trigger is received, the waveform defined by the first stage is generated. Then, the device waits for the next trigger signal. On the next trigger, the waveform described by the second stage is generated, and so on.[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-8 www .natinst.com Figure 2 -8 shows the essential block diagram of analog wav eform generation. Figure 2-8. Analog Output and SYNC Out Block Diagram Figure 2 -9 shows the timing relationships of the trigger input and wa veform output. T d1 is the pulse width on the trigg er signal. T d2 [...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-9 NI 5401 User Manual SYNC Output and Duty Cycle The SYNC output is a TTL version of the sine waveform generated at the output. The signal from the pre-amplifier is sent to a comparator, where it is compared against a level set by the level DAC . The output of this compara[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-10 www .natinst.com NI-FGEN calculates the v alue of the output attenuation chain, which you can control b y changing the peak-to-peak amplitude paramete r . 0 dB attenuation corresponds to an amplitude of 1 0 V pk-pk . The maxi mum attenuation of 7 3 dB co rresponds to an amplitude of 2.[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-11 NI 5401 User Manual Pre-Attenuation Offset The NI 5401 hardware supports a DC of fset of up to ±2.5 V befo re the attenuation chain. Unless the 10 dB attenuator is switched in, which occurs when the ampl itude is less then 3.16 V pk-pk , the waveform maximum plus the o[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-12 www .natinst.com Figure 2-11. PLL Architecture for th e NI 5401 for PCI Figure 2-12. PLL Architecture for th e NI 5401 for PXI Y ou can frequency lock to an e xternal reference clock source of 1 MHz and from 5–20 MHz in 1 MHz increments. The PLL can lock to a signal level of at least[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-13 NI 5401 User Manual Analog Filter Correction The N I 5401 can correct for slight deviations in the flatness of the frequency characteristic of the analog lowpass filter in it s passband , as shown in Figur e 2-13. Curve A shows a typical lowpass filter curve. The respon[...]

Chapter 2 Function Generator Operation NI 5401 User Manual 2-14 www .natinst.com R TSI/PXI T rigger Lines The NI 5401 for PCI contains seven trigger lines and one RTSI clock line available over the RTSI bus to send and receive NI 5401-specific information to other boards that have RTSI connectors. Figure 2-14 sh ows the RTSI trigger lines and routi[...]

Chapter 2 Function Generator Operation © National Instruments Corporation 2-15 NI 5401 User Manual The NI 5401 can receive a hardware trigger from another board as a R TSI trigger signal on any of the R TSI/PXI trigger lines. Y ou can also route signals as follows: • Route the Start T rigger signal generated on the NI 5401 to other bo ards throu[...]

© National Instruments Corporation A-1 NI 5401 User Manual A Specifications This appendix lists the specifications for the NI 5401. These specifications are typical at 25 °C unless otherwise stated. The operating temperature range is 0 to 50 ° C . Analog Output Number of channels ............. .............. .... 1 Resolution .............. ... [...]

Appendix A Specifications NI 5401 User Manual A-2 www .natinst.com Pre-attenuation offset Range ..................... .............. ........... .±2.5 V into 50 Ω 1 Accuracy .......... ............ .............. ......±5 mV Output coupling ........... .............. ............DC Output impedance ...................... ... .........50 Ω or [...]

Appendix A Specifications © National Instruments Corporation A-3 NI 5401 User Manual W aveform Specifications Memory ............ ............... ........... ............ 16,384 16-bit samples Segment length ................ .............. ......... 16,384 samples, exact Segment linking (instruction FIFO) ....... 512 links T iming I/O Update clock[...]

Appendix A Specifications NI 5401 User Manual A-4 www .natinst.com SYNC Out Level .............. ........... .............. .............. .TTL Duty cycle ..................... .............. ........... .20% to 80%, software controllable External Clock Reference Input Frequency ...............................................1 MHz or 5–20 MHz in [...]

© National Instruments Corporation B-1 NI 5401 User Manual B Optional Accessories National Instruments offers a v ariety of products to use with your N I 540 1, including probes, cables, and other accessories: • Shielded and unshielded I/O connector blocks (SCB-68, TB X-68, CB-68) • R TSI bus cables For more specif ic information about these p[...]

© National Instruments Corporation C-1 NI 5401 User Manual C Frequency Resolution and Lookup Memor y For DDS-based wa v eform generation, you must first load one cycle of the desired wa veform into the lookup memory . The size of the DDS lo okup memory is 16,384 samples. Each sample is 16 bits wide. Note One cycle of the wav eform buf fer loaded i[...]

Appendix C Frequency Resolution an d Lookup Mem ory NI 5401 User Manual C-2 www .natinst.com Y ou can also synthesize arbitrary waveforms using DDS. Generating arbitrary wav eforms this way will be very limited; you are restricted to a single buf fer , and this buf fer should be e xactly equal to the size of the lookup memory (16,384 samples). T o [...]

© National Instruments Corporation D-1 NI 5401 User Manual D T echnical Support Resources This appendix describes the comprehensiv e resources av ailable to you in the T echnical Support section of the National Instruments W eb site and provides technical support telephone numbers for you to use if you have trouble connecting to our W eb site or i[...]

Appendix D T e chnical Support Resources NI 5401 User Manual D-2 www .natinst.com Software-Related Resources • Instrument Driver Network —A library with hundreds of instrument dri v ers for control of standalone instruments via GPIB, VXI, or serial interfaces. Y ou also can submit a request for a particular instrument dri ver if it does not alr[...]

© National Instruments Corporation G-1 NI 5401 User Manual Glossar y Pref ix Meaning V alue µ- micro- 10 –6 m- milli- 10 –3 k- kilo- 10 3 M- mega- 10 6 Numbers/Symbols % percent + positi ve of, or plus – negati ve of, or minus ± plus or minus /p e r °d e g r e e Ω ohm +5 V +5 V output signal A A amperes amplification method of scaling t[...]

Glossary NI 5401 User Manual G-2 www .natinst.com B b bit—one binary digit, either 0 or 1 B byte—eight related bits of data, an eight-bit binary number . Also used to denote the amount of memory required to store one byte of data. BNC a type of coaxial signal connector buf fer temporary storage for acquired or generated data bus the group of co[...]

Glossary © National Instruments Corporation G-3 NI 5401 User Manual DC direct current DC coupled allowing the transmission of both A C and DC signals DDS direct digital synthesis—a d igital technique of frequency generation using a numerically controlled oscillator (NCO), a dedicated lookup memory , and a D AC DDS mode a method of wav eform gene[...]

Glossary NI 5401 User Manual G-4 www .natinst.com F FIFO first-in f irst-out memory buf fer—the first data stored is the f irst data sent to the acceptor . FIFOs are often used on D A Q devices to temporarily store incoming or outgoing data until that data can be retrie ved or output. For example, an analog input FIFO stores the results of A/D co[...]

Glossary © National Instruments Corporation G-5 NI 5401 User Manual I I/O input/output—the transfer of data to/from a computer system in volving communications channels, operator interface de vices, and/or data acquisition and control interfaces IFIFO instruction FIFO instruction FIFO the FIFO that stores the w av eform generation staging list K[...]

Glossary NI 5401 User Manual G-6 www .natinst.com M m meters M (1) Mega, the standard metric pref ix for 1 million or 10 6 , when used with units of measure such as volts and hertz; (2) mega, the pref ix for 1,048,576, or 2 20 , when used with B to quantify data or computer memory master/slav e locking the NI 5401 clock in frequenc y to an external[...]

Glossary © National Instruments Corporation G-7 NI 5401 User Manual pipeline a high-performance processor structure in which the completion of an instruction is broken into its elements so that se veral ele ments can be processed simultaneously from dif f erent instructions PLL phase-locked loop—a circuit that synthesizes a signal whose frequenc[...]

Glossary NI 5401 User Manual G-8 www .natinst.com SCSI Small Computer System Interface (bus) sequence list See staging list. shift-keying frequen cy shift k eying (FSK) single trigger mode when the arbitrary wa veform generator goes through the staging list only once SMB Sub Miniature T ype B connector that features a snap coupling for fast connect[...]

Glossary © National Instruments Corporation G-9 NI 5401 User Manual V Vv o l t s VCXO voltage controlled crystal oscillator VHDSCSI very high-density SCSI W wa veform multiple v oltage readings taken at a specific sampling rate wa veform b uffer the collectio n of 16 -bit data samples stored in the wav eform memory that represent a desired wa vefo[...]

© National Instruments Corporation I-1 NI 5401 User Manual Index A analog filter correction, 2-13 analog out put, 2-7 to 2-11 analog out put and SYNC out b lock diagram, 2-8 output attenuation, 2-9 to 2-11 output enable, 2-10 output impedance, 2-10 pre-attenuation offset, 2-11 specifications, A-1 SYNC output and duty cycle, 2-9 waveform and trigge[...]

Index NI 5401 User Manual I-2 www .natinst.com phase-locked loops and board synchronization, 2-11 to 2-12 RTSI/PXI trigger lines, 2-14 to 2-15 triggering, 2-4 to 2-7 continuous trigger mode, 2-6 single trigger mode, 2-5 to 2-6 stepped trigger mode, 2-7 trigger sources, 2-4 to 2-5 waveform generation, 2-2 I impedance, output, 2-10 instruction FIFO, [...]

Index © National Instruments Corporation I-3 NI 5401 User Manual phase-locked loops and board synchronization, 2-11 to 2-12 pin assignments (figure) Pattern Out connector, 1-5 SHC50-68 50-pin cable connector, 1-7 PLL Ref connector, 1-4 power-up and reset conditions, 1-16 pre-attenuation offset, 2-11 problem-solving and diagnostic resources, online[...]

Index NI 5401 User Manual I-4 www .natinst.com Load Waveform dialog box (figure), 1-13 Signal Settings dialog box (figure), 1-12 voltage output specifications, A-1 to A-2 W Waveform Editor creating custom waveforms, 1-15 description, 1-9 waveform generation. See also function generator operation. analog waveforms, 2-7 to 2-11 data path block diagra[...]