Acer TM7300 manuel d'utilisation

TM7300 Series Notebook Computer Service Guide PART NO.: 49.42A01.001 DOC. NO.: SG238-9712A PRINTED IN TAIWAN[...]

ii Copyright Copyright  1998 by Acer Incorporated. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the pri[...]

iii About this Manual Purpose This service guide aims to furnish technical information to the service engineers and advanced users when upgrading, configuring, or repairing the TM7300 series notebook computer. Manual Structure This service guide contains technical information about the TM7300 series notebook computer. It consists of three chapters [...]

iv Appendix D Schematics This appendix contains the schematic diagrams for the system board. Appendix E BIOS POST Checkpoints This appendix lists and describes the BIOS POST checkpoints. Conventions The following are the conventions used in this manual: Text entered by user Represents text input by the user. Screen messages Denotes actual messages [...]

v Table of Contents Chapter 1 System Introduction 1.1 Features .............................................................................................................. 1-1 1.1.2 FlashStart Automatic Power-On ............................................................ 1-2 1.2 Ports .............................................................[...]

vi 1.6.14 PCMCIA ............................................................................................... 1-35 1.6.15 Parallel Port ......................................................................................... 1-36 1.6.16 Serial Port ............................................................................................ 1-36[...]

vii 2.4.3 Pin Diagram ......................................................................................... 2-40 2.4.4 Pin Descriptions ................................................................................... 2-41 2.5 Philips 87C552 System Management Controller ................................................. 2-43 2.5.1 Feat ures ..[...]

viii 3.3 Advanced System Configuration ........................................................................... 3-5 3.3.1 Internal Cache ........................................................................................ 3-5 3.3.2 External Cache ...................................................................................... 3-5 3.3.3[...]

ix 4.8.1 Detaching the Lower Housing from the Inside Assembly ...................... 4-14 4.8.2 Detaching the Upper Housing from the Inside Assembly ...................... 4-15 4.8.3 Removing the Touchpad ...................................................................... 4-16 4.8.4 Removing the Main Board .......................................[...]

x List of Figures 1-1 Lid Switch ............................................................................................................. 1-2 1-2 Rear Port Location ................................................................................................ 1-3 1-3 Left Port Location ........................................................[...]

xi 4-8 Installing and Removing Memory ......................................................................... 4-8 4-9 Removing the Display Hinge Covers ................................................................... 4-10 4-10 Removing the Center Hinge Cover ..................................................................... 4-10 4-11 Liftin[...]

xii List of Tables 1-1 Rear Port Descriptions .......................................................................................... 1-3 1-2 Left Port Descriptions ............................................................................................ 1-5 1-3 Indicator Light Descriptions ....................................................[...]

xiii 1-35 Battery Specifications ......................................................................................... 1-40 1-36 DC-DC Converter Specifications ......................................................................... 1-40 1-37 DC-AC Inverter Specifications ........................................................................[...]

&KDSWHU &KDSWHU System Introduction System Introduction 1-1 The com puter is pack ed with features that m ake it as easy to work with as it is to look at. Here ar e some of the computer’s features: 1.1 Features PER[...]

1-2 Service Guide • Ergonomically-positioned touchpad pointing device EXPANDABILITY • CardBus PC Card (PCMCIA) slots (two type II/I or one type III) with Zoomed Video port function • Mini-dock option with two CardBus PC Card slots (two type II/I or one type III) • USB port onboard • Upgradeable memory and hard disk 1.1.2 FlashStart Automa[...]

System Introduction 1-3 1.2 Ports The com puter’s ports allow y ou to connect peripheral devices to y our com puter just as y ou would to a desk top PC. The main por ts are found on the com puter’s r ear panel. T he computer ’s left panel contains the computer’s multimedia ports and PC card slots. 1.2.1 Rear Panel Ports The com puter’s re[...]

1-4 Service Guide UNIVERSAL SERIAL BUS (USB) PORT The com puter’s USB (Universal Serial Bus) port located on the r ear panel allows y ou to connect peripherals without occupying too many resources . Comm on USB devices include the mouse and keyboard. FAST INFRARED (FIR) PORT The com puter’s FIR (fast infrared) port located on the rear panel all[...]

System Introduction 1-5 Table 1-2 Left Port Descriptions Port Icon Connects to... PC Card slots Two type I/II PC Cards or one type III Card Microphone-in/ Line-in External microphone or line input device Speaker-out/ Line-out Amplified speakers or headphones PC CARD SLOTS The com puter contains two PC card slots on the left panel that ac comm odate[...]

1-6 Service Guide 1.2. 4 Hot Keys The com puter’s special Fn k ey , used in com bination with other keys, provides “hot-k ey ” com binations that access sy stem c ontrol functions, s uch as scr een contrast, brightness, volum e output, and the BIOS setup utility. Table 1-4 Hot Key Descriptions Hot Key Icon Function Description Fn+Esc Suspend-[...]

System Introduction 1-7 Table 1-4 Hot Key Descriptions Hot Key Icon Function Description Fn+ + ↑ Brightness Up Increases screen brightness Fn+ + ↓ Brightness Down Decreases screen brightness Fn+ + → Contrast Up Increases screen contrast (not available for TFT displays) Fn+ + ← Contrast Down Decreases screen contrast (not available for TFT d[...]

1-8 Service Guide 1.3 Sy stem Specification Ov erview Table 1-6 System Specifications Item Standard Optional Microprocessor Intel Pentium ® II 266 MHz processor Memory System / Main External cache 64MB Dual 64-bit memory banks 512KB L2 cache (synchronous SRAM) Expandable to 128MB using 8/16/32/64MB soDIMMs Flash BIOS 256KB Storage system One 2.5-i[...]

System Introduction 1-9 Table 1-6 System Specifications Item Standard Optional One fast infrared port (IrDA-compliant) One 3.5mm minijack microphone-in/line-in jack One 3.5mm minijack speaker-out/line-out jack One USB port External IR adapter Microphone or line-in device Speakers or headphones USB device Weight with FDD with CD-ROM (includes batter[...]

1-10 Service Guide 1.4 Board Lay out[...]

System Introduction 1-11 1.4.1 System Board (Top Side) Figure 1-5 System Board (Top Side)[...]

1-12 Service Guide 1.4.2 System Board (Bottom Side) Figure 1-6 System Board (Bottom Side)[...]

System Introduction 1-13 1.4.3 Media Board (Top Side) Figure 1-7 Media Board (Top Side)[...]

1-14 Service Guide 1.4.4 Media Board (Bottom Side) Figure 1-8 Media Board (Bottom Side)[...]

System Introduction 1-15 1.5 Jumpers and Connector s 1.5.1 Mainboard CN1 CN2 CN3 CN4 CN5 CN6 CN13 CN14, CN15 CN7 U1 CN10 CN11 CN12 CN8 CN9 CN1 USB CN2 VGA port CN3 Mini dock port CN4 Parallel port CN5 Serial Port CN6 PS2 mouse/keyboard port CN7 AC adapter plug-in port CN8, CN9 Multimedia board connector CN10 FDD/CD-ROM connector CN14, CN15 CPU boar[...]

1-16 Service Guide CN16 CN22 CN17 CN19 , CN18 SW1 CN20 SI2 SI1 SW2 ON OFF 1 4 CN20, CN19 DC-DC converter connector CN17 Left speaker connector CN20 Debug port CN22 Battery connector CN16 Right speaker connector SW1 Reset Switch SW2 Jumper Setting Figure 1-10 Mainboard Jumpers and Connectors (Bottom Side) The following table shows the settings of th[...]

System Introduction 1-17 1.5.2 Media Board CN2 CN1 CN4 CN5 CN6 CN2 Lid switch CN1 LCD connector CN6 Touchpad connector CN4, CN5 Keyboard connector Figure 1-11 Media Board Jumpers and Connectors (Top Side) CN9 CN7 CN8 CN7, CN8 Mainboard connector CN9 PCMCIA socket connector Figure 1-12 Media Board Jumpers and Connectors (Bottom Side)[...]

1-18 Service Guide 1.6 Sy stem Configurations and Specificati ons 1.6.1 System Memory Map Table 1-8 System Memory Map Address Range Definition Function 000000 -09FFFF 640 KB memory Base memory 0A0000 -0BFFFF 128 KB video RAM Reserved for graphics display buffer 0C0000 -0CBFFF Video BIOS Video BIOS 0CC000 -0CDFFF 0CE000 -0CFFFF System CardBus Mini d[...]

System Introduction 1-19 Table 1-10 I/O Address Map Address Range Device 070 -071 080 -08F 0A0 -0A1 0C0 -0DF 1F0 -1F7 3F6 -3F7 170 -177 376 -377 220 -22F 240 -24F 260 -26F 280 -28F 278 -27F 2E8 -2EF 2F8 -2FF 300 -301 310 -311 320 -321 330 -321 378 -37F 388 -38B 3BC -3BE 3B4, 3B5, 3BA 3C0 -3C5 3C6 -3C9 3C0 -3CF 3D0 -3DF 3E8 -3EF 3F0 -3F7 3F8 -3FF CF[...]

1-20 Service Guide 1.6.5 GPIO Port Definition Map Table 1-12 GPIO Port Definition Map I GPIO/Signal Pin # I/O Description GPIO Pin Assignment: PIIX4 SUSA# (PX3_SUSA#) W2 0 O 0: Power down clock generator GPO0 (PX3_DOCKRST#) G4 O 0 : Enable docking reset GPO1 (PX3_HDPON) Y15 O 1: Turn on HDD power GPO2 (PX3_ CD/FDPON) T14 O 1: Turn on CD/FDD power G[...]

System Introduction 1-21 Table 1-12 GPIO Port Definition Map I GPIO/Signal Pin # I/O Description GPI1 (DK3_DOCKIRQ#) P19 O 0: Detect Docking IRQ GPI2/REQA# (PX3_OEM0) M1 O OEM detection GPI3/REQB# (SM5_BAYSW) N2 O Detect FDD/CD bay 1: installed, 0: not installed GPI4/REQC# (CF5_FDD/CD#) P3 O Detect FDD or CD installed 1: FDD, 0: CD GPI5/APICREQ# K1[...]

1-22 Service Guide Table 1-13 GPIO Port Definition Map II GPIO I/O Description P1.7 (IS5_IRQ12) O IRQ12 P2.0 (KB5_MEMB0A0) I Address 0 of memory bank 0 P2.1 (KB5_MEMB0A1) I Address 1 of memory bank 0 P2.2 (KB5_MODE) I Detect KBD mode (1:US/EC 0:Japan) P2.3 I NC P2.4 (KB5_MEMB1A0) I Address 0 of memory bank 1 P2.5 (KB5_PSWD) I Enable Password P2.6 ([...]

System Introduction 1-23 Table 1-13 GPIO Port Definition Map II GPIO I/O Description P2.1 O NC P2.2 (SM5_BAYSW) I Detect FDD/CD bay installed or not P2.3 O NC P2.4 O NC P2.5 O NC P2.6 O NC P2.7 O NC P3.0 (SM5_RXD) I Receiving data from KBC to SMC P3.1 (SM5_TXD) O Transmitting data from SMC to KBC P3.2 (SM5_DOCKSW) I Dock switch sense P3.3 (CF5_DOCK[...]

1-24 Service Guide Device Device ID Assignment MTXC North Bridge 0 AD11 PIIX4 ISA Bridge 1 AD18 (Function 0) PIIX4 IDE controller 1 AD18 (Function 1) PIIX4 USB controller 1 AD18 (Function 2) PIIX4 PM/SMBUS controller 1 AD18 (Function 3) PCI VGA(NM2160) 2 AD13 PCI Cardbus controller A AD21 PCI Ethernet (Am79C970A) (ACER Dock III) C AD23 PCI CardBus [...]

System Introduction 1-25 1.6.7.1 PMU Timers There ar e s ever al devic es r elated tim ers available on the V1-LS c hip. Eac h tim er m ay have zero or more devices assigned to the timer for the purpose of retriggering the timer. Table 1-15 PMU Timers List Item Descriptions Video timer Timer value 30sec, 1min, 1.5min, 2min, 2.5min, 3min, 3.5min, 4m[...]

1-26 Service Guide Table 1-15 PMU Timers List Item Descriptions System activities and timer retriggers System activities − Power off either or both FDD and CD-ROM. Tri-state FDD and CD-ROM interfaces and stop IDE controller clock. Timer retriggers − The I/O access to 3F2, 3F4, 3F5(FDD), 3F7, 376(CD ROM) will retrigger the timer. Detective hardw[...]

System Introduction 1-27 3. CD-ROM Reset [pin-U13 of U21(PX3_CDRST#) of PIIX4]. The reset pin is used to as sert the hard reset needed f or the CD-ROM during power up. The reset pin is asserted before CD-ROM power up and is deass erted after CD-ROM power up and bef ore the buffer is enabled. • Floppy The f loppy has two components involved in the[...]

1-28 Service Guide Recovery from power down is the opposite procedure. • SIR (UART) The FIR port is basically UART2. The UART operates off of a 14MHz clock. T he IR port has a DA converter. The UART2 disable control circuit is within the 87338 chip. 1. Tri-state the UART2 output pins. 2. Disable the 14MHz clock (If the floppy and the serial port [...]

System Introduction 1-29 • CPU The CPU cl ock. The cloc k to the CPU can be physically stopped. The c hip is static, so the current state is retained. During a clock stop state, the CPU is stopped and the internal c ache and external bus s ignals are inoperative. Theref ore, any bus m aster or DMA activity is halted as well. CPU thermal alarm. Th[...]

1-30 Service Guide For suspend-to- disk, all devices ar e read, saved to local m emory and the local m emory, video me mory are saved to a disk file which is c reated by SLEEP MANAGER utility . The m achine is then commanded to an off state. • Resume events for zero-volt suspend(suspend-to-disk) The only resum e event for zero-volt suspend is the[...]

System Introduction 1-31 1.6.9 BIOS Table 1-17 BIOS Specifications Item Specification BIOS programming vendor Acer BIOS version V3.0 BIOS ROM type Intel 28F002, Flash ROM with boot block protection BIOS ROM size 256KB BIOS ROM package type 40-pin TSOP Same BIOS for TFT LCD type Yes Boot from CD-ROM feature Yes Support protocol PCI V2.1, APM V1.1, E[...]

1-32 Service Guide 1.6.10.1 SIMM Memory Combination List Table 1-19 SIMM Memory Combination List RAM Size Bank A Bank B 8MB 8MB 0MB 8MB 0MB 8MB 16MB 8MB 8MB 16MB 16MB 0MB 16MB 0MB 16MB 24MB 8MB 16MB 24MB 16MB 8MB 32MB 16MB 16MB 32MB 32MB 0MB 32MB 0MB 32MB 40MB 8MB 32MB 40MB 32MB 8MB 48MB 16MB 32MB 48MB 32MB 16MB 64MB 32MB 32MB 64MB 64MB 0MB 64MB 0M[...]

System Introduction 1-33 1.6.12 Video Display Modes Table 1-21 Video Display Specification Item Specification Chip vendor NeoMagic Chip name NMG2160 Chip voltage 3.3 Volts ZV port support (Y/N) Yes Graph interface (ISA/VESA/PCI) PCI bus Max. resolution (LCD) 800x600 (16M colors) True Color Max. resolution (Ext. CRT) 1024x768 (64K colors) High Color[...]

1-34 Service Guide 1.6 .13 Audio Table 1-24 Audio Specifications Item Specification Chipset Neomagic-3097 Audio onboard or optional Built-in Mono or stereo stereo Resolution 16-bit Compatibility Sound Blaster Game, Windows Sound System, Plug&Play ISA 1.0a Music synthesizer 20-voice, 72 operator, FM music synthesizer Mixed sound sources Voice, S[...]

System Introduction 1-35 1.6.15 Parallel Port Table 1-26 Parallel Port Specifications Item Specification Number of parallel ports 1 ECP/EPP support Yes (by BIOS Setup) ECP DMA channel (by BIOS Setup) DRQ1 or DRQ3 Connector type 25-pin D-type Connector location Rear side Selectable parallel port (by BIOS Setup) Parallel 1 (378h, IRQ7) or Parallel 2 [...]

1-36 Service Guide 1.6.18 SIR/FIR Table 1-29 SIR/FIR Specifications Item Specification Vendor & model name IBM(31T1100A) Input power supply voltage 5 V Transfer data rate 115.2 Kbit/s(Max)(SIR)~4 Mbit/s(FIR)(Max) Transfer distance 100cm Compatible standard IrDA (Infrared Data Association) Output data signal voltage level Active Non-active 0.5 V[...]

System Introduction 1-37 1.6.2 0 CD-ROM Table 1-31 CD-ROM Specifications Item Specification Vendor & model name KYUSHU MATSHITA: UJDA110 Internal CD-ROM/FDD hot-swappable No BIOS auto-detect CD-ROM existence Yes BIOS support boot from CD drive feature Yes Performance specification Speed 2100KB/sec(14X speed) Access time 150ms Buffer memory 128k[...]

1-38 Service Guide 1.6.22 Hard Disk Drive Table 1-33 Hard Disk Drive Specifications Item Specification Vendor & Model Name IBM DTCA-23240 IBM DTCA-24090 Drive Format Capacity (GB) 4.09 3.24 Bytes per sector 512 512 Logical heads 16 16 Logical sectors 63 63 Logical cylinders 6304 7944 Physical read/write heads 4 Disks 2 Rotational speed (RPM) 40[...]

System Introduction 1-39 1.6 .24 Battery Table 1-35 Battery Specifications Item Specification Vendor & Model Name Sony BTP-S31 Battery Gauge Yes Battery type Li-Ion Cell capacity 2700mAH Cell voltage 3.6V Number of battery cell 6-Cell Package configuration 3 serial, 2 parallel Package voltage 10.8V Package capacity 58.3WH Second battery No 1.6.[...]

1-40 Service Guide 1.6. 26 DC-AC Inverter DC-AC inverter is used to generate very high AC voltage, then supply to LCD CCFT backlight use. The DC-AC inverter area should be void to touch while the system unit is turned on. Table 1-37 DC-AC Inverter Specifications Item Specification Vendor & Model Name Ambit T62-055.C.00 Ambit T62-088.C.00 Used L[...]

System Introduction 1-41 1.7 Sy stem Block Diagrams 1.7.1 System Functional Block Diagram “7100” System Block Diagram MAIN BO ARD . Intel Tillamook/Deschutes MMO . PCI IDE . Intel 430TX Core Logic chipset . NS87338 Super I/O controll e r . 512KB L2 cache memory . 256KB PMU/System/Video BIOS . 32~128MB EDO/SDRAM memory . 6832 CardBus chip . Neo [...]

1-42 Service Guide 1.7.2 System Bus Block Diagram 970T SYSTEM BLOCK DIAGRAM 440BX SYST EM CONTROLLER HOS T B US L2 CACHE 32KX32 MD[ 0. .63 ] MA[ 0. .13 ] SDRA M 2, 4, 8MX64 2 BANKS DIMCLK(60/66MHz) PCI B US 14.318MHz INT EL CPU CLOCK GEN. IMIC S651 HCLK(6 0/66MHz) PCICLK (30/33MHz) USB (4 8MHz ) IDE CD PIIX4 PCI T O EIO BR G IDE,USB , RTC USB VIDEO[...]

System Introduction 1-43 1.8 Environmental Requirements Table 1-39 Environmental Requirements Item Specification Temperature Operating (ºC) +5 ~ +35 Non-operating(ºC)(unpacked) -10 ~ +60 Non-operating(ºC)(storage package) -20 ~ +60 Humidity Operating (non-condensing) 20% ~ 80% Non-operating (non-condensing) (unpacked) 20% ~ 80% Non-operating (no[...]

1-44 Service Guide 1.9 Mechanical Specifications Table 1-40 Mechanical Specifications Item Specification Weight (includes battery and FDD) 12.1 TFT SVGA LCD and 12.5mm HDD Adapter 3.3 kgs (7.2 lbs) 230 g (0.52 lb) Dimensions round contour main footprint 297~313mm x 233~240mm x 50~53mm 11.7” x 9.1” x 2”[...]

&KDSWHU &KDSWHU Major Chips Description Major Chips Description 2-1 This chapter discusses the major components. 2.1 M a j or Component Li st Table 2-1 Major Chips List Component Vendor Description PIIX4(82371AB) Int[...]

2-2 Service Guide 2.2 Intel PIIX4 PIIX4 is a multi-function PCI device that integrates many system-level functions. PCI to ISA/EIO Bridge PIIX4 is com patible with the PCI Rev 2.1 specific ation, as well as the IEEE 996 specif ication for the ISA (AT) bus. On PCI, PIIX4 operates as a m aster for various inter nal modules, suc h as the USB controlle[...]

Major Chips Description 2-3 The tim er/counter block contains thr ee counters that are equivalent in func tion to those f ound in one 82C54 program mable interval tim er. These thr ee counters are com bined to provide the sy stem timer function, ref resh request, and speaker tone. T he 14.31818-MHz oscillator input provides the cloc k source for th[...]

2-4 Service Guide Enhanced Power Management PIIX4’s power managem ent functions inc lude enhanced clock c ontrol, local and global monitor ing support for 14 individual devices, and var ious low-power (suspend) states , such as Power-On Suspend, Suspend-to- DRAM, and Suspend-to-D isk . A har dware-based therm al m anagem ent cir cuit perm its sof[...]

Major Chips Description 2-5 • Full Support for Advanced Configuration and Power Interface (ACPI) Revision 1.0 Specification and OS Directed Power Management • Integrated IDE Controller • Independent Timing of up to 4 Drives • PIO Mode 4 and Bus Master IDE Transfers up to 14 Mbytes/sec • Supports “Ultra DMA/33” Synchronous DMA Mode Tra[...]

2-6 Service Guide The 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multi-f unction PCI device implem enting a PCI-to- ISA bridge func tion, a PCI IDE function, a Univers al Serial Bus host/hub func tion, and an Enhanc ed Power Management f unction. As a PCI-to-ISA bridge, PIIX 4 integrates many com mon I/O f unctions found in ISA-based PC systems—[...]

Major Chips Description 2-7 2.2.3 Block Diagram Figure 2-2 PIIX4 Simplified Block Diagram[...]

2-8 Service Guide 2.2.4 Pin Descriptions This s ection provides a detailed desc ription of each signal. T he signals are arranged in functional groups according to their associated interface. The “#” symbol at the end of a signal name indic ates that the active, or asser ted state occurs when the signal is at a low voltage level. W hen “#” [...]

Major Chips Description 2-9 Table 2-2 82371AB Pin Descriptions Name Type Description PCI BUS INTERFACE AD[31:0] I/O PCI ADDRESS/DATA. AD[31:0] is a multiplexed address and data bus. During the first clock of a transaction, AD[31:0] contain a physical byte address (32 bits). During subsequent clocks, AD[31:0] contain data. A PIIX4 Bus transaction co[...]

2-10 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description IRDY# I/O INITIATOR READY. IRDY# indicates PIIX4’s ability, as an Initiator, to complete the current data phase of the transaction. It is used in conjunction with TRDY#. A data phase is completed on any clock both IRDY# and TRDY# are sampled asserted. During a write, IRDY[...]

Major Chips Description 2-11 Table 2-2 82371AB Pin Descriptions Name Type Description TRDY# I/O TARGET READY. TRDY# indicates PIIX4’s ability to complete the current data phase of the transaction. TRDY# is used in conjunction with IRDY#. A data phase is completed when both TRDY# and IRDY# are sampled asserted. During a read, TRDY# indicates that [...]

2-12 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description IOW# I/ O I/O WRITE. IOW# is the command to an ISA I/O slave device that the slave may latch data from the ISA data bus (SD[15:0]). IOW# is an output when PIIX4 owns the ISA Bus. IOW# is an input when an external ISA master owns the ISA Bus. During Reset: High-Z After Reset[...]

Major Chips Description 2-13 Table 2-2 82371AB Pin Descriptions Name Type Description SA[19:0] I/O SYSTEM ADDRESS[19:0]. These bi-directional address lines define the selection with the granularity of 1 byte within the 1-Megabyte section of memory defined by the LA[23:17] address lines. The address lines SA[19:17] that are coincident with LA[19:17][...]

2-14 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description KBCCS#/ GPO26 O KEYBOARD CONTROLLER CHIP SELECT. KBCCS# is asserted during I/O read or write accesses to KBC locations 60h and 64h. It is driven combinatorially from the ISA addresses SA[19:0] and LA[23:17]. If the keyboard controller does not require a separate chip select[...]

Major Chips Description 2-15 Table 2-2 82371AB Pin Descriptions Name Type Description XOE#/ GPO23 O X-BUS TRANSCEIVER OUTPUT ENABLE. XOE# is tied directly to the output enable of a 74’245 that buffers the X-Bus data, XD[7:0], from the system data bus, SD[7:0]. XOE# is asserted anytime a PIIX4 supported X-Bus device is decoded, and the devices dec[...]

2-16 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description INTERRUPT CONTROLLER/APIC SIGNALS APICACK#/ GPO12 O APIC ACKNOWLEDGE. This active low output signal is asserted by PIIX4 after its internal buffers are flushed in response to the APICREQ# signal. When the I/O APIC samples this signal asserted it knows that PIIX4’s buffers[...]

Major Chips Description 2-17 Table 2-2 82371AB Pin Descriptions Name Type Description IRQ 12/M I INTERRUPT REQUEST 12. In addition to providing the standard interrupt function as described in the pin description for IRQ[3:7,9:11,14:15], this pin can also be programmed to provide the mouse interrupt function. When the mouse interrupt function is sel[...]

2-18 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description INIT OD INITIALIZATION. INIT is asserted in response to any one of the following conditions. When the System Reset bit in the Reset Control Register is reset to 0 and the Reset CPU bit toggles from 0 to 1, PIIX4 initiates a soft reset by asserting INIT. PIIX4 also asserts I[...]

Major Chips Description 2-19 Table 2-2 82371AB Pin Descriptions Name Type Description PCICLK I FREE-RUNNING PCI CLOCK. A clock signal running at 30 or 33 MHz, PCICLK provides timing for all transactions on the PCI Bus. All other PCI signals are sampled on the rising edge of PCICLK, and all timing parameters are defined with respect to this edge. Be[...]

2-20 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description PDDACK# O PRIMARY DMA ACKNOWLEDGE. This signal directly drives the IDE device DMACK# signal. It is asserted by PIIX4 to indicate to IDE DMA slave devices that a given data transfer cycle (assertion of PDIOR# or PDIOW#) is a DMA data transfer cycle. This signal is used in co[...]

Major Chips Description 2-21 Table 2-2 82371AB Pin Descriptions Name Type Description SDA[2:0] O SECONDARY DISK ADDRESS[2:0]. These signals indicate which byte in either the ATA command block or control block is being addressed. If the IDE signals are configured for Primary and Secondary, these signals are connected to the corresponding signals on [...]

2-22 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description SDIOR# O SECONDARY DISK IO READ. In normal IDE mode, this is the command to the IDE device that it may drive data onto the SDD[15:0] lines. Data is latched by the PIIX4 on the negation edge of SDIOR#. The IDE device is selected either by the ATA register file chip selects ([...]

Major Chips Description 2-23 Table 2-2 82371AB Pin Descriptions Name Type Description POWER MANAGEMENT SIGNALS BATLOW#/ GPI9 I BATTERY LOW. Indicates that battery power is low. PIIX4 can be programmed to prevent a resume operation when the BATLOW# signal is asserted. If the Battery Low function is not needed, this pin can be used as a general-purpo[...]

2-24 Service Guide Table 2-2 82371AB Pin Descriptions Name Type Description SUSA# O SUSPEND PLANE A CONTROL. Control signal asserted during power management suspend states. SUSA# is primarily used to control the primary power plane. This signal is asserted during POS, STR, and STD suspend states. During Reset: Low After Reset: High During POS: Low [...]

Major Chips Description 2-25 Table 2-2 82371AB Pin Descriptions Name Type Description GPO[30:0] O GENERAL PURPOSE OUTPUTS. These output signals can be controlled via the GPIREG register located in Function 3 (Power Management) System IO Space at address PMBase+34h. If a GPO pin is not multiplexed with another signal or defaults to GPO, then its sta[...]

2-26 Service Guide Signal Name Multiplexed With Default Control Register and Bit (PCI Function 1) Notes GPO[9:11] GNT[A:C]# GPO GENCFG Bits [8:10] Not available as GPO if using for PC/PCI. Can be individually enabled, so GPO[11] is available if REQ[C]# not used. GPO12 APICACK# GPO XBCS Bit 8 Not available as GPO if using external APIC. GPO13 APICCS[...]

Major Chips Description 2-27 Table 2-2 82371AB Pin Descriptions (continued) Name Type Description CONFIG2 I CONFIGURATION SELECT 2. This input signal is used to select the positive or subtractive decode of FFFF0000h–FFFFFFFFh memory address range (top 64 Kbytes). If CONFIG[2]=0, the PIIX4 will positively decode this range. If CONFIG[2]=1, the PII[...]

2-28 Service Guide 2.3 NM2160 The NM2160 is a high performance Flat Panel Video Accelerator that integrates in one single chip, 2 Mbytes of High Speed DRAM, 24-bit true-color RAM DAC, Graphics/Video Accelerator , Dual clock synthesizer, TV Out support, ZV(Zoom ed Video) port, Z-Buffer Data Stripping, PCI Bus Mastering and a high speed glueless 32-b[...]

Major Chips Description 2-29 • High Speed 2Mbytes of integrated DRAM • 128 bit Memory Interface • Bus Support • PCI 2.1 compliance Local Bus(Zero wait states) • 3.3Volts or 5Volts operation • EMI Reduction • Spread Spectrum Clocking technology for reduced panel EMI • Hardware Cursor and Icon • Relocatable Hardware Cursor and Icon [...]

2-30 Service Guide 2.3.2 Pin Diagram Figure 2-3 NM2160 Pin Diagram[...]

Major Chips Description 2-31 2.3.3 Pin Descriptions Conventions used in the pin description types: I Input into NM2160 O Output from NM2160 I/O Input and Output to/from NM2160 T/S Tri-state during un-driven state S/T/S Before becoming tri-state the pin will be driven inactive O/D Open-drain type output Table 2-3 NM2160 Pin Descriptions Number Pin n[...]

2-32 Service Guide Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 72 FRAME# I/O Frame This active-low signal is driven by the bus master to indicate the beginning and duration of an access. NM2160 drives this pin in the Bus Master mode 65 PAR I/O Parity Even parity across AD31:0&C/BE3:0# is driven by the bus master during add[...]

Major Chips Description 2-33 Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 83 XCKEN I External Clock Enable This pin is used to select between internally synthesized clocks or externally supplied clocks. A low level on the pin selects internal mode and a high level selects external mode. In the external clock mode, the internal [...]

2-34 Service Guide Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 108 FPBACK O Flat Panel Backlight This is used to control the backlight power to the panels or as a General Purpose Output Pin as defined by register CR2F bits 3&2 7 6 5 4 3 2 176 174 172 171 170 169 18 17 16 15 14 13 117 118 119 120 121 122 123 124 126 127 128[...]

Major Chips Description 2-35 Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 96 B O (Analog) BLUE This DAC analog output drives the CRT interface 101 REXT I (Analog) DAC Current reference This pin is used as a current reference by the internal DAC. Please refer to the NM2160 system schematics for the external circuit TV interface [...]

2-36 Service Guide Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 167 166 165 164 163 162 161 160 UV7 UV6 UV5 UV4 UV3 UV2 UV1 UV0 I Chrominance Data 7:0 These are the 8-bits of chrominance data that are input to the ZV port of NM2160 159 158 155 152 151 150 149 148 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 I Luminance Data 7:0 These are the 8-bits[...]

Major Chips Description 2-37 Table 2-3 NM2160 Pin Descriptions Number Pin name I/O Description 136, 154, 173 DVSS DRAM ground 105 AVSSM Analog ground for MCLK synthesizer 104 AVSSV Analog ground for VCLK synthesizer 99 AVSSR1 Analog ground for DAC 100 AVSSR2 Analog ground for DAC current reference 91 AVSSX1 Analog ground for crystal oscillator 25, [...]

2-38 Service Guide 2.4 NMA1 NMA1 is a single audio chip that integrates OPL3 FM and its DAC, 16bit Sigm a-delta CODEC, MPU401 MIDI interface, and a 3D enhanced controller including all the analog components which is suitable for multi-m edia application. This LSI is fully comp liant with Plug and Play ISA 1.0a, and supports all the necessary featur[...]

Major Chips Description 2-39 2.4.2 Block Diagram Figure 2-4 NMA1 Block Diagram[...]

2-40 Service Guide 2.4.3 Pin Diagram Figure 2-5 NMA1 Pin Diagram[...]

Major Chips Description 2-41 2.4.4 Pin Descriptions Conventions used in the pin description types: I+: Input Pin with Pull up Resistor T: TTL-tri-state output pin Schmitt: TTL-Schmitt input pin O+: Output Pin with Pull up Resistor Table 2-4 NMA1 Pin Descriptions Pin name Number I/O Description ISA bus interface: 36 pins D7-0 8 I/O Data Bus A15-0 12[...]

2-42 Service Guide Table 2-4 NMA1 Pin Descriptions Pin name Number I/O Description ADFLTR 1 Right input filter VOCOL 1 O Left voice output VOCOR 1 O Right voice output VOCIL 1 I Left voice input VOCIR 1 I Right voice input Miscellaneous pins: 14 pins SYEN 1 I External synthesizer enable input SYCS 1 O External synthesizer chip select output SYCLK 1[...]

Major Chips Description 2-43 2.5 Philips 87C552 Sy stem M anagement Controller The 87C552 Single-Chip 8-Bit Microc ontroller is manuf actured in an advanced CMOS proc ess and is a derivative of the 80C51 microcontr oller family. The 87C552 has the s ame instruc tion set as the 80C51. The 87C552 contains a 8kx8 a volatile 256x8 r ead/w rite data m e[...]

2-44 Service Guide 2.5.2 Block Diagram Figure 2-6 87C552 Block Diagram[...]

Major Chips Description 2-45 2.5.3 Pin Diagram 9 P4.2/CMSR2 8 P4.1/CMSR1 7 P4.0/CMSR0 6 EW# 5 PWM1# 4 PWM0# 3 STADC 2 VDD 1 P5.0/ADC0 68 P5.1/ADC1 67 P5.2/ADC2 66 P5.3/ADC3 65 P5.4/ADC4 64 P5.5/ADC5 63 P5.6/ADC6 62 P5.7/ADC7 6 1 AVDD 6 0 AVSS 59 AVref+ 58 AVref– 57 P0.0/AD0 56 P0.1/AD1 55 P0.2/AD2 54 P0.3/AD3 53 P0.4/AD4 52 P0.5/AD5 51 P0.6/AD6 5[...]

2-46 Service Guide 2.5.4 Pin Descriptions Table 2-5 87C552 Pin Descriptions Mnemonic Pin No. Type Name And Function V DD 2I Digital Power Supply: +5V power supply pin during normal operation, idle and power-down mode. STADC 3 I Start ADC Operation: Input starting analog to digital conversion (ADC operation can also be started by software). PWM0# 4 [...]

Major Chips Description 2-47 Table 2-5 87C552 Pin Descriptions Mnemonic Pin No. Type Name And Function P4.0-P4.7 7-14 I/O Port 4: 8-bit quasi-bidirectional I/O port. Alternate functions include: 7-12 O CMSR0-CMSR5 (P4.0-P4.5): Timer T2 compare and set/reset outputs on a match with timer T2. 13, 14 13, 14 O CMT0, CMT1 (P4.6, P4.7): Timer T2 compare [...]

2-48 Service Guide 2.6 NS97338VJG Super I/ O Contr oller The PC97338VJG is a single chip solution f or most c omm only us ed I/O peripherals in ISA, and EISA based com puters. It incorpor ates a Floppy Dis k Controller(F DC), two full featured UART s, and an IEEE 1284 com patible parallel port Standard PC-AT addr ess decoding for all the peripheral[...]

Major Chips Description 2-49 • The Bidirectional Parallel Port: • Enhanced Parallel Port(EPP) compatible • Extended Capabilities Port(ECP) compatible, including level 2 support • Bidirectional under either software or hardware control • Compatible with ISA, and EISA, architectures • Ability to multiplex FDC signals on parallel port pins[...]

2-50 Service Guide 2.6.2 Block Diagram Confi g uration Re g isters UART (16550 or 16450) UART + IrDA/HP & Sharp IR (16550 or 16450) General Purpose Re g isters Power Down Lo g ic IEEEE1284 Parallel Port Hifh Current Driver Floppy Disk Controller with Di g ital Data Separator (Enhabced 8477) I/O Ports Control Interrupt Data Handshake Floppy Driv[...]

Major Chips Description 2-51 2.6.3 Pin Diagram Figure 2-9 NS97338VJG Pin Diagram[...]

2-52 Service Guide 2.6.4 Pin Description Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description A15-A0 67, 64, 62-60, 29, 19- 28 I Address. T hese address lines from the microprocessor determine which internal register is accessed. A0-A15 are don't cares during DMA transfer. /ACK 83 I Parallel Port Acknowledge. This input is pulsed low [...]

Major Chips Description 2-53 Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description /CTS1, /CTS2 72, 64 I UARTs Clear to Send. W hen low, this indicates that the modem or data set is ready to ex change data. The /CTS signal is a modem status input. T he CPU tests the condition of this /CT S signal by reading bit 4 (CTS) of the M odem Status [...]

2-54 Service Guide Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description /DR1 (PPM Mode) 83 O FDC Drive Selec t 1 . T his pin offers an additional Drive Select signal in PPM M ode when PNF = 0. It is drive select 1 when bit 4 of FC R is 0. It is drive select 0 when bit 4 of FCR is 1. This signal is active low. /DR23 47 O FDC Drive 2 or 3. /[...]

Major Chips Description 2-55 Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description /HDSEL (Normal Mode) 32 O FDC Head Select. This output determines w hich side of the FDD is accessed. Active selects side 1, inactive selects side 0. /HDSEL (PPM Mode) 77 O FDC Head Select. T his pin offers an additional Head Select signal in PPM Mode when PN[...]

2-56 Service Guide Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description IRTX 63 O Infrared Transmit. I nfrared serial data output. Softw are configuration selects either IrDA or Sharp-IR protocol. This pin is multiplexed with SOUT2/BOUT/CFG0. MR 100 I Master Reset. Active high output that resets the controller to the idle state and resets [...]

Major Chips Description 2-57 Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description /RI1 /RI2 68, 60 I UA RTs Ring Indicator. W hen low, this indicates that a telephone ring signal has been received by the modem. The /RI signal is a modem status input whose condition is tested by the CPU by reading bit 6 (RI) of the Modem Status R egister (M[...]

2-58 Service Guide Table 2-6 NS97338VJG Pin Descriptions Pin No. I/O Description /TRK0 (PPM Mode) 91 I FDC Track 0. This pin giv es an additional Track 0 signal in PPM Mode when PNF = 0. VDDB, C 48, 97 Power Supply . This is the 3.3V/5V supply voltage for the PC87332VJG circuitry. VSSB-E 40, 7, 88, 59 Ground. This is the ground for the PC87332VJG c[...]

Major Chips Description 2-59 2.7 CL-PD6832: PCI-to-CardBus Host A dapter The CL-PD6832 is a single-chip PC Card host adapter s olution capable of controlling two fully independent CardBus sock ets. The chip is com pliant w ith PC Card Standard, PCMCIA 2.1, and JEDIA 4.1 and is optim ized for use in notebook and handheld com puter s where reduced f [...]

2-60 Service Guide • 208-pin PQFP 2.7.2 Pin Diagram Figure 2-10 CL-PD6832 Pin Diagram 2.7.3 Pin Descriptions The following conventions apply to the pin description tables: • A pound sign (#) at the end of a pin name indicates an active-low signal for the PCI bus. • A dash (-) at the beginning of a pin name indicates an active-low signal for t[...]

Major Chips Description 2-61 • An asterisk (*) at the end of a pin name indicates an active-low signal that is a general-interface for the CL-PD6832. • A double-dagger superscript ( ) at the end of the pin name indicates signals that are used for power-on configuration switches. • The l/O-type code (I/O) column indicates the input and output [...]

2-62 Service Guide The following table lists the pin descriptions Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number I/O Power PCI Bus Interface Pins AD[31:0] PCI Bus Address Input / Data Input/Outputs: These pins connect to PCI bus signals AD[31:0]. 4-5, 7-12, 16-20, 22-24, 38-43, 45- 46, 48 49, 51-56 I/O 4 C/BE[3:0]# PCI Bus Com[...]

Major Chips Description 2-63 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number I/O Power SERR# System Error: This output is pulsed by the CL- PD6832 to indicate an address parity error. 34 O- OD 4 PAR Parity: This pin is sampled the clock cycle after completion of each corresponding address or write data phase. For read operation[...]

2-64 Service Guide Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number I/O Power SIN# /INTD# /ISDAT Serial Interrupt Input / PCI Bus Interrupt D / Serial IRQ Data: In PCI Interrupt Signaling mode, this output can be used as an interrupt output connected to the PCI bus INTD# interrupt line. In PC/PCI Serial Interrupt Signaling mode,[...]

Major Chips Description 2-65 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. (socket A) Pin No. (socket B) I/O Power Socket Interface Pins -REG/ CC/BE3# Register Access: In Memory Card Interface mode, this output chooses between attribute and common memory. In l/O Card Interface mode, this signal is active (low) for non DMA transf[...]

2-66 Service Guide Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. (socket A) Pin No. (socket B) I/O Power A12/ CC/BE2# PCMCIA socket address 12 output. In CardBus mode, this pin is the Cardbus C/BE2# signal. 97 173 I/O 2 or 3 A[11:9]/ CAD[12,9,14] PCMCIA socket address 11:9 outputs. In CardBus mode, these pins are the Cardbus add[...]

Major Chips Description 2-67 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. (socket A) Pin No. (socket B) I/O Power -IORD/ CAD13 I/O Read: This output goes active (low) for l/O reads from the socket to the CL- PD6832. In CardBus mode, this pin is the CardBus address/data bit 13. 78 154 I/O 2 or 3 -IOWR/ CAD15 I/O Write: This outp[...]

2-68 Service Guide Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. (socket A) Pin No. (socket B) I/O Power -CE2/ CAD10 Card Enable pin is driven low by the CL- PD6832 during card access cycles to control byte/word card access. -CE1 enables even-numbered address bytes, and -CE2 enables odd-numbered address bytes. When configured fo[...]

Major Chips Description 2-69 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin No. (socket A) Pin No. (socket B) I/O Power BVD1/ -STSCHG/ -RI/ -CSTSCHG Battery Voltage Detect 1 / Status Change / Ring Indicate: In Memory Card Interface mode, this input serves as the BVD1 (battery-dead status) input. In I/O Card Interface mode, this input[...]

2-70 Service Guide Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number I/O Power Power Control and General Interface Pins SPKR_OUTt Speaker Output: This output can be used as a digital output to a speaker to allow a system to support PCMCIA card fax/modem/voice and audio sound output. This output is enabled by setting the socket’[...]

Major Chips Description 2-71 Table 2-7 CL-PD6832 Pin Descriptions Pin Name Description Pin Number I/O Power SLATCH/ SMBLCKt Serial Latch / System Management Bus Clock: This pin serves as output pin SLATCH when used with the serial interface of Texas Instruments' TPS2202AIDF socket power control chip, and serves as a bidirectional pin SMBCLK wh[...]

2-72 Service Guide 2.8 A mbit T62.036. C DC-DC Converter This T 62.036.C DC-DC converter s upplies multiple DC(5V, 3,3V, 12V) output to system, and also supplies the battery charge curr ent (0~3.5A). The total inputs f rom the notebook would be limited by the total output of 65 watts maximum. 2.8.1 Pin Diagram 2 - VDCF 4 - VDCF 6 - GND 8 - DCIN 10 [...]

Major Chips Description 2-73 Table 2-8 T62.036.C Pin Descriptions Pin Name Pin Type Pin No. Description source such as docking station power supply. This level is 2 Amps per volt nominal. The source impedance is less than 1K Ω . CHARGSP I 14 Analog input from the system board to limit the total current consumed by the system from the AC adapter. [...]

2-74 Service Guide 2.9 A mbit DC-AC Inverter This notebook uses two kinds of DC-AC inverters: One ( T62.088.C) is designed f or the 13.3-inch TFT (LG LP133X1) LCD, the other (T62.055.C) for the 12.1-inch TFT (IBM ITSV50D) LCD. 2.9.1 T62.055C 2.9.1.1 Pin Diagram CN2 CN1 T62.055. C 1 2 21 20 3 2 1 CN3 Figure 2-12 T62.055.C Pin Diagram 2.9.1.2 Pin Des[...]

Major Chips Description 2-75 Table 2-9 T62.055.C Pin Descriptions Pin Name Pin Type Pin No. Descriptions BATTLED O 13 This signal is an open collector sink signal to drive LED2. The LED current is limited by a series resistor of 1K Ω . BMCVCC O 14 This a 5 volt supply for powering the LEDs. It should not be used for any other purpose. ADVDD O 18 [...]

2-76 Service Guide Table 2-10 T62.088.C Pin Descriptions Pin Name Pin Type Pin No. Descriptions ADVDD I 1 This is a 5-volt power line for the analog circuits and display LEDs on the inverter board. MIC_OUT O 2 Microphone preamplifier circuit output AUDGND I/O 3 Microphone circuit return ground GND I/O 4, 5 System ground SGND I/O 6 Signal ground CNT[...]

&KDSWHU &KDSWHU BIOS Setup Information BIOS Setup Information 3-1 The com puter BIOS setup utility allows y ou to conf igur e the c om puter and its hardware settings . T he com puter comes correctly configured, and [...]

3-2 Service Guide 3.1 A bout My Computer Selecting About My Computer presents y ou with two screens of details about the computer and its peripherals. T hese screens are for infor mation only; y ou c annot change the settings on thes e screens . The following table tells y ou what each of the items on the About My Com puter screens are. Table 1-1 A[...]

BIOS Setup Information 3-3 3.2 Sy stem Configuration Selecting System Conf iguration presents a Basic System Configuration screen, where y ou can change several items in your computer’s configuration. Press ↑ or ↓ to m ove from one item to another, and ← or → to change settings. Press F1 to get help on a selected item . Press Esc to exit [...]

3-4 Service Guide 3.2.6 Internal Speaker This parameter lets you enable or disable the internal speaker. The default setting is Enabled. Tip: You can also toggle the s peaker on and off by press ing the speaker hot key combination Fn+F7. 3.2.7 Silent Boot W hen set to Enabled, the computer shows the computer logo ons creen and hides the POST routin[...]

BIOS Setup Information 3-5 3.3 A dvanced Sy stem Configuration For advanced user s, the System Conf iguration m enu item contains two hidden pages that allow you to view and configure more technical aspects of the computer. Caution: The computer is alr eady tuned for optimum performance and y ou should not need to access these advanced scr eens. If[...]

3-6 Service Guide • Hard Disk 32 Bit Access. This parameter allows your hard disk to use 32-bit access. The available values are: Auto and Disabled. The default setting is Auto. Tip: We s uggest you set all of these parameters to Auto whenever that choic e is available. This allows the computer to use the hard drive at the highest possible perfor[...]

BIOS Setup Information 3-7 3.4 Pow er Saving Options Selecting Power Saving Options on the BIO S Utility m ain screen presents a screen that allow s you to adjust several power-saving settings. 3.4.1 When Lid is Closed The com puter’s lid switch ac ts as its power switch: opening the display wakes up the c omputer, closing the display puts it to [...]

3-8 Service Guide 3.4.5 Resume On Schedule W hen this par ameter is set to Enabled, the c omputer res umes f rom sus pend-to-mem ory m ode at the specified date and time. Enabling this option overrides the suspend-to-disk function. The Resum e Date and Resume T ime param eters let you set the date and time for the resume operation. The date and tim[...]

BIOS Setup Information 3-9 3.5 Sy stem Security W hen y ou select Sy s tem Security from the BIOS Utility main s creen, a screen appear s that allows you to set security options. Important! If a p assword i s current ly prese nt, the system prompts you to input the pas sword before entering the System Security screen. 3.5.1 Supervisor and User Pass[...]

3-10 Service Guide 3.5.2 Diskette Drive Access Control This par ameter allows you to control the read and write functions of the floppy drive. T he available options. are: Normal, Write Protect, and Disabled. The default is Normal. W ith this parameter set to Norm al, the floppy drive functions norm ally. W hen the param eter is set to W r ite Prot[...]

BIOS Setup Information 3-11 3.6 Reset T o Default Settings W hen y ou select the Reset To Def ault Settings from the BIOS Utility main s creen, a dialog box appears asking you to confirm that you want to reset all settings to their factory defaults.[...]

&KDSWHU &KDSWHU Disassembly and Unit Replacement Disassembly and Unit Replacement 4-1 This chapter contains step-by-step procedures on how to disas semble the notebook computer f or maintenance and troubleshooting. T[...]

4-2 Service Guide Figure 4-1 Removing the Battery Pack Removing all power sources from the system prevents accidental short circuit during the disassembly process. a b c[...]

Disassembly and Unit Replacement 4-3 4.1.2 Connector Types There are two kinds of connectors on the main board: • Connectors with no locks Unplug the cable by simply pulling out the cable from the connector. • Connectors with locks You can use a plastic stick to lock and unlock connectors with locks. The cables used here are special FPC (flexib[...]

4-4 Service Guide Connectors mentioned in the following procedures are assumed to be no-lock connectors unless specified otherwise. 4.1.3 Disassembly Sequence The disassembly procedure described in this manual is divided into eight major sections: • Section 4.2: Removing the module • Section 4.3: Replacing the hard disk drive • Section 4.4: R[...]

Disassembly and Unit Replacement 4-5 The following diagram details the disassembly flow. Figure 4-3 Disassembly Flow[...]

4-6 Service Guide 4.2 Removing the M odule If you are going to disassem ble the unit, it is advisable to rem ove the module f irst before proceeding. Follow these steps to remove the module: 1. Slide out and hold the module release button. 2. Press the module release latch and slide out the module. Figure 4-4 Removing the Module Module Release Lth [...]

Disassembly and Unit Replacement 4-7 4.3 Replacing the Hard Disk Drive Follow these steps: 1. Turn the computer over to access the base. 2. Remove the two screws from the hard disk drive bay cover and remove the cover. Figure 4-5 Removing the Hard Disk Drive Bay Cover 3. Lift up (1), then pull out the hard disk drive; then flip the hard disk drive [...]

4-8 Service Guide 4.4 Replacing Memory The m emory slots (SIMM1 and SIMM2) are access ible via the mem ory door at the base of the unit. Follow these steps to install memory module(s): 1. Turn the computer over to access the base. 2. Remove the screws from the memory door and remove the door. Figure 4-7 Installing a Memory Module 3. Remove the memo[...]

Disassembly and Unit Replacement 4-9 You must run the Sleep Manager utility after installing additional memory in order for the 0V Suspend function to operate in your system. If Sleep Manager is active, it will auto-adjust the partition/file on your notebook for 0V Suspend to function properly. If you are using an operating system other than Window[...]

4-10 Service Guide 4.5 Removing the Key board Follow these steps to remove the keyboard: 1. Slide out the two display hinge covers on both sides of the notebook. Figure 4-9 Removing the Display Hinge Covers 2. Pull out (first from the edges) and remove the center hinge cover. Figure 4-10 Removing the Center Hinge Cover[...]

Disassembly and Unit Replacement 4-11 3. Lifting out the keyboard takes three s teps — (a) lifting up the k ey board, (b) rotating the keyboard to one side, and (c) pulling out the keyboard in the opposite direction. Figure 4-11 Lifting Out the Keyboard 4. Flip the keyboard over and unplug the keyboard connectors (CN4, CN5) to rem ove the keyboar[...]

4-12 Service Guide 4.6 Replacing the CPU Follow these steps to remove the CPU module. 1. Remove six screws that secure the CPU heat sink to the chassis. Figure 4-13 Removing the CPU Heat Sink 2. Remove one screw and pull up the CPU module. (CN8, CN12) When inserting a CPU module, take note of the female and male connectors on the CPU module. These [...]

Disassembly and Unit Replacement 4-13 4.7 Removing the Display Follow these steps to remove the display module. 1. Remove the two screws that sec ure the display cable to the m otherboard. Then unplug the display cable (CN6). Figure 4-15 Unplugging the Display Cable 2. Remove the four display hinge screws. Detach the display from the main unit and [...]

4-14 Service Guide 4.8 Disassembl i ng the Housi ng This section discus ses how to disassem ble the housing, and during its course, includes removing and replacing of certain major components like the hard disk drive, memory and the main board. 4.8.1 Detaching the Lower Housing from the Inside Assembly To detach the lower hous ing from the inside a[...]

Disassembly and Unit Replacement 4-15 4.8.2 Detaching the Upper Housing from the Inside Assembly Follow these steps: 1. Remove three screws in the battery bay. Figure 4-18 Removing the Battery Bay Screws 2. Turn the unit bac k over and rem ove tw o screws c lose to the back part of the unit. Then s nap out the upper part of the housing — (1) firs[...]

4-16 Service Guide 4.8.3 Removing the Touchpad Follow these steps to remove the touchpad: 1. Unplug the touchpad connector (CN5). 2. Pull up and remove the touchpad. Figure 4-20 Removing the Touchpad 4.8.4 Removing the Main Board Follow these steps to remove the main board from the inside assembly. 1. Unplug the speaker connectors (CN17 and CN23), [...]

Disassembly and Unit Replacement 4-17 2. Remove four screws to remove the main board from the inside assembly. Figure 4-22 Removing the Main Board 3. Remove the charger boar d (CN19 and CN20) and the m ultimedia board ( CN10 and CN7) from the main board. Figure 4-23 Removing the Charger Board and Multimedia Board[...]

4-18 Service Guide 4. The PC c ard slot m odule is usually part of the main boar d spare part. T his rem oval pr ocedure is for reference only. To remove the PC card slot module, remove two screws. Figure 4-24 Removing the PC Card Slots[...]

Disassembly and Unit Replacement 4-19 4.9 Disassembling the Display Follow these steps to disassemble the display: 1. Remove the teardrop-s haped LCD bumpers at the top of the dis play and the long bum per on the LCD hinge. Figure 4-25 Removing the LCD Bumpers 2. Remove four screws on the display bezel. Screw lis t: M2L6 x2 (for 11.3” or 11.8” [...]

4-20 Service Guide 3. Pull out and remove the display bezel by pulling on the inside of the bezel sides.         Figure 4-27 Removing the Display Bezel 4. Remove the four display panel screws, and unplug the inverter and display panel c onnectors. Then tilt up and remove the display panel.    Screw li st: s M2.5L6 ([...]

Disassembly and Unit Replacement 4-21 5. Remove the two display ass embly screws and unplug the display cable connector f rom the display cable assembly. Then remove the LCD inverter and ID boards.   DC- AC in vert er Screw l ist: s M2 .5L6 (bin d he ad ) x2 s s Figure 4-29 Removing the Display Cable Assembly LCD Inverter[...]

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A-2 Service Guide 0: w/o HDD, FDD, CD-ROM 2: 2.0GB HDD + FDD + CD-ROM 3: 3.0GB HDD + FDD + CD-ROM 4: 4.0GB HDD + FDD + CD-ROM VU: LCD size T: 12.1” TFT LCD TE: 13.3” TFT LCD[...]

$S $S SHQG SHQG L[% L[% Exploded View Diagram Exploded View Diagram This appendix includes exploded view diagrams of the notebook. Table B-1 Exploded View Diagram List No. Description B-1 System assembly B-2 13.3-inch LCD Module a[...]

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$S $S SHQG SHQG L[& L[& Spare Parts List Spare Parts List C-1 This appendix lists the spare parts of the notebook computer. Table C-1 Spare Parts List Level Description Acer part no. Comment/location Min. Qty LCD Module 1 [...]

C-2 Service Guide Table C-1 Spare Parts List Level Description Acer part no. Comment/location Min. Qty CD-ROM 1 ASSY CD-ROM MODULE (14X) 7300 6M.44B01.001 65.42A01.001 10 1-2 C.A FPC CD-ROM 14X 970T 50.42A03.001 50 1-2 ASSY CD-ROM 14X BZL 970T 60.42A05.001 50 FDD 1 ASSY FDD MODELE 7300 6M.44B02.001 65.46802.001 20 1-2 CABLE ASSY FDD 52P 970 50.4680[...]

$SSHQGL[' $SSHQGL[' Schematics Schematics D-1 This appendix includes the schematic diagrams of the notebook. Table D-1 Schematics Diagram List Page Description System Board D-3 Index Page D-4 Revision History D-5 Clock G[...]

D-2 Service Guide Table D-1 Schematics Diagram List Page Description D-34 PCMCIA Controller D-35 PCMCIA Sockets D-36 PCMCIA Socket Power and Interrupt Control D-37 System / Media Board Connector D-38 Internal Keyboard and Touchpad Connector D-39 CRT & LCD Controller D-40 LCD Interface Logics D-41 Isolation Logic and Spare Parts[...]

Schematics D-3[...]

D-4 Service Guide[...]

Schematics D-5[...]

D-6 Service Guide[...]

Schematics D-7[...]

D-8 Service Guide[...]

Schematics D-9[...]

D-10 Service Guide[...]

Schematics D-11[...]

D-12 Service Guide[...]

Schematics D-13[...]

D-14 Service Guide[...]

Schematics D-15[...]

D-16 Service Guide[...]

Schematics D-17[...]

D-18 Service Guide[...]

Schematics D-19[...]

D-20 Service Guide[...]

Schematics D-21[...]

D-22 Service Guide[...]

Schematics D-23[...]

D-24 Service Guide[...]

Schematics D-25[...]

D-26 Service Guide[...]

Schematics D-27[...]

D-28 Service Guide[...]

Schematics D-29[...]

D-30 Service Guide[...]

Schematics D-31[...]

D-32 Service Guide[...]

Schematics D-33[...]

D-34 Service Guide[...]

Schematics D-35[...]

D-36 Service Guide[...]

Schematics D-37[...]

D-38 Service Guide[...]

Schematics D-39[...]

D-40 Service Guide[...]

Schematics D-41[...]

$SSHQGL[( $SSHQGL[( BIOS POST Checkpoints BIOS POST Checkpoints E-1 This appendix lists the POST checkpoints of the notebook BIOS. Table E-1 POST Checkpoint List Checkpoint Description 04h • Determines if the current booting pro[...]

E-2 Service Guide Table E-1 POST Checkpoint List Checkpoint Description 24h • Tests programmable interrupt controller (8259) • Initializes system interrupt 30h • Enables system shadow RAM 34h • Memory sizing 5Ah • Changes SMBASE, copy SMI Handler. • 56h • Issues 1st software SMI to communicate with PMU. • Initializes the SMI environ[...]

BIOS POST Checkpoints E-3 Table E-1 POST Checkpoint List Checkpoint Description 74h • Serial port testing 78h • Math coprocessor testing 7Ch • Reset pointing device 80h • Set security status 84h • KB device initialization • Set KB led upon setup requests • Enable KB device 86h • Issue 2nd software SMI to communicate with PMU • Ena[...]

E-4 Service Guide[...]