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Maxim MAX12527 manuel d'utilisation

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- informations sur les caractéristiques techniques du dispositif Maxim MAX12527
- nom du fabricant et année de fabrication Maxim MAX12527
- instructions d'utilisation, de réglage et d’entretien de l'équipement Maxim MAX12527
- signes de sécurité et attestations confirmant la conformité avec les normes pertinentes

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Table des matières du manuel d’utilisation

  • Page 1

    General Description The MAX12527 is a dual 3.3V, 12-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12527 is optimized for low power, small size, and high dynamic performance in intermediate frequen - cy (IF) and baseband sampling applications. This dual AD[...]

  • Page 2

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 2 _______________________________________________________________________________________ ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV [...]

  • Page 3

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV DD , PD = GND[...]

  • Page 4

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 4 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV DD , PD = GND[...]

  • Page 5

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC _______________________________________________________________________________________ 5 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV DD , PD = GND[...]

  • Page 6

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 6 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV DD , PD = GND[...]

  • Page 7

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC _______________________________________________________________________________________ 7 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.5dBFS (differen- tial), DIFFCLK/ SECLK = OV DD , PD = GND[...]

  • Page 8

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 8 _______________________________________________________________________________________ INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE MAX12527 toc07 DIGITAL OUTPUT CODE INL (LSB) 3600 3000 1800 2400 1200 600 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 4200 f CLK = 65MHz f IN = 3.00119MHz DIFFERE[...]

  • Page 9

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC _______________________________________________________________________________________ 9 SNR, SINAD vs. ANALOG INPUT AMPLITUDE (f CLK = 65.00352MHz, f IN = 175MHz) MAX12527 toc13 A IN (dBFS) SNR, SINAD (dB) -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 25 35 45 55 65 75 15 -55 0 SNR SINAD -THD, SFDR vs. ANAL[...]

  • Page 10

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 10 ______________________________________________________________________________________ -THD, SFDR vs. ANALOG SUPPLY VOLTAGE (f CLK = 65.00352MHz, f IN = 175MHz) MAX12527 toc22 V DD (V) -THD, SFDR (dBc) 3.5 3.4 3.3 3.2 3.1 65 70 75 80 85 90 60 3.0 3.6 -THD SFDR SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE ([...]

  • Page 11

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC ______________________________________________________________________________________ 11 SNR, SINAD vs. TEMPERATURE (f IN = 175MHz, A IN = -0.5dBFS) MAX12527 toc31 TEMPERATURE ( ° C) SNR, SINAD (dB) 60 35 10 -15 62 64 66 68 70 72 60 -40 85 SNR SINAD -THD, SFDR vs. TEMPERATURE (f IN = 175MHz, A IN = -[...]

  • Page 12

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC 12 ______________________________________________________________________________________ PIN NAME FUNCTION 1, 4, 5, 9, 13, 14, 17 GND Converter Ground. Connect all ground pins and the exposed paddle (EP) together. 2 INAP Channel A Positive Analog Input 3 INAN Channel A Negative Analog Input 6 COMA Cha[...]

  • Page 13

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC ______________________________________________________________________________________ 13 PIN NAME FUNCTION 30 D0B Channel B CMOS Digital Output, Bit 0 (LSB) 31 D1B Channel B CMOS Digital Output, Bit 1 32 D2B Channel B CMOS Digital Output, Bit 2 33 D3B Channel B CMOS Digital Output, Bit 3 34 D4B Channe[...]

  • Page 14

    MAX12527 Detailed Description The MAX12527 uses a 10-stage, fully differential, pipelined architecture (Figure 1) that allows for high- speed conversion while minimizing power consump- tion. Samples taken at the inputs move progressively through the pipeline stages every half clock cycle. From input to output the total latency is 8 clock cycles. Ea[...]

  • Page 15

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC ______________________________________________________________________________________ 15 INBP 12-BIT PIPELINE ADC DIGIT AL ERROR CORRECTION CHANNEL A REFERENCE SYSTEM COMA REF AN REF AP OV DD DA V OUTPUT DRIVERS DORA CLOCK DIVIDER D ATA FORMA T 12-BIT PIPELINE ADC DIGIT AL ERROR CORRECTION OUTPUT DRIV[...]

  • Page 16

    MAX12527 Analog Inputs and Input Track-and-Hold (T/H) Amplifier Figure 3 displays a simplified functional diagram of the input T/H circuit. This input T/H circuit allows for high analog input frequencies of 175MHz and beyond and supports a V DD / 2 common-mode input voltage. The MAX12527 sampling clock controls the switched- capacitor input T/H arc[...]

  • Page 17

    Bypass REFIN and REFOUT to GND with a 0.1µF capac- itor. The REFIN input impedance is very large (>50M Ω ). When driving REFIN through a resistive divider, use resistances ≥ 10k Ω to avoid loading REFOUT. Buffered external reference mode is virtually identical to the internal reference mode except that the reference source is derived from[...]

  • Page 18

    MAX12527 sampling provides design flexibility, relaxes clock requirements, and can minimize clock jitter. System Timing Requirements Figure 5 shows the timing relationship between the clock, analog inputs, DAV indicator, DOR_ indicators, and the resulting output data. The analog input is sam- pled on the falling (rising) edge of CLKP (CLKN) and the[...]

  • Page 19

    externally isolates it from heavy capacitive loads. Refer to the MAX12527 EV Kit schematic for recommendations of how to drive the DAV signal through an external buffer. Data Out-of-Range Indicator The DORA and DORB digital outputs indicate when the analog input voltage is out of range. When DOR_ is high, the analog input is out of range. When DOR_[...]

  • Page 20

    MAX12527 The digital outputs D0A/B–D11A/B are high impedance when the MAX12527 is in power-down (PD = 1) mode. D0A/B–D11A/B enter this state 10ns after the rising edge of PD and become active again 10ns after PD transitions low. Keep the capacitive load on the MAX12527 digital out- puts D0A/B–D11A/B as low as possible (<15pF) to avoid larg[...]

  • Page 21

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC ______________________________________________________________________________________ 21 BINARY -TO-GRA Y CODE CONVERSION 1) THE MOST SIGNIFICANT GRA Y -CODE BIT IS THE SAME AS THE MOST SIGNIFICANT BINARY BIT . 0111 0100 1100 BINARY GRA Y CODE 0 2) SUBSEQUENT GRA Y -CODE BITS ARE FOUND ACCORDING TO TH[...]

  • Page 22

    MAX12527 Applications Information Using Transformer Coupling In general, the MAX12527 provides better SFDR and THD with fully differential input signals than single- ended input drive, especially for input frequencies above 125MHz. In differential input mode, even-order harmonics are lower as both inputs are balanced, and each of the ADC inputs onl[...]

  • Page 23

    Buffered External Reference Drives Multiple ADCs The buffered external reference mode allows for more control over the MAX12527 reference voltage and allows multiple converters to use a common reference. The REFIN input impedance is >50M Ω . Figure 12 shows the MAX6029 precision 2.048V bandgap reference used as a common reference for multiple [...]

  • Page 24

    MAX12527 ence, allowing REF_P, REF_N, and COM_ to be driven directly by a set of external reference sources. Figure 13 uses a MAX6029 precision 3.000V bandgap reference as a common reference for multiple convert- ers. A seven-component resistive divider chain follows the MAX6029 voltage reference. The 0.47µF capacitor along this chain creates a 10[...]

  • Page 25

    mount devices for minimum inductance. Bypass V DD to GND with a 220µF ceramic capacitor in parallel with at least one 10µF, one 4.7µF, and one 0.1µF ceramic capacitor. Bypass OV DD to GND with a 220µF ceramic capacitor in parallel with at least one 10µF, one 4.7µF, and one 0.1µF ceramic capacitor. High-frequency bypassing/decoupling capacit[...]

  • Page 26

    MAX12527 Total Harmonic Distortion (THD) THD is the ratio of the RMS sum of the first six harmon- ics of the input signal to the fundamental itself. This is expressed as: where V 1 is the fundamental amplitude, and V 2 through V 7 are the amplitudes of the 2nd- through 7th-order harmonics (HD2 through HD7). Spurious-Free Dynamic Range (SFDR) SFDR i[...]

  • Page 27

    Gain Matching Gain matching is a figure of merit that indicates how well the gains between the two channels are matched to each other. The same input signal is applied to both channels and the maximum deviation in gain is report- ed (typically in dB) as gain matching. Offset Matching Like gain matching, offset matching is a figure of merit that ind[...]

  • Page 28

    MAX12527 Dual, 65Msps, 12-Bit, IF/Baseband ADC Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 28 ____________________Maxim Integrated Products[...]