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Philips P89LPC901 manuel d'utilisation

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Table des matières du manuel d’utilisation

  • Page 1

    INTEGRATED CIRCUITS Philips Semiconductors PHILIPS 2003 Dec 8 P89LPC901/902/903 8-bit microcontrollers with accelerated two-clock 80C51 core 1KB 3V Low-Power byte-eraseable Flash with 128 Byte RAM USER MANUAL[...]

  • Page 2

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 Table of Contents 2003 Dec 8 2 Table of Contents 1. General Descrip tion ........................................................... ..................... 7 Pin Configurations ............... ................................ ............... .............. ......... 7 Product [...]

  • Page 3

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 Table of Contents 2003 Dec 8 3 Mode 6 - P89LPC901 ..... ................................................. .............. .......... 47 Timer Overflow toggle output - P89LPC901 ...... ............................ .......... 49 6. Real-Time Clock/System Timer ..................[...]

  • Page 4

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 Table of Contents 2003 Dec 8 4 Feed Sequence .............. ................................. .............................. .......... 84 Watchdog Timer in Time r Mode ................. ................................. ............ 87 Power down operation ........... ......[...]

  • Page 5

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 List of Figures 2003 Dec 8 5 List of Figures P89LPC901/902/903 Me mory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Using the Crystal Oscillator - P89LPC90 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 6

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 List of Figures 2003 Dec 8 6 Serial Port Status Register (SSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Serial Port Mode 0 (Double Bu ffering Must Be Disabled) . . . . . . . . . . . . . . . . . . . . . . . . . 66 Serial Port Mode [...]

  • Page 7

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 7 1. GENERAL DESCRIPTION The P89LPC901/902/9 03 is a single-chip microcontroller designed for applications d emanding high-in tegration, low cost solutions over a wide ran ge of performance requireme nts. The P89LPC9 01/902/903 is based on a hig[...]

  • Page 8

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 8 Logic Symbols Product comparison The following table highl ights differ ences between th ese three devices. Part number Ext crystal pins X2 clkout T0 PWM output CMP1 input CMP2 input CMP Ref Input CMP1 & CMP2 outputs UART TxD RxD P89LPC901[...]

  • Page 9

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 9 Block Diagram - P89LPC901 Port 0 Configurable I/Os 128 byte Data RAM 1KB Code Flash Internal Bus Timer0 Timer1 Keypad Interrupt Power Monitor (Power-On Reset, Brownout Reset) Config urable Oscillator Crystal or Resonator On-Chip RC Oscillator [...]

  • Page 10

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 10 Block Diagram - P89LPC902 Port 0 Configurable I/Os 128 byte Data RAM 1KB Code Flash Internal Bus Timer0 Timer1 Keypad Interrupt Power Monitor (Power-On Reset, Brownout Reset) On-Chip RC Oscillator Programmable Oscillator Divider CPU Clock Por[...]

  • Page 11

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 11 Block Diagram - P89LPC903 Port 0 Configurable I/Os 128 byte Data RAM 1KB Code Flash Internal Bus Timer0 Timer1 Keypad Interrupt Power Monitor (Power-On Reset, Brownout Reset) On-Chip RC Oscillator Programmable Oscillator Divider CPU Clock Por[...]

  • Page 12

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 12 PIN DESCRIPTIONS - P89LPC901 MNEMONIC PIN NO. TYPE NAME AND FUNCTION P0.0 - P0.6 6, 7 I/O Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches ar e configured in the input only mode with the interna[...]

  • Page 13

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 13 O XT AL2 Output from the oscillator amplifier (when a crystal oscillator option is selected via t he FLASH configuratio n). O CLKOUT CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6). It can be used if the CPU clock is the inte[...]

  • Page 14

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 14 PIN DESCRIPTIONS - P89LPC902 MNEMONIC PIN NO. TYPE NAME AND FUNCTION P0.0 - P0.6 2,3,5,6,7 I/O Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches ar e configured in the input only mode with the in[...]

  • Page 15

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 15 PIN DESCRIPTIONS - P89LPC903 MNEMONIC PIN NO. TYPE NAME AND FUNCTION P0.0 - P0.6 2,6,7 I/O Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0 latches ar e configured in the input only mode with the intern[...]

  • Page 16

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 16 SPECIAL FUNCTION REGISTERS Note: Special Function Registers (SFRs) ac cesses ar e restricted in the following ways: 1. User must NOT attempt to acce ss any SFR locati ons not defined. 2. Accesses to any defined SFR locations must be strictly [...]

  • Page 17

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 17 IP0H# Interrupt Priori ty 0 High B7H - PWDRT H PBOH - PT1H - PT0H - 00H 1 x0000000 FF FE FD FC FB FA F9 F8 IP1*# Interrupt Priority 1 F8H - - - - - PC PKB I - 00H 1 00x00000 IP1H# Interrupt Priori ty 1 High F7H - - - - - PCH PKBIH - 00H 1 00x[...]

  • Page 18

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 18 8F 8E 8D 8C 8B 8A 89 88 TCON* Timer 0 and 1 Control 88H TF1 TR1 TF0 TR0 - - - - 00H 00000000 TH0 Timer 0 High 8CH 00H 00000000 TH1 Timer 1 High 8DH 00H 00000000 TL0 Tim er 0 Low 8AH 00H 00000000 TL1 Tim er 1 Low 8BH 00H 00000000 TMOD Timer 0 [...]

  • Page 19

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 19 Special Function Registers Table - P89LPC902 Name Description SFR Address Bit Functions and Addresses Reset Value MSB LSB Hex Binary E7 E6 E5 E4 E3 E2 E1 E0 ACC* Accumulator E0H 00H 00000000 AUXR1# Auxiliary Function Register A2H ---- S R S T[...]

  • Page 20

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 20 KBPATN# Keypad Pa ttern Register 93H FFH 11111111 87 86 85 84 83 82 81 80 P0* Port 0 80H - CMP1/ KB6 CMPREF/ KB5 CIN1A/ KB4 -K B 2-K B 0 N o t e 1 97 96 95 94 93 92 91 90 P1* Port 1 90H - - RST ----- B7 B6 B5 B4 B3 B2 B1 B0 P0M1# Port 0 Outpu[...]

  • Page 21

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 21 WDCON# Watchd og Control Register A 7H PRE 2 PRE1 PRE0 - - WDRUN WDTOF WDCLK Notes 3,5 WDL# Watchdog Load C1H FFH 11111111 WFEED1# Watchdog Feed 1 C2H WFEED2# Watchdog Feed 2 C3H Name Description SFR Address Bit Functions and Addresses Reset [...]

  • Page 22

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 22 Special Function Registers Table - P89LPC903 Name Description SFR Address Bit Functions and Addresses Reset Value MSB LSB Hex Binary E7 E6 E5 E4 E3 E2 E1 E0 ACC* Accumulator E0H 00H 00000000 AUXR1# Auxiliary Function Register A2H - EBRR - - S[...]

  • Page 23

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 23 IP1H# Interrupt Priori ty 1 High F7H - PSTH - - - PCH PKBIH - 00H 1 00x00000 KBCON# Keypad Control Register 94H - - - - - - PATN_S EL KBIF 00H 1 xxxxxx00 KBMASK# Keypad Interrupt Mask Reg ister 86H 00H 00000000 KBPATN# Keypad Pa ttern Registe[...]

  • Page 24

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 24 Notes: * SFRs are bi t addressable. # SFRs are modified from or added to the 80C51 SFRs. - Reserved bits, must be written with 0’s. § BRGR1 and BRGR0 mu st only be written if BRGEN in BRGCON SFR is ’0’. If any of them is written if BRG[...]

  • Page 25

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 25 Memory Organization The P89LPC901/902/9 03 memory map is shown in Figure 1-1. Figure 1-1: P89LPC901/90 2/903 Memory Map The various P89LPC901/9 02/903 memory spaces are as follows: DA T A 128 bytes of internal data memory space (00h..7Fh) acc[...]

  • Page 26

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 GENERAL DESCRIPTION 2003 Dec 8 26[...]

  • Page 27

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 27 2. CLOCKS Enhanced CPU The P89LPC901/902/903 u ses an enhanced 80C5 1 CPU which runs at 6 ti mes the spe ed of standard 80C51 de vices. A machine cycle consists of two CPU clock cycles, and most in structions execute in on e or two machine cycles. Clock D[...]

  • Page 28

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 28 Figure 2-1: Using the Cry stal Oscillator - P89LPC901 Oscillator Option Se lection- P89LPC901 The oscillator option is selectable either by the FOSC2:0 bi ts in UCFG1 or by the RTCS1 :0 bits in RTCCON. If the FOSC2:0 bits select an OSCCLK source of ei the[...]

  • Page 29

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 29 If CCLK is 8MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to ’1’ to reduce power consumption. On reset, C LKLP is ’0’ allowing highest performance access. This bit can then be se t in software if CCLK is running at 8MHz or slower. Figure 2[...]

  • Page 30

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 30 . Figure 2-3: Block Diagram of Oscillator Control - P89L PC901 RTC CPU High freq. Med freq. Low freq . Watchdog Oscillator RC Oscillator XTAL1 XTAL2 /2 DIVM WDT (7.3728MHz ) (400KHz) CCLK PCLK Time r 0 & 1 OSC CLK Oscillator Clo ck CPU Clock FOSC 2:0 [...]

  • Page 31

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 31 Figure 2-4: Block Diagram of Oscillator Control - P89L PC902 RTC CPU W atchd og O s cilla to r RC Osci ll at or /2 DI VM WDT (7. 372 8MH z) (40 0 K H z ) CCLK PCLK Ti m er 0 & 1 OSC CLK O s cilla to r Cl ock CPU Clock FOSC2:0 RTCS1:0[...]

  • Page 32

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 32 Figure 2-5: Block Diagram of Oscillator Control- P89L PC903 CPU Clock (CCLK) Wakeup Delay The P89 LPC901/902/903 has a n internal wakeup timer that del ays the clock un til it sta bilizes depending to the clock source used. If the clock source is any of t[...]

  • Page 33

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 33 Low Power Select (P89LPC901) The P89LPC901 is designed to run at 12MHz (CCLK) maximum. However, if CCLK is 8MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to a ’1’ to lowe r the power consumption further. On any reset, CLKLP is ’0’ allowi n[...]

  • Page 34

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 CLOCKS 2003 Dec 8 34[...]

  • Page 35

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INTERRUPTS 2003 Dec 8 35 3. INTERRUPTS The P89LPC901/902/903 use a four prio rity level i nterrupt str ucture. This al lows great flexibility in co ntrolling the han dling of the many interrupt sources. The P89LPC901 supports 6 interrupt sources: timers 0 and 1, brownout dete[...]

  • Page 36

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INTERRUPTS 2003 Dec 8 36 Table 3-2: Summary of Interrup ts - P89LPC901 Table 3-4: Summary of Interrup ts - P89LPC903 Description In terrupt Flag Bit(s) Vector Address Interrupt Enable Bit(s) Interrupt Priority Arbitration Ranking Power down Wakeup Timer 0 Interrupt TF0 000Bh [...]

  • Page 37

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INTERRUPTS 2003 Dec 8 37 External Interrupt Inputs The P89LPC901/902/9 03 have a Keypad Interrupt function (se e Ke ypad Interrupt (KBI) on page 79). This can be used as an external interrupt input. If enabled when the P89LPC9 01/902/903 is put i nto Power down or Idle mode, [...]

  • Page 38

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INTERRUPTS 2003 Dec 8 38 Figure 3-2: Interrup t sources, enables, and Po wer down Wake-up sources - P8 9LPC902 Figure 3-3: Interrup t sources, enables, and Po wer down Wake-up sources - P8 9LPC903 Wakeup (if in Power down) EA (IE0.7) Interrupt to CPU BOPD EBO KBIF EKBI EC WDO[...]

  • Page 39

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 39 4. I/O PORTS The P89LPC901/902/903 has between 3 and 6 I/O pins. The exact numbe r of I/O pins available depends on the clock and reset options chosen: Table 4-1: Number of I/O Pins Available Port Configurations All but one I/O port pin on the P89LPC90[...]

  • Page 40

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 40 The third pullup is referred to as the "stro ng" pullup. This pull up is used to speed up low-to-high tran sitions on a quasi-bidi rectio nal port pin when the port latch chang es from a logic 0 to a logic 1. When this occurs, the stron g pul[...]

  • Page 41

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 41 Input-Only Configuration The input port configur ation is shown in Fi gure 4-3. It is a Schmitt-triggered input that also has a glitch suppression circuit . (Please refer to the P89LPC901/9 02/903 datasheet, AC Characteristics fo r gli tch filter speci[...]

  • Page 42

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 42 Table 4-3: Port Output Conf iguration - P89L PC901 Table 4-4: Port Output Conf iguration - P89L PC902 Table 4-5: Port Output Conf iguration - P89L PC903 Additional Port Features After power-up, al l pins are in In put-Only mode. Please note that this i[...]

  • Page 43

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 43 All ports pins that ca n function as an output have slew rate controlled outputs to lim it noise genera ted by quickly switching o utput signals. The slew rate is factory-set to a pproximately 10 ns rise a nd fall ti mes.[...]

  • Page 44

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 I/O PORTS 2003 Dec 8 44[...]

  • Page 45

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 45 5. TIMERS 0 AND 1 The P89LPC901/902/903 has two general-p urpose counter/timers which are similar to the 80C51 Timer 0 and Timer 1. Timer 0 of the P89LPC901 can be configured to operate either as a timer or ev ent counter (see Figure 5-1). An opti[...]

  • Page 46

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 46 Figure 5-2: Timer/Counter Auxiliary Mode Control register (TAMOD) Mode 0 Putting either Timer into Mode 0 makes it look like an 8048 Timer, wh ich is an 8-bit Counter with a divid e-by-32 prescaler. Fig ure 5-4 shows Mode 0 operation. In this mode[...]

  • Page 47

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 47 Mode 3 When Timer 1 is in Mode 3 it is stopped. The effect is the same as setting TR1 = 0. Timer 0 in Mo de 3 establishes TL0 a nd TH0 as tw o separate 8-bit counters. Th e logic for Mode 3 on Timer 0 i s shown in Figure 5-7. TL0 uses the Timer 0 [...]

  • Page 48

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 48 Figure 5-4: Timer/Cou nter 0 or 1 in Mode 0 (13-bit counter) Figure 5-5: Timer/Cou nter 0 or 1 in Mode 1 (16-bit counter) Figure 5-6: Timer/Counter 0 or 1 in Mode 2 (8-bit auto-reload) TLn (5-bits) TRn T0 Pin* T0C/T = 0 T0C/T = 1 THn (8-bits) Inte[...]

  • Page 49

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 49 Figure 5-7: Timer/ Counter 0 Mode 3 (tw o 8-bit cou nters) Figure 5-8: Timer/Counter 0 in Mode 6 (PWM auto-reloa d), P89LPC901. Timer Overflow togg le output - P89LPC901 Timer 0 can be configured to auto matically toggle the T0 pin wh eneve r the [...]

  • Page 50

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 TIMERS 0 AND 1 2003 Dec 8 50[...]

  • Page 51

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REAL-TIME CLOCK/SYSTEM TIMER 2003 Dec 8 51 6. REAL-TIME CLOCK/SYSTEM TIMER The P89LPC 901/902/903 has a simple Real-time clock/system timer that allo ws a user to continue run ning an accurate timer while the rest of the device is pow ered down. Th e Real-time cl o ck can be [...]

  • Page 52

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REAL-TIME CLOCK/SYSTEM TIMER 2003 Dec 8 52 Table 6-1: Real-time Clock/System Timer Clock Source - P89LPC9 01 FOSC2 (UCFG1.2) FOSC1 (UCFG1.1) FOSC0 (UCFG1.0) RTCS1:0 CCLK Frequency RTC Clock Frequency 000 00 High frequency crystal/DIVM High frequency crystal (XCLK) 01 10 11 Hi[...]

  • Page 53

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REAL-TIME CLOCK/SYSTEM TIMER 2003 Dec 8 53 Table 6-2: :Real-time Clock/System Timer Cloc k Source - P89LPC 902/903 Changing RTCS1-0 RTCS1-0 cannot be changed if the RTC is currentl y enabled (RTCCON.0 =1). Setting RTCEN and upd ating RTCS1-0 may be done in a single write to R[...]

  • Page 54

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REAL-TIME CLOCK/SYSTEM TIMER 2003 Dec 8 54 Figure 6-2: RTCCON Register RTCCON Address: D1h Not bit addre ssable Reset Source(s): Power-up only Reset Value: 011xxx00B BIT SYMBOL FUNCTION RTCCON.7 RT CF Real-time Clock Flag . This bit is set to ’1’ wh en the 23-bit Real-tim[...]

  • Page 55

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 55 7. POWER MONITORING FUNCTIONS The P89LPC 901/902/903 in corporates power monitoring functions designed to prevent incorre ct operation during initial power- on and power loss or reduction durin g oper ation. This is accomplished with t[...]

  • Page 56

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 56 Power-On Detection The Power-On Detect has a functio n similar to the Brownout Dete ct, but is designe d to work as power initially comes up, be fore the power supply voltage reache s a level where the Brownout Dete ct ca n function. T[...]

  • Page 57

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 57 Power Reduction Modes The P89LPC9 01/902/903 su pports three different power reduction modes as determined by SFR bits PCON.1-0 (se e Table 7-2): PMOD1 (PCON.1) PMOD0 (PCON.0) Description 0 0 Normal Mode (Default) - no power reduction.[...]

  • Page 58

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 58 Figure 7-1: Powe r Control Register (PCON) PCON Address: 87h Not bit addre ssable Reset Source(s): Any reset Reset Value: 00000000B BIT SYMBOL FUNCTION PCON.7 SMOD1 Double Baud Rate bit for the serial port (UART) when Time r 1 is used [...]

  • Page 59

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 59 Figure 7-2: Po wer C ontrol Register (PCONA) PCONA Address: B5H Not bit addre ssable Reset Source(s): Any reset Reset Value: 00000000B BIT SYMBOL FUNCTION PCONA.7 RTCPD Real-ti me Clock Power down: When ’1’, the internal clock to t[...]

  • Page 60

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 POWER MONITORING FUNCTIONS 2003 Dec 8 60[...]

  • Page 61

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 61 8. UART (P89LPC903) The P89L PC903 has an enhanced UART that is co mpatible with the conve ntional 80C51 UART except that Timer 2 overflow cannot be used as a baud ra te source. The P89LPC903 does include an inde pendent Baud Rate Generator. The[...]

  • Page 62

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 62 SFR Space The UART SFRs are at the following loca tions: Table 8-1: SFR Locations for UARTs Baud Rate Genera tor and Selection The P89L PC903 enhan ced UART has an independent Baud Rate Ge nerator. The baud rate is determined by a value programm[...]

  • Page 63

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 63 Figure 8-1: B R GCON Regi ster Figure 8-2: Baud R ate Gene rations for UART (Modes 1, 3) Framing Error A Framing error o ccurs when the stop bit is sensed as a logic ’0 ’. A Framing error is reported in the status register (SSTAT ). In addit[...]

  • Page 64

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 64 . Figure 8-3: Se rial Port Contr ol Register (SCON) SCON Address: 98h Bit addressable Reset Source(s): Any reset Reset Value: 00000000B BIT SYMBOL FUNCTION SCON.7 SM0/FE The use of this bit is determi ned by SM OD0 in th e PCON register. If SMOD[...]

  • Page 65

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 65 Figure 8-4: Serial Port Status Register (SSTAT) More About UART Mode 0 In Mode 0, a write to SBUF will initiate a transmission. At the e nd of the transmission, TI (SCON.1) is set, which must be clea red in software. Double buffering must be dis[...]

  • Page 66

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 66 Figure 8-5: Serial Port Mode 0 (Double Buffering Must Be Disabled) More About UART Mode 1 Reception is initiate d by detecting a 1-to-0 transition on RxD. RxD is sampled at a rate 16 times the programmed baud rate. Whe n a transition is detected[...]

  • Page 67

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 67 More About UART Modes 2 and 3 Reception is th e same as in Mod e 1. The signal to loa d SBUF and RB8, and to set R I, will be gener ated if, and only if, the fo llowing conditions a re met at the time the final shift pulse is generated. (a) RI =[...]

  • Page 68

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 68 Double Buffering The UART has a transmit do uble buffer that allo ws buffering of the n ext character to be written to SBUF while the first charact er is being transmitted. Double bufferin g allows transmission of a string of characters with onl[...]

  • Page 69

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 69 Figure 8-8: Transmi ssion with and with out Double Buffering The 9th Bit (Bit 8) in Double Bufferin g (Modes 1, 2 and 3) If double buffering is disabled (DBMOD, i.e. SSTAT.7 = 0), TB8 ca n be written before or after SBUF is written, provide d TB[...]

  • Page 70

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 70 - If DBISEL is ’1’ and INTLO is ’1’, a Tx interrupt will occur at the end of the ST OP bit of the data currently in the shifter ( which is also the last data). 7. If there is more data, the CPU writes to TB8 again. 8. The CPU writes to S[...]

  • Page 71

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 71 since slave 1 requires a 0 in bit 1. A unique address for slave 1 would be 1100 0001 si nce a 1 in bit 0 will exclude slave 0. B oth slaves can be selected at the same time by an address which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave[...]

  • Page 72

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 UART (P89LPC903) 2003 Dec 8 72[...]

  • Page 73

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 RESET 2003 Dec 8 73 9. RESET The P1.5/RST pin can function as either an active low reset input or as a digita l input, P1.5. The RPE (Res et Pin Enable) bit in UCFG1, when set to 1, enables the external reset input functi on on P1.5. When cleared, P1.5 may be used as an input[...]

  • Page 74

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 RESET 2003 Dec 8 74 Figure 9-2: Reset Sources Register RSTSRC Address: DFH Not bit addre ssable Reset Sources: Power-on only Reset Value: xx110000B (This is the power-on reset va lu e. Other reset sources wi ll set corresponding bits.) BIT SYMBOL FUNCTION RSTSRC.7-6 - Reserve[...]

  • Page 75

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ANALOG COMPARATORS 2003 Dec 8 75 10. ANALOG COMPARATORS One analog comp arator is provided on the P89LPC901 and two a nalog comparators are pro vided on both the P89L PC902 and P89LPC903 . Comparator operation is such that t he output is a log ical one when the posit ive inpu[...]

  • Page 76

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ANALOG COMPARATORS 2003 Dec 8 76 Figure 10 -2: Comparator Input and Ou tput Connecti ons - P89LPC901 Figure 10 -3: Comparator Input and Ou tput Connecti ons - P89LPC902 + - CIN1A Comparator (P0.5) CMPREF Vref CN1 Change Detect CMF1 Interrupt EC CO1 + - (P0.4) CIN1 A Compar at[...]

  • Page 77

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ANALOG COMPARATORS 2003 Dec 8 77 Figure 10 -4: Comparator Input and Ou tput Connecti ons - P89LPC903 Figure 10-5: C omparator Configu rations Internal Reference Voltage An internal reference voltage, Vref, may suppl y a default referenc e when a si ngle comparator inpu t pin [...]

  • Page 78

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ANALOG COMPARATORS 2003 Dec 8 78 an interrupt if the comp arator interrupt is enabled. The user should the refore disable the comparator interrupt prior to disabl ing the comparator. Additionally, the user should clear th e comparator flag, CMFx, after disabling the compar at[...]

  • Page 79

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 KEYPAD INTERRUPT (KBI) 2003 Dec 8 79 11. KEYPAD INTERRUPT (KBI) The Keypad Interrupt function is intend ed prim arily to allow a single interrupt to be gene rated when the Port 0 bits are equal to or not equal to a certa in pattern. This function can be used for keypad recogn[...]

  • Page 80

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 KEYPAD INTERRUPT (KBI) 2003 Dec 8 80 Figure 11-3: Keypad Pattern Register - P89LPC903 Figure 11-4: Keypa d Control Register Figure 11-5: Keypad Interrupt Mask Register (KBM) - P89 LPC901 KBPATN Address: 93h Not bit addre ssable Reset Source(s): Any reset Reset Value: 11111111[...]

  • Page 81

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 KEYPAD INTERRUPT (KBI) 2003 Dec 8 81 Figure 11-6: Keypad Interrupt Mask Re gister (KBM)) - P89LPC902 Figure 11-7: Keypad Interrupt Mask Re gister (KBM)) - P89LPC903 KBMASK Address: 86h Not bit addre ssable Reset Source(s): Any reset Reset Value: 00000000B BIT SYMBOL FUNCTION [...]

  • Page 82

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 KEYPAD INTERRUPT (KBI) 2003 Dec 8 82[...]

  • Page 83

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 83 12. WATCHDOG TIMER The watchdog timer subsyste m protects the system from incorre c t code execution by causing a system reset when it underflows as a result of a failure of software to feed the timer prior to the time r reaching its terminal coun[...]

  • Page 84

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 84 Figure 12-1: Watchdog Prescaler Feed Sequence The watchdog timer control register and the 8- bit down counter (Figure 12 -3) are not di rectly loaded by the user. The user writ es to the WDCON and the WDL SFRs. At the end of a fe ed sequence, the [...]

  • Page 85

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 85 MOV WFEED1,#0A5h ; do watchdog feed p art 1 MOV WFEED2,#05Ah ; do watchdog feed part 2 SETB EA ; enable interrupt In timer mode (WDTE = 0), WDCON is loaded to the control register every CCLK cycle (no feed sequence is required to load the control [...]

  • Page 86

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 86 Table 12-2: P89LPC901/902/903 Watchdo g Timeout Values Figure 12-3: Watchdog Timer in Watc hdog Mode (WDTE = 1) PRE2-PRE0 WDL in decimal) Timeout Period (in watchdog clock cycles) Watchdog Clock Source 400KHz Watchdog Oscillator Clock (Nominal) 12[...]

  • Page 87

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 87 Watchdog Timer in Timer Mode Figure 12-4 shows the Watchdog Timer in Timer Mode . In this mode , any changes to WDCON ar e written to the shadow register after one watchdog clock cycle. A watchdog underflow will set the WDTOF bit. If IEN0.6 is set[...]

  • Page 88

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 88 Note: When switching clo cks, it is important that the old cl ock source is left enabled for 2 cl ock cycles after the feed completes. Otherwise, the watchd og may become disabled when the old clock source is disabled. For example, supp ose PCLK ([...]

  • Page 89

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 89 Periodic wakeup from Power down without an external oscillator Without using an external oscillator source , the power consumptio n required in order to have a periodic wakeu p is determined by the power consumption of the internal oscillator sour[...]

  • Page 90

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 WATCHDOG TIMER 2003 Dec 8 90[...]

  • Page 91

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ADDITIONAL FEATURES 2003 Dec 8 91 13. ADDITIONAL FEATURES The AUXR1 register contains several special purpose control bits that re late to several chip features. AUXR1 is described in Figure 13-1. Figure 13-1: AUXR1 Register Software Reset The SRST bit in AUXR1 gives software[...]

  • Page 92

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 ADDITIONAL FEATURES 2003 Dec 8 92 • MOV DPTR, #data16 Load th e Data Pointer with a 16-bit constant. • MOVCA , @A+DPTR Move code byte relative to DPTR to the accumulator. • MOVX A, @DPTR Move data byte the accumula tor to data memory relative to DPTR. • MOVX @DPTR, A [...]

  • Page 93

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 93 14. FLASH PROGRAM MEMORY General description The P89LPC 901/902/903 F lash memory provides in-circuit electrical erasure and programming. The Flash can be read an d written as bytes. On-chi p erase and write timing generation contribute to a[...]

  • Page 94

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 94 ing to FMDA T A. However , each location in the p age register can only be written once following each LOAD command. Attempts to write to a page register location more than once should be avoided . FMADRH and FMADRL[7:4] are used to select a[...]

  • Page 95

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 95 Figure 14-1: Flash Me mory Control Register Figure 14-2 : Assembly lang uage routine to erase/p rogram all or part of a page FMCON Address: E4h Not bit addre ssable Reset Source(s): Any reset Reset Value: BIT SYMBOL FUNCTION FMCON.7-4 - Rese[...]

  • Page 96

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 96 Figure 14-3: C-language routine to erase/prog ram all or part of a page Accessing additional flash elements In addition to the user code array , the user ’s firmware may access ad ditional flash elements. These include UCFG1, th e Boot V e[...]

  • Page 97

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 97 Table 14-1: Flash elements accesable thro ugh IAP-Lite Erase-programming additi onal flash element s The erase-program cycle takes 4ms to complete and is accomplished using the following ste ps: • Write the address of the flash ele ment to[...]

  • Page 98

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 98 r Figure 14-4: Assembly language routine to erase/program a flash element Figure 14-5: C-language routin e to erase/program a flash elemen t ;* Inputs: * ;* R5 = data to write(byte) * ;* R7 = element address(byte) * ;* Outputs: * ;* None * C[...]

  • Page 99

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 99 Figure 14-6: C-language routine to re ad a flash element User Configuration Bytes A number of user-configur able features of the P89LPC901/902 /903 must be defined at power-up and therefore cannot be set by the program after start of executi[...]

  • Page 100

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 100 Figure 14-7: Flash User Configuration Byte 1 (UCFG1) UCFG1 Address: xxxxh Default: 63h BIT SYMBOL FUNCTION UCFG1.7 WDTE Watchdog timer reset enable. Wh en set =1, enables the watchdog timer reset. When cleared = 0 , disable s the watchdog t[...]

  • Page 101

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 101 USER SECURITY BYTES There are four User Sector Security Byte s (SEC0, ..., SEC3), each co rresponding to one sector and having the following bit assignments: Figure 14-8: User Se ctor Se curity Bytes (SEC0 ... SEC3) Table 14-2: Effects of S[...]

  • Page 102

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 FLASH PROGRAM MEMORY 2003 Dec 8 102 Boot Vector Figure 14-9: Boot Vector (BOOTVEC) Boot Status Figure 14 -10: Boot Statu s (BOOTSTAT) BOOTVEC Address: xxxxh Factory default value: 0 0h BIT SYMBOL FUNCTION BOOTVEC.7-5 - Reserved (should remain unp rogrammed at zero). BOOTVEC.4[...]

  • Page 103

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INSTRUCTION SET 2003 Dec 8 103 15. INSTRUCTION SET Table 15-1: Instruction set summary Mnemonic Description Bytes Cycles Hex code ARITHMETIC ADD A,Rn Add register to A 1 1 28-2F ADD A,dir Add direct byte to A 2 1 25 ADD A,@Ri Add indirect memory to A 1 1 26-27 ADD A,#data Add[...]

  • Page 104

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INSTRUCTION SET 2003 Dec 8 104 ANL dir,A AND A to direct byte 2 1 52 ANL dir,#data AND immediate to direct byte 3 2 53 ORL A,Rn OR register to A 1 1 48-4F ORL A,dir OR direct byte to A 2 1 45 ORL A,@Ri OR indirect memory to A 1 1 46-47 ORL A,#data O R immediate to A 2 1 44 OR[...]

  • Page 105

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INSTRUCTION SET 2003 Dec 8 105 MOV dir,#data Move immediate to direct byte 3 2 75 MOV @Ri,A Move A to i ndirect memory 1 1 F6-F7 MOV @Ri,dir Move direct byte to indirect memory 2 2 A6-A7 MOV @Ri,#data Move immediate to indirect memory 2 1 76-77 MOV DPTR,#data Move immed iate [...]

  • Page 106

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 INSTRUCTION SET 2003 Dec 8 106 ACALL addr 11 Abso lute jump to subroutine 2 2 116F1 LCALL addr 16 L ong jump to subroutine 3 2 12 RET Return from subroutine 1 2 22 RETI Return from interrupt 1 2 32 AJMP addr 11 Absolute jump unconditional 2 2 016E1 LJMP addr 16 Long ju mp unc[...]

  • Page 107

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REVISION HISTORY 2003 Dec 8 107 16. REVISION HISTORY 2003 Dec 8 Removed ENCLK bit from P89LPC902 and P89LPC903 TRIM SFRs. Modified Fig 2-1 to reflec t ENCLK only on the P89LPC901. Removed RCCLK from TRIM SFR descrip tion (Fig2-1). Changed comparator SFR and bit names to match[...]

  • Page 108

    Philips Semiconductors User’s Manual - Preliminar y - P89LPC901/902/903 REVISION HISTORY 2003 Dec 8 108[...]

  • Page 109

    Phili ps S em i con d uc t ors P89LPC901/902/903 INDEX User’s Manual - Preliminar y - 2003 Dec 8 109 17. INDEX A Analog comparators 41, 75 configuration 75 configuration example 78 enabling 75 internal reference voltage 83 interrupt 77 power reduction modes 78 Analog comparators and power reduction 41 B Block diagram 9 BRGCON writing to 24 Browno[...]

  • Page 110

    Phili ps S em i con d uc t ors P89LPC901/902/903 INDEX User’s Manual - Preliminar y - 2003 Dec 8 110 block fill 7, 27, 35, 39, 45, 51, 55, 61, 73, 75, 79, 83, 91, 93, 103, 107 hardware reset 7, 27, 35, 39, 45, 51, 55, 61, 73, 75, 79, 83, 91, 93, 103, 107 Dual Data Po inters 91 F FLASH 7, 27, 35, 39, 45, 51, 55, 61, 73, 75, 79, 83, 91, 93, 103, 10[...]

  • Page 111

    Phili ps S em i con d uc t ors P89LPC901/902/903 INDEX User’s Manual - Preliminar y - 2003 Dec 8 111 FLASH code 93 organization 25 O Oscillator high speed crystal option 27, 28 low speed crystal option 27 medium speed crystal option 27 R-C option 28 watchdog (WDT) option 29 P Pin configuration 7, 8 Port 0 12, 14, 15 Port 3 12 Ports additional fea[...]

  • Page 112

    Phili ps S em i con d uc t ors P89LPC901/902/903 INDEX User’s Manual - Preliminar y - 2003 Dec 8 112 S SFR AUXR1 91 BRGCON 63 CMPn 75 KBCON 80 KBMASK 80, 81 KBPATN 79, 80 PCON 58 PCONA 59 RSTSRC 74 RTCCON 54 SCON 64 SSTAT 65 TAMOD 46 TCON 47 TMOD 45 TRIM 28, 29, 95 UCFG1 100 WDCON 85 SFRs undefined locations, use of 16 Special Function Registers [...]

  • Page 113

    Phili ps S em i con d uc t ors P89LPC901/902/903 INDEX User’s Manual - Preliminar y - 2003 Dec 8 113 double buffering in 9-bit mode 69 double buffering in different modes 68 framing error 63, 67 mode 0 65 mode 0 (shift register) 61 mode 1 66 mode 1 (8-bit variable baud rate) 61 mode 2 67 mode 2 (9-bit fixed baud rate) 61 mode 3 67 mode 3 (9-bit v[...]

  • Page 114

    Philips Semiconductors P89LPC901/902/903 User’s manual – Preliminary – yyyy mmm dd 1 Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limi[...]