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Texas Instruments TMS320 manuel d'utilisation

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Tout d'abord, il contient la réponse sur la structure, les possibilités du dispositif Texas Instruments TMS320, l'utilisation de divers accessoires et une gamme d'informations pour profiter pleinement de toutes les fonctionnalités et commodités.

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Table des matières du manuel d’utilisation

  • Page 1

    TMS320 SECOND-GENERA TION DIGIT AL SIGNAL PROCESSORS SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 1 ADV ANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Copyright  1991,[...]

  • Page 2

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 2 PGA AND PLCC/CER-QUAD PIN ASSIGNMENTS FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN A0 K1/26 A12 K8/40 D2 E1/16 D14 A5/3 INT2 H1/22 V CC H2/23 A1 K2/28 A13 L9/41 D3 D2/15 D15 B6/2 IS J1 1[...]

  • Page 3

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 3 description The TMS320 family of 16/32-bit single-chip digital signal processors combines the flexibility of a high-speed controller with the numerical capability of an array processor , thereby offering an inexpensive [...]

  • Page 4

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 4 Key Features: TMS32020 • 200-ns Instruction Cycle Time • 544 Words of On-Chip Data RAM • 128K Words of T otal Data/Program Memory Space • W ait States for Communication to Slower Off-Chip Memories • Source Cod[...]

  • Page 5

    DEVICE RAM ROM/EPROM PROG DA T A TIMER CYCLE TIME (ns) TYP POWER (mW) P ACKAGE TYPE I/O † TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 5 T able 1 provides an overview of the second-generation TMS320 processors with comparisons of memory , I/O, cycle timing, power [...]

  • Page 6

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 6 functional block diagram (TMS320C2x) Data Bus Data Bus 16 16 16 16 16 16 Shifters (0-7) † ACCL(16) 32 ACCH(16) 32 32 ALU(32) 32 32 32 Shifter(-6, 0, 1, 4) 16 Shifter(0-16) 7 LSB From IR 9 9 16 16 16 32 TR(16) 16 Multi[...]

  • Page 7

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 7 scaling shifter The TMS320C2x scaling shifter has 16-bit input connected to the data bus and a 32-bit output connected to the ALU. The scaling shifter produces a left shift of 0 to 16 bits on the input data, as programm[...]

  • Page 8

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 8 Pages 8 -51 1 Interrupts and Reserved (External) External Interrupts and Reserved (On-Chip ROM/EPROM) On-Chip Memory-Mapped Registers On-Chip ROM/EPROM Reserved Reserved On-Chip Block B2 Reserved External If MP/MC = 1 ([...]

  • Page 9

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 9 interrupts and subroutines The TMS320C2x has three external maskable user interrupts INT2-INT0 , available for external devices that interrupt the processor . Internal interrupts are generated by the serial port (RINT a[...]

  • Page 10

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 10 instruction set The TMS320C2x microprocessor implements a comprehensive instruction set that supports both numeric-intensive signal processing operations as well as general-purpose applications, such as multiprocessing[...]

  • Page 11

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 11 instruction set summary T able 2 lists the symbols and abbreviations used in T able 3, the TMS320C25 instruction set summary . T able 3 consists primarily of single-cycle, single-word instructions. Infrequently used br[...]

  • Page 12

    S NO. WORDS D DESCRIPTION D D K D D S D S S D D S D S S X D D X S D D D D K D MNEMONIC K INSTRUCTION BIT CODE TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 12 T able 3. TMS320C25 Instruction Set Summary ACCUMULA TOR MEMOR Y REFERENCE INSTRUCTIONS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ABS Ab[...]

  • Page 13

    S D D D D D NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC K D R K R D DP R D D R K R CM TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 13 T able 3. TMS320C25 Instruction Set Summary (continued) ACCUMULA TOR MEMOR Y REFERENCE INSTRUCTI[...]

  • Page 14

    NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC D D D D D D D D D D D D D D D D PM K TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 14 T able 3. TMS320C25 Instruction Set Summary (continued) T REGISTER, P REGISTER, AND MUL TIPL Y INSTRUCTIONS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 AP AC A[...]

  • Page 15

    NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC D D D D D D D D D D D D D D D D NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC D D D D D D D PA PA TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 15 T able 3. TMS320C25 Instruction Set Summary (continued) BRANCH/CALL INSTRUCTIONS 15 14[...]

  • Page 16

    D NO. WORDS DESCRIPTION INSTRUCTION BIT CODE MNEMONIC D D D D D D B D D K TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 16 T able 3. TMS320C25 Instruction Set Summary (concluded) CONTROL INSTRUCTIONS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 BIT † T est bit 1 1 0 0 1 I BITT † T est bit spec[...]

  • Page 17

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 17 TMS32020 PRODUCT NOTIFICA TION T exas Instruments has identified an unusual set of circumstances that will cause the BIT (T est Bit) instruction on the TMS32020 to affect the contents of the accumulator; ideally , the BIT instruction should no[...]

  • Page 18

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 18 development support T ogether , T exas Instruments and its authorized third-party suppliers of fer an extensive line of development support products to assist the user in all aspects of TMS320 second-generation-based d[...]

  • Page 19

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 19 T able 4. TMS320 Second-Generation Software and Hardware Support SOFTW ARE TOOLS P ART NUMBER Macro Assembler/Linker IBM MS/PC-DOS TMDS3242850-02 V AX/VMS TMDS3242250-08 V AX UL TRIX TMDS3242260-08 SUN UNIX TMDS3242550[...]

  • Page 20

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 20 documentation support Extensive documentation supports the second-generation TMS320 devices from product announcement through applications development. The types of documentation include data sheets with design specifi[...]

  • Page 21

    High-level input voltage Low-level input voltage V IL V IH TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 21 absolute maximum ratings over specified temperature range (unless otherwise noted)† Supply voltage range, V CC ‡ – 0.3 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 22

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 22 CLOCK CHARACTERISTICS AND TIMING The TMS32020 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled by connecting a crystal across X1 and X2/CLKIN (see Figu[...]

  • Page 23

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 23 timing requirements over recommended operating conditions (see Note 3) MIN NOM MAX UNIT t c(C) CLKIN cycle time 195 597 ns t f(CI) CLKIN fall time 10 † ns t r(CI) CLKIN rise time 10 † ns t w(CIL) CLKIN low pulse duration, t c(CI) = 50 ns ([...]

  • Page 24

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 24 MEMOR Y AND PERIPHERAL INTERF ACE TIMING switching characteristics over recommended operating conditions (see Note 3) P ARAMETER MIN TYP MAX UNIT t d(C1-S) STRB from CLKOUT1 (if STRB is present) Q – 15 Q Q + 15 ns t d(C2-S) CLKOUT2 to STRB ([...]

  • Page 25

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 25 RS , INT , BIO , AND XF TIMING switching characteristics over recommended operating conditions (see Note 3 and 8) P ARAMETER MIN TYP MAX UNIT t d(RS) CLKOUT1 low to reset state entered 45 ns t d(IACK) CLKOUT1 to IACK valid – 25 0 25 ns t d(X[...]

  • Page 26

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 26 SERIAL PORT TIMING switching characteristics over recommended operating conditions (see Note 3) P ARAMETER MIN TYP MAX UNIT t d(CH-DX) DX valid after CLKX rising edge (see Note 10) 100 ns t d(FL-DX) DX valid after FSX falling edge (TXM = 0, se[...]

  • Page 27

    V IL T A Low-level input voltage Operating free-air temperature I CC Low-level input voltage T A = 0 ° C, V CC = MAX, f x = MAX mA TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 27 absolute maximum ratings over specified temperature range (unless otherwise noted) † Supply volta[...]

  • Page 28

    TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 28 CLOCK CHARACTERISTICS AND TIMING The TMS32025 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled by connecting a crystal across X1 and X2/CLK[...]

  • Page 29

    TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 29 timing requirements over recommended operating conditions (see Note 3) MIN NOM MAX UNIT t c(CI) CLKIN cycle time 24.4 150 ns t f(CI) CLKIN fall time 5 † ns t r(CI) CLKIN rise time 5 † ns t w(CIL) CLKIN low pulse duration, t c(C[...]

  • Page 30

    TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 30 0.80 V 0.92 V 1.88 V 2.0 V 0 V IH (Min) V IL (Max) (a) Input 0.6 V 0.8 V 2.2 V 2.4 V 0 V OH (Min) V OL (Max) (b) Output Figure 5. V oltage Reference Levels MEMOR Y AND PERIPHERAL INTERF ACE TIMING switching characteristics over rec[...]

  • Page 31

    TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 31 RS , INT , BIO , AND XF TIMING switching characteristics over recommended operating conditions (see Note 3 and 8) P ARAMETER MIN TYP MAX UNIT t d(RS) CLKOUT1 low to reset state entered 22 † ns t d(IACK) CLKOUT1 to IACK valid – [...]

  • Page 32

    TMS320C25, TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 32 SERIAL PORT TIMING switching characteristics over recommended operating conditions (see Note 3) P ARAMETER MIN TYP MAX UNIT t d(CH-DX) DX valid after CLKX rising edge (see Note 10) 75 ns t d(FL-DX) DX valid after FSX falling edge ([...]

  • Page 33

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 33 EPROM PROGRAMMING absolute maximum ratings over specified temperature range (unless otherwise noted) † Supply voltage range, V PP ‡ – 0.6 V to 15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 34

    I CC T A = 0 ° C, V CC = MAX, f x = MAX mA Supply current TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 34 absolute maximum ratings over specified temperature range (unless otherwise noted) † Supply voltage range, V CC ‡ – 0.3 V to 7 V . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 35

    TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 35 CLOCK CHARACTERISTICS AND TIMING The TMS320C25-50 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled by connecting a crystal across X1 and X2, CLKIN.[...]

  • Page 36

    TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 36 +5 V f crystal 4.7 k Ω 10 k Ω 74HC04 F1 1 CLKIN 47 pF 74AS04 10 k Ω C = 20 pF 0.1 µ F L TMS320C25 TMS320C25 TMS320C25-50 TMS320E25 40.96 51.20 40.96 1.8 1.0 1.8 f crystal, (MHz) L, ( µ H) Figure 7. External Clock Option timing requ[...]

  • Page 37

    TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 37 MEMOR Y AND PERIPHERAL INTERF ACE TIMING switching characteristics over recommended operating conditions (see Note 3) P ARAMETER MIN TYP MAX UNIT t d(C1-S) STRB from CLKOUT (if STRB is present) Q – 5 Q + 3 ns t d(C2-S) CLKOUT2 to STRB (i[...]

  • Page 38

    TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 38 RS , INT , BIO , AND XF TIMING switching characteristics over recommended operating conditions (see Notes 3 and 16) P ARAMETER MIN TYP MAX UNIT t d(RS) CLKOUT1 low to reset state entered 22 † ns t d(IACK) CLKOUT1 to IACK valid – 5 7 ns[...]

  • Page 39

    P ARAMETER UNIT TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 39 SERIAL PORT TIMING switching characteristics over recommended operating conditions (see Note 3) P ARAMETER MIN TYP MAX UNIT t d(CH-DX) DX valid after CLKX rising edge (see Note 18) 75 ns t d(FL-DX) DX valid after falling ed[...]

  • Page 40

    P ARAMETER UNIT P ARAMETER UNIT P ARAMETER UNIT P ARAMETER UNIT TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 40 memory and peripheral interface timing TMS320C25 TMS320C25-50 MIN TYP MAX MIN TYP MAX t d(C1-S) Q – 6 Q Q+6 Q – 5 Q + 3 ns t d(C2-S) – 6 0 6 – 2 5 ns t su(A) Q – 12 [...]

  • Page 41

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 41 TIMING DIAGRAMS This section contains all the timing diagrams for the TMS320 second-generation devices. Refer to the top corner of page for the specific device. T iming measurements are referenced to and from a low vol[...]

  • Page 42

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 42 memory read timing CLKOUT1 CLKOUT2 STRB A15-A0, BR , PS , DS or IS R/W READY D15-D0 t d(C1-S) t d(C1-S) t d(C2-S) t d(C2-S) t su(A) t w(SL) t h(A) t w(SH) t d(SL-R) t su(D)R t h(SL-R) t h(D)R Data In V alid t a(A) ADV [...]

  • Page 43

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 43 memory write timing CLKOUT1 CLKOUT2 STRB A15-A0, BR , PS , DS or IS R/W READY D15-D0 V alid Data Out t su(A) t h(A) t su(D)W t dis(D) t en(D) t h(D)W ADV ANCE INFORMA TION[...]

  • Page 44

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 44 one wait-state memory access timing CLKOUT1 CLKOUT2 STRB A15-A0, BR, PS , DS , R/W or IS MSC READY D15-D0 (For Read Operation) Data In Data Out t h(C2H-R) V alid D15-D0 (For Write Operation) t d(C2H-R) t d(M-R) t h(M-R[...]

  • Page 45

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 45 reset timing CLKOUT1 RS A15-A0 D15-D0 PS STRB Control Signals † IACK Serial Port Control ‡ Fetch Location 0 Begin Program Execution V alid V alid t d(RS) t su(IN) t h(IN) t su(IN) t w(RS) † Control signals are DS[...]

  • Page 46

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 46 interrupt timing (TMS32020) CLKOUT1 STRB INT2-INT0 A15-A0 IACK FETCH N FETCH N + 1 FETCH I FETCH I + 1 t su(IN) t h(IN) t w(IN) t d(IACK) t f(IN) t d(IACK) interrupt timing (TMS320C25) CLKOUT1 STRB INT2-INT0 A15-A0 IAC[...]

  • Page 47

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 47 serial port receive timing t c(SCK) t w(SCK) t w(SCK) t f(SCK) t h(DR) t h(FS) t su(DR) t su(FS) CLKR FSR DR t r(SCK) serial port transmit timing CLKX FSX (Input, TXM = 0) DX FSX (Output, TXM = 1) t c(SCK) t r(SCK) t w[...]

  • Page 48

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 48 BIO timing CLKOUT1 STRB A15-A0 BIO FETCH BIOZ t su(IN) t h(IN) FETCH Branch Address FETCH Next Instruction PC = NP C = N + 1P C = N + 2P C = N + 3 or Branch Address V alid external flag timing CLKOUT1 STRB A15-A0 XF t d(XF) PC = N – 1P C = N[...]

  • Page 49

    TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 49 BIO timing CLKOUT1 STRB A15-A0 BIO FETCH BIOZ t su(IN) t h(IN) FETCH Next Instruction PC = NP C = N + 1P C = N + 2 or Branch Address V alid FETCH Branch Address external flag timing CLKOUT1 STRB A15-A0 XF t d(XF) PC = NP C = N + 1P C = N + 2P[...]

  • Page 50

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 50 HOLD timing (part A) CLKOUT1 CLKOUT2 STRB HOLD A15-A0 PS , DS , or IS R/W D15-D0 HOLDA FETCH EXECUTE t d(C2H-H) † t dis(C1L-A) t dis(AL-A) t d(C1L-AL) In In N N + 1 N + 2 V alid V alid N N + 1 N/A N/A N – 1 N Dummy Dead † HOLD is an asyn[...]

  • Page 51

    TMS32020 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 51 HOLD timing (part B) CLKOUT1 CLKOUT2 STRB HOLD A15-A0 PS , DS , or IS R/W D15-D0 HOLDA FETCH EXECUTE t d(C2H-H) † In In N + 2 N + 3 V alid V alid N/A N /A N + 2 N + 3 Dead Dead N + 1 N + 2 t en(A-C1L) t d(HH-AH) † HOLD is an asynchronous i[...]

  • Page 52

    TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 52 HOLD timing (part A) CLKOUT1 CLKOUT2 STRB HOLD A15-A0 PS , DS , or IS R/W D15-D0 HOLDA FETCH EXECUTE t d(C2H-H) † t dis(C1L-A) t dis(AL-A) t d(C1L-AL) In In N N + 1 N + 2 V alid V alid N N + 1 – – N – 2 N – 1 N – † HOLD is an as[...]

  • Page 53

    TMS320C25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 53 HOLD timing (part B) CLKOUT1 CLKOUT2 STRB HOLD PS , DS , or IS R/W D15-D0 HOLDA A15-A0 FETCH EXECUTE t d(C2H-H) † In N + 2 N + 2 V alid – – – N + 2 – – – N + 1 t en(A-C1L) t d(HH-AH) † HOLD is an asynchronous input and can occ[...]

  • Page 54

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 54 TYPICAL SUPPL Y CURRENT CHARACTERISTICS FOR TMS320C25 170 160 150 140 130 120 11 0 100 90 80 70 60 50 40 30 10 20 4 8 12 16 20 24 28 32 36 40 44 48 52 T A = 25 ° C I CC vs f (CLKIN) and V CC Normal Operating Mode f (C[...]

  • Page 55

    TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 55 MECHANICAL DA T A 68-pin GB grid array ceramic package (TMS32020, TMS320C25) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND P ARENTHETICALL Y IN INCHES 28,448 (1.120) 27,432 (1.080) 4,953 (0.195) 2,032 (0.080) 3,302 (0.1[...]

  • Page 56

    TMS320C25 TMS320C25-50 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 56 68-lead plastic leaded chip carrier package (TMS320C25 and TMS320C25-50) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND P ARENTHETICALL Y IN INCHES 25,27 (0.995) 25,02 (0.985) 24,33 (0.956) 24,13 (0.950) 0,81 (0.032) 0,66 (0.026) 0[...]

  • Page 57

    ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND P ARENTHETICALL Y IN INCHES R θ JA Junction-to-free-air thermal resistance 49 ° C/W R θ JC Junction-to-case thermal resistance 8 ° C/W P ARAMETER MAX UNIT Thermal Resistance Characteristics (see Note 1) A (see Note 2) B B A (see Note 2) 1,02 (0.040) × 45 ° 0,64 (0.025) R Max 3 Places 1,27 (0.050) T[...]

  • Page 58

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 58 programming the TMS320E25 EPROM cell The TMS320E25 includes a 4K × 16-bit EPROM, implemented from an industry-standard EPROM cell, to perform prototyping and early field testing and to achieve low-volume production. When used with a 4K-word [...]

  • Page 59

    Pin Nomenclature (TMS320E25) TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 59 Figure 9 shows the wiring conversion to program the TMS320E25 using the 28-pin pinout of the TMS27C64. The pin nomenclature table provides a description of the TMS27C64 pins. The code to be programmed into the dev[...]

  • Page 60

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 60 T able 5 shows the programming levels required for programming, verifying and reading the EPROM cell. The paragraphs following the table describe the function of each programming level. T able 5. TMS320E25 Programming Mode Levels SIGNAL NAME [...]

  • Page 61

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 61 program verify Programmed bits may be verified with V PP = 12.5 V when G = V IL , E = V IL , and PGM = V IH . Figure 1 1 shows the timing for the program and verify operation. Start Address = First Location V CC = 6 ± 0.25 V V PP = 12.5 V ±[...]

  • Page 62

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 62 Address Stable Address N + 1 Data In Stable Data Out V alid HI-Z Program V erify V IH V IL V IH /V OH V IL /V OL V PP V CC V CC + 1 V CC V IH V IL V IH V IL V IH V IL A12-A0 Q8-Q1 V PP V CC E PGM G Figure 1 1. Fast Programming Timing program [...]

  • Page 63

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 63 T able 6. TMS320E25 Protect and V erify EPROM Mode Levels SIGNAL † TMS320E25 PIN TMS27C64 PIN ROM PROTECT PROTECT VERIFY E 22 20 V IH V IL G 42 22 V IH V IL PGM 41 27 V IH V IH V PP 25 1 V PP V CC V CC 61,35 28 V CC + 1 V CC V SS 10, 27, 44[...]

  • Page 64

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 64 Start X = 0 V erify RBIT Device Passed X = 25? Fail No Pass EPROM Protect Setup Program One 1-ms Pulse X = X + 1 Protect V erify Setup Device Failed V erify RBIT Protect V erify Setup Program One Pulse of 3X-ms Duration EPROM Protect Setup Ye[...]

  • Page 65

    TMS320E25 SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 65 Protect V erify V PP V CC V IH /V OH V IL /V OL V IH V IL V IH V IL V CC + 1 V CC V PP V SS V IH V IL A4 Q8 V PP V CC E G V IH V IL V IH V IL A6 EPT PGM HI-Z HI-Z HI-Z Figure 13. EPROM Protect Timing ADV ANCE INFORMA TION[...]

  • Page 66

    INDEX TMS320 SECOND-GENERA TION DEVICES SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 66 ADV ANCE INFORMA TION[...]

  • Page 67

    NIL NIL NIL SPRS010B — MA Y 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 67 accumulator 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . adapter socket 58 . . . . . . . . . . . . . . . . . . . . . . . . . . . . addressing modes 10 . . . . . . . . . . . . . . . . . . . . . . . . . ALU 5 . . . . . . . [...]

  • Page 68

    PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) TMS320C25FNA NRND PLCC FN 68 18 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TMS320C25FNAR NRND PLCC FN 68 TBD Call TI Call TI TMS320C25FNL NRND PLCC FN 68 18 Green (RoHS & no Sb/Br) CU NIP[...]

  • Page 69

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders[...]