VXI 320222-01 manuel d'utilisation

VXI-MXI User Manual October 1993 Edition Part Number 320222-01 © Copyright 1989, 1993 National Instruments Corporation. All Rights Reserved.[...]

National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin, TX 78730-5039 (512) 794-0100 (800) 433-3488 (toll-free U.S. and Canada) Technical support fax: (512) 794-5678 Branch Offices: Australia 03 879 9422, Austria 0662 435986, Belgium 02 757 00 20, Canada (Ontario) 519 622 9310, Canada (Québec) 514 694 8521, Denmark 45 76 26 0[...]

Limited Warranty The National Instruments MXIbus boards and accessories are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty [...]

FCC/DOC Radio Frequency Interference Compliance This equipment generates and uses radio frequency energy and, if not installed and used in strict accordance with the instructions in this manual, may cause interference to radio and television reception. This equipment has been tested and found to comply with the following two regulatory agencies: Fe[...]

© National Instruments Corporation v VXI-MXI User Manual Contents About This Manual ............................................................................................................... xi Organization of This Manual ........................................................................................... xi How to Use This Manual ....[...]

Contents VXI-MXI User Manual vi © National Instruments Corporation Chapter 4 Register Descriptions ......................................................................................................... 4-1 Register Maps ................................................................................................................ 4-1 Register [...]

Contents © National Instruments Corporation vii VXI-MXI User Manual Chapter 6 Theory of Operation .......................................................................................................... 6-1 VMEbus Address and Address Modifier Transceivers .................................................. 6-1 VXIbus System Controller Functions .[...]

Contents VXI-MXI User Manual viii © National Instruments Corporation Figures Figure 1-1. VXI-MXI Interface Module ............................................................................. 1-2 Figure 1-2. VXI-MXI Interface Module with INTX Option ............................................... 1-3 Figure 2-1. VXI-MXI Block Diagram .............[...]

Contents © National Instruments Corporation ix VXI-MXI User Manual Figure 6-1. Master to Slave VMEbus/MXIbus Transfers ................................................... 6-7 Figure 6-2. Deadlock Situation ............................................................................................ 6-10 Figure C-1. VXI-MXI Parts Locator Diagram ...[...]

© National Instruments Corporation xi VXI-MXI User Manual About This Manual The VXI-MXI User Manual describes the functional, physical, and electrical aspects of the VXI-MXI and contains information concerning its operation and programming. Organization of This Manual The VXI-MXI User Manual is organized as follows: • Chapter 1, General Informat[...]

About This Manual VXI-MXI User Manual xii © National Instruments Corporation How to Use This Manual If you will be installing your VXI-MXI into a system with a VXIbus Resource Manager, you only need to read Chapters 1 through 3 of this manual. If you have more than two VXI-MXIs extending your system, you will find useful system configuration infor[...]

© National Instruments Corporation 1-1 VXI-MXI User Manual Chapter 1 General Information This chapter describes the VXI-MXI features, lists the contents of your VXI-MXI kit, and explains how to unpack the VXI-MXI kit. The VXI-MXI interface is a C-size extended class mainframe extender for the VXIbus (VMEbus Extensions for Instrumentation). It exte[...]

General Information Chapter 1 VXI-MXI User Manual 1-2 © National Instruments Corporation Figure 1-1. VXI -MXI Interface Module[...]

Chapter 1 General Information © National Instruments Corporation 1-3 VXI-MXI User Manual Figure 1-2. VXI -MXI Interface Module with INTX Option[...]

General Information Chapter 1 VXI-MXI User Manual 1-4 © National Instruments Corporation Overview The VXI-MXI is an extended class Register-Based VXIbus device with optional Slot 0 capability so that it can reside in any slot in a C-size or D-size VXIbus chassis. The VXI-MXI converts A32, A24, A16, D32, D16, and D08(EO) VXIbus bus cycles into MXIb[...]

Chapter 1 General Information © National Instruments Corporation 1-5 VXI-MXI User Manual – Data transfer bus arbiter (PRI ARBITER) – Interrupt acknowledge daisy-chain driver – Pushbutton system reset switch • VMEbus master capabilities: – Access to A16, A24, and A32 address space – D08(EO), D16, and D32 accesses – Release-on-Request [...]

General Information Chapter 1 VXI-MXI User Manual 1-6 © National Instruments Corporation What Your Kit Should Contain Your VXI-MXI kit should contain the following components: Component Part Number Standard VXI-MXI Interface Module 181045-01 or Enhanced VXI-MXI Interface Module with INTX option 181045-02 VXI-MXI User Manual 320222-01 Optional Equi[...]

Chapter 1 General Information © National Instruments Corporation 1-7 VXI-MXI User Manual The following optional equipment is also available and may be necessary if your VXI-MXI includes the INTX daughter card. Equipment Part Number Type INTX1 Cables Straight-point connector to straight-point connector: – 1 m 180980-01 – 2 m 180980-02 – 4 m 1[...]

© National Instruments Corporation 2-1 VXI-MXI User Manual Chapter 2 General Description This chapter contains the physical and electrical specifications for the VXI-MXI and describes the characteristics of key interface board components. Electrical Characteristics All integrated circuit drivers and receivers used on the VXI-MXI meet the requireme[...]

General Description Chapter 2 VXI-MXI User Manual 2-2 © National Instruments Corporation Table 2-1. VXI -MXI VMEbus Signals (Continued) Driver Device Receiver Device Bus Signals Part Number Part Number IACKIN* – LS540 IACKOUT* GAL20V8 – IRQ[7-1]* AS760, LS145 LS540 All MXIbus transceivers meet the requirements of the MXIbus specification. Tabl[...]

Chapter 2 General Description © National Instruments Corporation 2-3 VXI-MXI User Manual The VXI-MXI does not support the following VMEbus modules: • Serial Clock Driver • Power Monitor Table 2-3 indicates the VXI-MXI VMEbus compliance levels. Table 2-3. VXI-MXI VMEbus Compliance Levels Compliance Notation Description Bus Slave Compliance Leve[...]

General Description Chapter 2 VXI-MXI User Manual 2-4 © National Instruments Corporation Table 2-3. VXI -MXI VMEbus Compliance Levels (Continued) Compliance Notation Description Bus Master Compliance Levels D08(EO) 8-bit data path from MXIbus D16 & D08(EO) 8-bit or 16-bit data path from MXIbus D32 32-bit data path from MXIbus A16 Generates 16-[...]

Chapter 2 General Description © National Instruments Corporation 2-5 VXI-MXI User Manual VXI-MXI Functional Description In simplest terms, the VXI -MXI can be thought of as a bus translator that converts VXIbus signals into appropriate MXIbus signals. From the perspective of the MXIbus, the VXI-MXI implements a MXIbus interface to communicate with[...]

General Description Chapter 2 VXI-MXI User Manual 2-6 © National Instruments Corporation SYSFAIL* SYSRESET* ACFAIL* VMEbus IRQ7-1 IRQ* Interrupt Circuitry SYSFAIL, ACFAIL, SYSRESET Logic Daughter Card Connection IRQ7-1 VMEbus Address and Address Modifiers Transceivers A31-1 A32 Window A24 Window A16 Window LA Window MXIbus Address/Dat a and Addres[...]

Chapter 2 General Description © National Instruments Corporation 2-7 VXI-MXI User Manual • Interrupt Circuitry This circuitry generates and receives interrupt requests on the VMEbus, the MXIbus, and on boards plugged into the daughter card connectors. Interrupt requests routed between VXIbus mainframes can be transparently serviced by interrupt [...]

General Description Chapter 2 VXI-MXI User Manual 2-8 © National Instruments Corporation The following information applies only to VXI-MXI kits that include the INTX daughter card option. Figure 2-2 is a block diagram of the circuitry of the INTX daughter card. INTX Registers Interrupt Control Trigger Control System Resets Control CLK10 Control I [...]

Chapter 2 General Description © National Instruments Corporation 2-9 VXI-MXI User Manual • Interrupt Control The interrupt control logic maps the VMEbus interrupt lines to and from the corresponding INTX interrupt lines. In conjunction with the VXI-MXI circuitry, the interrupt requests routed between VXIbus mainframes through the INTX connector [...]

© National Instruments Corporation 3-1 VXI-MXI User Manual Chapter 3 Configuration and Installation This chapter describes the configuration and installation of the VXI-MXI. Configuring the VXI-MXI Before installing the VXI-MXI in the VXIbus mainframe, configure the VXI-MXI to suit the needs for your VXIbus system. The VXI-MXI module contains jump[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-2 © National Instruments Corporation Figure 3-1 shows the locations and factory default settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI without the INTX option. Figure 3-1. VXI -MXI Parts Locator Diagram[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-3 VXI-MXI User Manual Figure 3-2 shows the locations and factory default settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI with the INTX option. Figure 3-2. VXI -MXI with INTX Parts Locator Diagram[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-4 © National Instruments Corporation The Metal Enclosure The VXI-MXI is housed in a metal enclosure to improve EMC performance and to provide easy handling. Because the enclosure includes cut-outs to facilitate changes to switch and jumper settings, it should not be necessary to remove[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-5 VXI-MXI User Manual When the VXI -MXI is installed in Slot 0, it becomes the VMEbus System Controller, meaning that it has VMEbus Data Transfer Bus Arbiter capability (PRI ARBITER) and that it drives the 16 MHz VMEbus system clock. The VMEbus Data Transfer Bus Arbiter [...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-6 © National Instruments Corporation VXIbus Logical Address Each device in a VXIbus/MXIbus system is assigned a unique number between 0 and 254. This 8-bit number, called the logical address , defines the base address for the configuration registers located on the device. With unique l[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-7 VXI-MXI User Manual Shown at Default setting of Logical Address 1 LOGICAL ADDRESS SWITCH Push this side down for logic 0 Push this side down for logic 1 OFF ON 1 2 3 4 5 6 7 8 OFF 1 2 3 4 5 6 7 8 a. Switch Setting to Default Setting Logical Address Shown at Default set[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-8 © National Instruments Corporation a. Level 3 Requester (default) • • • • • • • • • • • • • • • • VMEbus Request Level • • • • • • • • b. Level 2 Requester • • • • • • • • • • • • • • • • VMEbus Request L[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-9 VXI-MXI User Manual configuration allows VXIbus transfers to have short bus timeout values and MXIbus transfers to have much longer timeout values. You can either disable the VMEbus timeout value or set it to 100, 200, or 400 µs by moving the VME BTO Level jumper, as [...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-10 © National Instruments Corporation VMEbus Timeout Chain Position The VME BTO Chain Position jumper block indicates the location of the VXI -MXI interface in relation to other VXI-MXIs installed in the mainframe. If only one VXI -MXI is in the system, set the jumper block to one of t[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-11 VXI-MXI User Manual If the system contains more than one VXI-MXI, select which card will supply the VMEbus timeout, and set the jumper block according to the VXI-MXI's position in relation to the adjacent VXI-MXIs. Figure 3-9 shows four possible settings. W7 a. S[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-12 © National Instruments Corporation For the VXI -MXIs that do not supply the VMEbus timeout, set the VME BTO Chain Position jumper block to reflect each VXI-MXI's position in relation to the adjacent VXI-MXIs. See Figure 3-10. W7 a. Slot 0 VXI-MXI without BT O, Multiple VXI-MXIs[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-13 VXI-MXI User Manual Interlocked Arbitration Mode Interlocked arbitration mode is an optional mode of operation in which the system performs as one large VXIbus mainframe with only one master of the entire system (VXIbus and MXIbus) at any given moment. This mode of op[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-14 © National Instruments Corporation Select interlocked arbitration mode by changing the default setting of the slide switch from Normal to Interlocked Bus Cycles as shown in Figure 3-11. Interlocked Bus Cycles Normal S3 a. Normal Operating Mode (Default Setting) Interlocked Bus Cycle[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-15 VXI-MXI User Manual MXIbus System Controller Enabled Disabled S4 a. Not MXIbus System Controller (Default Setting) MXIbus System Controller Enabled Disabled S4 b. MXIbus System Controller Figure 3-12. MXIbus System Controller Selection[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-16 © National Instruments Corporation MXIbus System Controller Timeout The MXIbus System Controller is also responsible for the MXIbus system timeout. The timeout period begins when a MXIbus data strobe (DS) is received. The period stops when a MXIbus DTACK or BERR is detected. If a ti[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-17 VXI-MXI User Manual MXIbus Fairness Option The MXIbus fairness feature ensures that all requesting devices will be granted use of the MXIbus. This feature prevents a high priority MXIbus device from consuming all of the MXIbus bandwidth. If MXIbus fairness is enabled,[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-18 © National Instruments Corporation CLK10 Source The VXIbus specification requires that Slot 0 devices supply a clock signal, CLK10, on a differential ECL output. The VXI -MXI can generate the CLK10 signal from an onboard oscillator (10 MHz with a 50% ±5% duty cycle), route an exter[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-19 VXI-MXI User Manual • • • • • • Drive CLK10 from onboard 10MHz, Slot 0 Drive CLK10 from SMB CLK10, Slot 0 Receive CLK10, Non-Slot 0 CLK10 Source Select a. Onboard 10 MHz VXI-MXI Installed in Slot 0 (Default Setting) • • • • • • W9 W10 • • ?[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-20 © National Instruments Corporation EXT CLK SMB Input/Output If you want to have synchronized CLK10 signals in multiple VXIbus mainframes, you can connect the CLK10 signals of the two mainframes together using the EXT CLK SMB connectors on the front panel of the VXI-MXI. One mainfram[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-21 VXI-MXI User Manual Drive CLK10 from INTX CLK10, Slot 0 (W9 and W10 must be removed) W2 W3 Do Not Drive CLK10 from INTX CLK10 INTX CLK10 Routing W1 Receive CLK10 from INTX Drive CLK10 out INTX a. CLK10 Mapping Disabled (Default Setting) W2 W3 INTX CLK10 Routing W1 Rec[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-22 © National Instruments Corporation The VXI-MXI must be installed in Slot 0 if you want to route the INTX CLK10 signal to the VXIbus CLK10 signal. The CLK10 Source Select jumpers on the VXI-MXI must be set to configure the VXI-MXI to receive the CLK10 because the INTX daughter card w[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-23 VXI-MXI User Manual Reset Signal Select The VXI-MXI generates a 200 ms active low pulse both on power-up and when you press the pushbutton system reset switch on the front panel. Using the Reset Signal Select slide switch, you can route the pulse to either VMEbus sign[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-24 © National Instruments Corporation MXIbus Termination The MXIbus is a matched impedance bus and requires termination networks at the first and last device in the MXIbus daisy-chain. These terminations minimize reflections caused by impedance discontinuities at the ends of the cables[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-25 VXI-MXI User Manual networks are not used, you should leave these internal terminators in place. If the VXI-MXI is not going to be an end device, or if you will be using external terminators, remove the terminating resistor networks from their sockets and store them i[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-26 © National Instruments Corporation If the daughter card will be the first or last device in the INTX chain (irrespective of the VXI-MXI's position in the MXIbus chain), you should leave these terminators in place. If the daughter card is not going to be an end device, remove al[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-27 VXI-MXI User Manual • If interlocked mode is used, the VXI -MXIs must be the highest priority VMEbus requesters in their mainframe. However, one, and only one , mainframe in the MXIbus link can have a higher priority VMEbus requester than its VXI-MXIs. • The first[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-28 © National Instruments Corporation Connecting the MXIbus Cable MXIbus devices are daisy-chained together with MXIbus cables. Dual-ended cables are polarized and require proper connection to function properly. The VXI-MXI uses a shielded 62-pin high-density D-subminiature device conn[...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-29 VXI-MXI User Manual If your MXIbus cable has a single connector on one end and a dual-ended connector on the other end (National Instruments part number 180760 - XX or 180761- XX , where XX is the length in meters), you can create a MXIbus system that consists of more[...]

Configuration and Installation Chapter 3 VXI-MXI User Manual 3-30 © National Instruments Corporation In a properly configured MXIbus system, the first and last devices in the daisy-chain each have only one cable connected to their device connector. MXIbus devices that are neither the first nor the last device in the daisy-chain have two (and only [...]

Chapter 3 Configuration and Installation © National Instruments Corporation 3-31 VXI-MXI User Manual Keep in mind that a system can contain only one device acting as the VXIbus Resource Manager (RM). It is important that the RM be run only after all other devices in the system have been powered on. Because many RMs execute automatically upon power[...]

© National Instruments Corporation 4-1 VXI-MXI User Manual Chapter 4 Register Descriptions This chapter contains detailed information on the use of the VXI-MXI registers, which are used to configure and control the module's operation. All of these configuration registers are accessible from the VMEbus (in the VXIbus configuration space) and f[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-2 © National Instruments Corporation Table 4-1. VXI -MXI Register Map Register Name Offset from Base Type Size Address (Hex) VXIbus ID Register 0 Read Only 16-bit Device Type Register 2 Read Only 16-bit VXIbus Status/Control Register 4 Read/Write 16-bit MODID Register 8 Read/Write 16-bit Logica[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-3 VXI-MXI User Manual 3E 3C 3A 38 36 34 32 30 2E 2C 2A 28 26 24 22 20 1E 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 Interrupt Acknowledge 7 Interrupt Acknowledge 6 Interrupt Acknowledge 5 Interrupt Acknowledge 4 Interrupt Ack 3 / Trig Async Ack Interrupt Ack 2 / Trig Sync Ack I[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-4 © National Instruments Corporation VXIbus Configuration Registers These registers are defined by the VXIbus specification for all VXIbus devices. VXIbus ID Register VXIbus Address: Base Address + 0 (hex) Attributes: Read Only R 15 14 13 12 11 10 9 0 1 11 11 1 1 8 DEVCLASS ADDR MANID 76 543 21[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-5 VXI-MXI User Manual 11-0r MANID Manufacturer ID Bits This number uniquely identifies the manufacturer of the VXIbus device. These bits are configured in hardware as hex FF6, the VXIbus manufacturer ID number assigned to National Instruments.[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-6 © National Instruments Corporation Device Type Register VXIbus Address: Base Address + 2 (hex) Attributes: Read Only R 15 14 13 12 11 10 9 0 0 1/0 0 1 1 1 1 8 MODEL 76 543 21 0 1 0 0 0 011 0 This register indicates how much VMEbus memory is required by this VXIbus device, and identifies this [...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-7 VXI-MXI User Manual VXIbus Status/Control Register VXIbus Address: Base Address + 4 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 1 MODID* 1 ACCDIR 8 0 0 0 0 00 00 W R 7 65 4 321 RDY PASS 1 RESET 0 0 000 0 0 0 RESET W EDTYP E VERSIO N This register provides status informat[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-8 © National Instruments Corporation 7-4r VERSION VXI-MXI Version Number Bits These bits specify the revision version number of the VXI-MXI according the table below. These bits are read only. Version Number VXI-MXI Revision Hex D Revision D Hex C Revision E Hex B Revision F Hex A Revision G 3r[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-9 VXI-MXI User Manual VXIbus Extender Registers These registers are defined for VXIbus extender devices. MODID Register VXIbus Address: Base Address + 8 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 0 0 OUTEN MODID12 MODID11 MODID10 MODID9 MODID8 8 R/W 7 6543 2 1 MODID7 MO[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-10 © National Instruments Corporation Logical Address Window Register VXIbus Address: Base Address + A (hex) Attributes: Read/Write This register defines the range of logical addresses that are mapped into and out of the VXI-MXI through the MXIbus. This register defines a configuration window i[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-11 VXI-MXI User Manual LAEN LADIR Window Applies to 0 X Disabled 10 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero when writing to these bits. 10-8r/w LASIZE[2-0] Logical Address Window Size[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-12 © National Instruments Corporation The Logical Address Window Register has the following format when the CMODE bit is set: R/W 7 6543 2 1 LALOW7 LALOW6 LALOW5 LALOW4 LALOW3 LALOW2 LALOW1 LALOW0 0 15 14 13 12 11 10 9 8 R/W LAHIGH7 LAHIGH6 LAHIGH5 LAHIGH4 LAHIGH3 LAHIGH2 LAHIGH1 LAHIGH0 Bit Mn[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-13 VXI-MXI User Manual To accommodate 8-bit devices that write to this register, the window is not enabled until the lower byte of the register is written. Therefore, 8-bit devices should write the upper byte first, then the lower byte.[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-14 © National Instruments Corporation A16 Window Map Register VXIbus Address: Base Address + C (hex) Attributes: Read/Write This register defines the range of addresses in the lower 48 KB of A16 space that is mapped into and out of the VXI -MXI through the MXIbus. Earlier versions of the VXI-MX[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-15 VXI-MXI User Manual A16EN A16DIR Window Applies to 0 X Disabled 10 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero when writing to these bits. 10-8r/w A16SIZE[2-0] A16 Window Size Bits Thi[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-16 © National Instruments Corporation The A16 Window Map Register has the following format when the CMODE bit is set: R/W 7 6543 2 1 A16LOW7 A16LOW6 A16LOW5 A16LOW4 A16LOW3 A16LOW2 A16LOW1 A16LOW0 0 15 14 13 12 11 10 9 8 R/W A16HIGH7 A16HIGH6 A16HIGH5 A16HIGH4 A16HIGH3 A16HIGH2 A16HIGH1 A16HIGH[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-17 VXI-MXI User Manual To accommodate 8-bit devices that write to this register, the window is not enabled until the lower byte of the register is written. Therefore, 8-bit devices should write the upper byte first, then the lower byte.[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-18 © National Instruments Corporation A24 Window Map Register VXIbus Address: Base Address + E (hex) Attributes: Read/Write This register defines the range of addresses in A24 space that are mapped into and out of the VXI-MXI through the MXIbus. These bits are cleared on a hard reset. The CMODE[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-19 VXI-MXI User Manual A24EN A24DIR Window Applies to 0 X Disabled 10 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero when writing to these bits. 10-8r/w A24SIZE[2-0] A24 Window Size Bits Thi[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-20 © National Instruments Corporation The A24 Window Map Register has the following format when the CMODE bit is set: R/W 7 6543 2 1 A24LOW7 A24LOW6 A24LOW5 A24LOW4 A24LOW3 A24LOW2 A24LOW1 A24LOW0 0 15 14 13 12 11 10 9 8 R/W A24HIGH7 A24HIGH6 A24HIGH5 A24HIGH4 A24HIGH3 A24HIGH2 A24HIGH1 A24HIGH[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-21 VXI-MXI User Manual To accommodate 8-bit devices that write to this register, the window is not enabled until the lower byte of the register is written. Therefore, 8-bit devices should write the upper byte first, then the lower byte.[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-22 © National Instruments Corporation A32 Window Map Register VXIbus Address: Base Address + 10 (hex) Attributes: Read/Write This register defines the range of addresses in A32 space that are mapped into and out of the VXI-MXI through the MXIbus. These bits are cleared on a hard reset. The CMOD[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-23 VXI-MXI User Manual A32EN A32DIR Window Applies to 0 X Disabled 10 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero when writing to these bits. 10-8r/w A32SIZE[2-0] A32 Window Size Bits Thi[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-24 © National Instruments Corporation The A32 Window Map Register has the following format when the CMODE bit is set: R/W 7 6543 2 1 A32LOW7 A32LOW6 A32LOW5 A32LOW4 A32LOW3 A32LOW2 A32LOW1 A32LOW0 0 15 14 13 12 11 10 9 8 R/W A32HIGH7 A32HIGH6 A32HIGH5 A32HIGH4 A32HIGH3 A32HIGH2 A32HIGH1 A32HIGH[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-25 VXI-MXI User Manual To accommodate 8-bit devices that write to this register, the window is not enabled until the lower byte of the register is written. Therefore, 8-bit devices should write the upper byte first, then the lower byte.[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-26 © National Instruments Corporation INTX Interrupt Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 12 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 0 EINT7EN EINT6EN EINT5EN EINT4EN EINT3EN EINT2EN EINT1EN 8 R/W 7 6543 2 1 0 EINT7DIR EINT6DIR EINT5DIR[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-27 VXI-MXI User Manual INTX Trigger Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 14 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 ETRG7EN ETRG6EN ETRG5EN ETRG4EN ETRG3EN ETRG2EN ETRG1EN ETRG0EN 8 R/W 7 6543 2 1 ETRG7DIR ETRG6DIR ETRG5D[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-28 © National Instruments Corporation INTX Utility Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 18 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 0 1 101 1 1 1 8 R/W 7 6 54 32 1 1 1 ACFAILIN ACFAILOUT SYSFAILIN SYSFAILOUT SYSRSTIN SYSRSTOUT 0 0 0 000 0 [...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-29 VXI-MXI User Manual 5r/w ACFAILIN Extended ACFAIL Inward Bit Setting this bit enables the INTX ACFAIL line to be mapped into the VMEbus ACFAIL line. Clearing this bit disables the mapping of the INTX ACFAIL line onto the VMEbus ACFAIL line. This bit is cleared on power-up. 4r/[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-30 © National Instruments Corporation Subclass Register VXIbus Address: Base Address + 1E (hex) Attributes: Read only R 15 14 13 12 11 10 9 1 1 111 1 10 8 SUBCLASS 76 543 21 0 1 1 111 11 0 These bits define the subclass of a VXIbus extended device. The VXI-MXI is a VXIbus Mainframe Extender. Su[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-31 VXI-MXI User Manual MXIbus Defined Registers MXIbus Status/Control Register VXIbus Address: Base Address + 20 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 11 MXSCTO INTLCK DSYSFAIL FAIR 8 DSYSFAIL DSYSRST W R 7 65 4 321 MXIS C LNGMXSCTO MXBER R PARERR 0 0 MXTRIGE N MXSRS[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-32 © National Instruments Corporation MXI Address Modifiers RMWMODE Bit Routing Block X MXIbus block to VMEbus block Non-Block 0 MXIbus RMW cycle to VMEbus RMW cycle 1 MXIbus block to VMEbus single cycle 14r/w CMODE Comparison Mode Bit This bit selects the range comparison mode for the logical [...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-33 VXI-MXI User Manual 11r MXSCTO MXIbus System Controller Timeout Status Bit If this VXI-MXI is the MXIbus System Controller, this bit is set if the VXI-MXI sent a MXIbus BERR on the last MXIbus transfer in response to a MXIbus System Controller Timeout. This bit is cleared when[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-34 © National Instruments Corporation 8r FAIR VXI-MXI Fairness Status Bit When this bit is set, the VXI-MXI is configured as a fair MXIbus requester. If this bit is cleared, the VXI -MXI is configured as an unfair MXIbus requester. FAIR is selected with slide switch S2. This bit is not affected[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-35 VXI-MXI User Manual 4r MXACFAILINT MXIbus ACFAIL Status Bit When this bit is set, the VXIbus ACFAIL line is active and is being driven across the MXIbus IRQ line. When this bit is cleared, the ACFAIL signal is not driving the MXIbus IRQ line. This bit is cleared on a hard rese[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-36 © National Instruments Corporation MXIbus Lock Register VXIbus Address: Base Address + 22 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 11 1 1 11 1 1 8 0 0 00 0 0 00 W R 7 65 4 321 1 1 111 1 1 LOCKED 0 0 0 0 0 00 0 W LOCKED The bit in this register performs differently depending on whet[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-37 VXI-MXI User Manual MXIbus IRQ Configuration Register VXIbus Address: Base Address + 24 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 SYSFOU T MIRQ7E N MIRQ6E N MIRQ5E N MIRQ4E N MIRQ3E N MIRQ2E N MIRQ1E N 8 R/W 7 6543 2 1 SYSFI N MIRQ7DI R MIRQ6DI R MIRQ5DI R MIRQ4DI R[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-38 © National Instruments Corporation MIRQ x EN MIRQ x DIR Routing 0 X Disabled 10 VME IRQ X drives MXI IRQ 1 MXI IRQ drives VME IRQ X[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-39 VXI-MXI User Manual Drive Triggers/Read LA Register VXIbus Address: Base Address + 26 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 DTRIG7 DTRIG6 DTRIG5 DTRIG4 DTRIG3 DTRIG2 DTRIG1 DTRIG0 8 R 7 6543 2 1 LADD7 LADD6 LADD5 LADD4 LADD3 LADD2 LADD1 LADD0 0 W 00 00 0 PULSE D[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-40 © National Instruments Corporation 1w DRVECL1 Drive ECL Trigger Line 1 Bit Setting this bit asserts the VXIbus ECL Trigger Line 1 after synchronizing the signal with the 10 MHz clock. 0w DRVECL0 Drive ECL Trigger Line 0 Setting this bit asserts the VXIbus ECL Trigger Line 0 after synchronizi[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-41 VXI-MXI User Manual Trigger Mode Selection Register VXIbus Address: Base Address + 28 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 11 1 1 11 1 1 8 ITS2 ITS1 ITS0 W R 7 65 4 321 1 1 TRIGIN TRIGOUT ASINT* SSINT* 0 0 ASIE SSIE W OMS2 OMS1 OMS0 ITS3 ETOE N OTS3 OTS2 OTS1 OTS[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-42 © National Instruments Corporation When in Sync, Semi-Sync, or Async Source Mode, write a zero to the PULSE bit in the Drive Triggers Register to generate a pulse on the trigger line selected by the OTS[3-0] bits. You must write a one to the PULSE bit before another pulse can be generated. I[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-43 VXI-MXI User Manual 8w ETOEN External Trigger Output Enable Bit Setting this bit enables the OMS[2-0] modes to drive the selected trigger line to the TRIG OUT SMB connection. 7r ECLSTAT1 ECL Trigger Line 1 Status Bit Reading this bit returns the current status of ECL Trigger L[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-44 © National Instruments Corporation 3w ETRIG Enable Trigger Lines Bit When this bit is set, the protocols selected by the OMS[2-0] bits are enabled to drive the trigger line specified by the OTS[3-0] bits. 2r TRIGOUT Trigger Output Status Bit If this bit is set, the trigger signal routed to t[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-45 VXI-MXI User Manual Interrupt Status/Control Register VXIbus Address: Base Address + 2A (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 LINT3 LINT2 LINT1 BKOFF TRIGINT SYSFAIL ACFAIL 8 LINT3 LINT2 LINT1 0 BKOFFIE TRIGINTIE SYSFAILIE ACFAILIE W R 76 543 2 1 IRQ7 IRQ6 IRQ5 IR[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-46 © National Instruments Corporation 12r ACFAILINT VXIbus ACFAIL Interrupt Status Bit If this bit is set, an interrupt is currently driven on the VMEbus interrupt line selected by the LINT[3-1] bits because the VXIbus ACFAIL line became set. This bit is cleared on an interrupt acknowledge cycl[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-47 VXI-MXI User Manual 8r ACFAIL VXIbus ACFAIL Status Bit This bit reflects the status of the VXIbus ACFAIL line. 8w ACFAILIE VXIbus ACFAIL Interrupt Enable Bit If this bit is set, an interrupt is generated on the VMEbus interrupt line selected by the LINT[3-1] bits when the VXIb[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-48 © National Instruments Corporation Status/ID Register VXIbus Address: Base Address + 2C (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 S15 S14 S13 S12 S11 S10 S9 S8 8 R/W 7 6543 2 1 S7 S6 S5 S4 S3 S2 S1 S0 0 This register contains the Status/ID value returned to the Interrupt Handler a[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-49 VXI-MXI User Manual MXIbus Trigger Configuration Register VXIbus Address: Base Address + 2E (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 TRIG7EN TRIG6EN TRIG5EN TRIG4EN TRIG3EN TRIG2EN TRIG1EN TRIG0EN 8 R/W 7 6543 2 1 TRIG7DIR TRIG6DIR TRIG5DIR TRIG4DIR TRIG3DIR TRIG2D[...]

Register Descriptions Chapter 4 VXI-MXI User Manual 4-50 © National Instruments Corporation Trigger Synchronous Acknowledge Register VXIbus Address: Base Address + 34 (hex) Attributes: Write Only W 15 14 13 12 11 10 9 X X XX X X XX 8 W 7 6543 2 1 X X X X XXX X 0 Writing any value to this register reinitializes the SSINT* bit in the Trigger Mode Se[...]

Chapter 4 Register Descriptions © National Instruments Corporation 4-51 VXI-MXI User Manual IRQ Acknowledge Registers VXIbus Address: Base Address + 32 (hex) for IRQ1* Base Address + 34 (hex) for IRQ2* Base Address + 36 (hex) for IRQ3* Base Address + 38 (hex) for IRQ4* Base Address + 3A (hex) for IRQ5* Base Address + 3C (hex) for IRQ6* Base Addres[...]

© National Instruments Corporation 5-1 VXI-MXI User Manual Chapter 5 Programming Considerations This chapter explains important considerations for programming and configuring a VXIbus/ MXIbus system using VXI -MXIs. Note: Detailed descriptions of all register bits can be found in Chapter 4, Register Descriptions . System Configuration In a MXIbus [...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-2 © National Instruments Corporation PC with Multiframe Resource Manager Level 1 Level 2 MXIbus Device MXIbus Device VXIbus Mainframe VXI-MXI VXI-MXI VXIbus Mainframe VXI-MXI VXIbus Mainframe VXI-MXI MXIbus Interface Root Figure 5-1. VXIbus/MXIbus System with Multiframe RM on a PC Level 1 [...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-3 VXI-MXI User Manual The recommended way to set up your system is to fill up Level 1 MXIbus links before adding additional levels. System performance decreases as the number of levels in the system increases because each level requires additional signal conversion. Also kee[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-4 © National Instruments Corporation Base7 Size = 1 Size = 2 Size = 3 Size = 4 Size = 5 Size = 6 Size = 7 Base6 Base5 Base4 Base3 Base2 Base1 Base0 Figure 5-3. Base and Size Combinations FF-F0 EF-E0 DF-D0 CF-C0 BF-B0 AF-A0 9F-90 8F-80 7F-70 6F-60 5F-50 3F-30 4F-40 2F-20 1F-10 0F-00 Size = [...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-5 VXI-MXI User Manual High/Low Configuration Format Each address mapping window on a MXIbus interface has High and Low address parameters associated with it when the CMODE bit in the MXIbus Control Register is set. The High and Low values define the range of MXIbus addresses[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-6 © National Instruments Corporation 3. Next, fill in the blanks for the number of logical addresses required by the first-level MXIbus devices. Using a separate worksheet for each MXIbus link on Level 1, fill in the blanks for the number of logical addresses required by the devices on eac[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-7 VXI-MXI User Manual 8. Determine the range of addresses that will be occupied by the root device and each first- level device and MXIbus link. For Base/Size systems, use the Logical Address Map Diagram shown in Figure 5-6 to visualize the logical address map for the system[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-8 © National Instruments Corporation VXIbus Mainframe #1 VXI-MXI VXI-MXI VXIbus Mainframe #2 VXI-MXI MXIbus Device A MXIbus Device B VXIbus Mainframe #3 VXI-MXI VXI-MXI VXIbus Mainframe #6 VXI-MXI VXIbus Mainframe #4 VXI-MXI VXIbus Mainframe #5 VXI-MXI Level 1 Level 2 Multiframe Resource M[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-9 VXI-MXI User Manual Into VXIbus Mainframe #3 FF-F0 EF-E0 DF-D0 CF-C0 BF-B0 AF-A0 9F-90 8F-80 7F-70 6F-60 5F-50 3F-30 4F-40 2F-20 1F-10 0F-00 VXIbus Mainframe #1 VXIbus Mainframe #6 VXIbus Mainframe #3 VXIbus Mainframe #4 VXIbus Mainframe #5 VXIbus Mainframe #2 Device A Dev[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-10 © National Instruments Corporation Resource Manager Mainframe: VXIbus Mainframe #1 Total number of logical addresses required by this device: 12 Range = 0 – F Round total number up to the next power of two: * 16 (2 4 ) Size = 8-4 = 4 First Level MXIbus Link: MXIbus #1 (Fill in after c[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-11 VXI-MXI User Manual MXIbus Link: MXIbus #1 Device: MXIbus Device A Number of logical addresses required by device: 3 Range = E0 – E3 Round total number up to the next power of two: 4 (2 2 ) Size = 8-2 = 6 List other MXIbus links to this mainframe: Number of logical addr[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-12 © National Instruments Corporation MXIbus Link: MXIbus #2 Device: VXIbus Mainframe #6 Number of logical addresses required by device: 7 Range = 10 – 17 Round total number up to the next power of two: 8 (2 3 ) Size = 8-3 = 5 List other MXIbus links to this mainframe: Number of logical [...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-13 VXI-MXI User Manual Worksheets for Planning Your VXIbus/MXIbus Logical Address Map Use the worksheets on the following pages for analyzing your own VXIbus/MXIbus system. Follow the procedures used to fill out the worksheets for the sample VXIbus/MXIbus system. FF-F0 EF-E0[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-14 © National Instruments Corporation Resource Manager Mainframe: Total number of logical addresses required by this device: Range = Round total number up to the next power of two: * Size = First Level MXIbus Link: (Fill in after completing charts on the following pages) Total number of lo[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-15 VXI-MXI User Manual MXIbus Link: Device: Number of logical addresses required by device: Range = Round total number up to the next power of two: Size = List other MXIbus links to this mainframe: Number of logical addresses required by additional MXIbus links: + Total numb[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-16 © National Instruments Corporation MXIbus Link: Device: Number of logical addresses required by device: Range = Round total number up to the next power of two: Size = List other MXIbus links to this mainframe: Number of logical addresses required by additional MXIbus links: + Total numb[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-17 VXI-MXI User Manual MXIbus Link: Device: Number of logical addresses required by device: Range = Round total number up to the next power of two: Size = List other MXIbus links to this mainframe: Number of logical addresses required by additional MXIbus links: + Total numb[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-18 © National Instruments Corporation Alternative Worksheets for Planning Your VXIbus/MXIbus Logical Address Map For most VXIbus/MXIbus systems, you may find the following worksheet helpful when setting up a system using the High/Low format for window configuration. The entire system can b[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-19 VXI-MXI User Manual Device Device LA's Lower LA's Total LA's Range IN Range OUT Device Device LA's Lower LA's Total LA's Range IN Range OUT Device Device LA's Lower LA's Total LA's Range IN Range OUT Device Device LA's Low[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-21 VXI-MXI User Manual Planning a VXIbus/MXIbus System A16 Address Map The VXIbus specification does not define a method for dynamically determining the amount of A16 space each device requires. The specification defines the upper 16 KB of A16 space for VXIbus device configu[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-22 © National Instruments Corporation BFFF-B000 AFFF-A000 9FFF-9000 8FFF-8000 7FFF-7000 6FFF-6000 5FFF-5000 4FFF-4000 3FFF-3000 2FFF-2000 1FFF-1000 0FFF-0000 F0 E0 C0 B0 A0 D0 90 80 50 40 00 60 70 30 20 10 Size = 2 Size = 3 Size = 4 Size = 5 Size = 6 Size = 7 Size = 1 Size = 0 Figure 5-12.[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-23 VXI-MXI User Manual 4. Figure 5-17 is the worksheet for MXIbus #3, which includes VXIbus Mainframes #4 and #5. Mainframe #4 needs 2 KB and Mainframe #5 needs 1 KB of A16 space. We fill in the appropriate spaces on the worksheet. 5. Now we return to Figure 5-16 and fill in[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-24 © National Instruments Corporation 5000 through 5FFF to MXIbus #3. For the VXI-MXI connected to MXIbus #3, we set Base = 5000, Size = 4 because 4 KB = 256 * 2 8-4 , and the direction toward MXIbus #3, or Out . 14. The 4 KB assigned to MXIbus #3 is further divided between VXIbus Mainfram[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-25 VXI-MXI User Manual Table 5-4. Example VXIbus/MXIbus System Required A16 Space Amount of A16 Device Space Required VXIbus Mainframe #1 16 KB MXIbus Device A 512 B MXIbus Device B 0 B VXIbus Mainframe #2 0 B VXIbus Mainframe #3 4 KB VXIbus Mainframe #4 2 KB VXIbus Mainfram[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-26 © National Instruments Corporation Resource Manager Mainframe: Amount of A16 space required for this mainframe: Round up to next address break: First Level MXIbus Link: Amount of A16 space required for devices connected to this VXI-MXI: Round up to next address break: A16 Window: Base: [...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-27 VXI-MXI User Manual MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-28 © National Instruments Corporation MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-29 VXI-MXI User Manual Worksheets for Planning Your VXIbus/MXIbus A16 Address Map Use the worksheets on the following pages for planning an A16 address map for your VXIbus/ MXIbus system. Follow the procedures used to fill out the worksheets for the sample VXIbus/ MXIbus sys[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-30 © National Instruments Corporation Resource Manager Mainframe: Amount of A16 space required for this mainframe: Round up to next address break: * First Level MXIbus Link: Amount of A16 space required for devices connected to this VXI-MXI: Round up to next address break: A16 Window: Base[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-31 VXI-MXI User Manual MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-32 © National Instruments Corporation MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-33 VXI-MXI User Manual MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-34 © National Instruments Corporation MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break: Total amount of A16 space required for this window: = Round up[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-35 VXI-MXI User Manual Multiframe RM Operation On power-up, all MXIbus devices are isolated from each other because all address mapping windows are disabled. The multiframe RM performs the following: • Identifies all devices in the system • Manages system self-tests • [...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-36 © National Instruments Corporation b. Repeats Step 2 recursively. c. Sets the VXI-MXI inward logical address mapping window to cover the range up to (but not including) the VXI-MXI with the next highest logical address that was found in the logical address space. iv. Sets the VXI-MXI ou[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-37 VXI-MXI User Manual The RM performs the following steps: 1. Scans logical addresses (0 to FF) and identifies all devices in VXIbus Mainframe #1. Finds the VXI-MXIs at logical addresses 2 and 4 and moves DC devices to the lowest unused logical addresses (for example, 1, 3,[...]

Programming Considerations Chapter 5 VXI-MXI User Manual 5-38 © National Instruments Corporation 9. Enables the logical address window of the VXI-MXI in VXIbus Mainframe #2 for the entire inward mapping range of 0 to FF. Scans all logical addresses, skipping all previously encountered devices and defined ranges. Finds the Slot 0 device and uses it[...]

Chapter 5 Programming Considerations © National Instruments Corporation 5-39 VXI-MXI User Manual System Administration and Initiation System self-test administration, hierarchy configuration, and initiation of normal operation are handled as defined in the VXIbus specification. A general-purpose multiframe RM must wait five seconds before testing [...]

© National Instruments Corporation 6-1 VXI-MXI User Manual Chapter 6 Theory of Operation A brief description of the VXI-MXI is given in Chapter 2 along with a functional block diagram (see Figure 2-1). The major elements of the VXI-MXI are discussed in more detail in this chapter. For a detailed discussion of the VXIbus, refer to the VXIbus specif[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-2 © National Instruments Corporation VMEbus Control Signals Transceivers The VMEbus control signals transceivers control the sending and receiving of the VMEbus control signals such as address strobe (AS*), the data strobes (DS1*, DS0*), longword (LWORD*), write (WRITE*), data transfer acknowledg[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-3 VXI-MXI User Manual The Synchronous protocol is a single trigger line broadcast that does not require an acknowledge from its acceptors. The source must assert the trigger for a minimum of 30 ns and allow at least 50 ns between assertions. The rising edge or falling edge can be s[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-4 © National Instruments Corporation The two trigger interrupt conditions are Trigger Synchronous and Trigger Asynchronous. A synchronous trigger interrupt occurs when the input trigger signal changes from low to high. The asynchronous trigger interrupt occurs when the input trigger signal change[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-5 VXI-MXI User Manual Multiple MXIbus devices can interrupt on the same interrupt line; therefore, a MXIbus interrupt acknowledge daisy-chain is required. The MXIbus GIN and GOUT signals are normally used for the arbitration bus grant in/bus grant out daisy-chain. However, when a M[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-6 © National Instruments Corporation The VMEbus interrupt lines can be individually driven by writing to the Interrupt Status/Control Register. When one of these interrupt requests is serviced by an interrupt handler, the information in the Status/ID Register is returned during the IACK cycle and[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-7 VXI-MXI User Manual complete when the responding device sends DTACK* and the VXI -MXI releases the data strobe and address strobe. The VXI -MXI interface supports 8-bit, 16-bit, and 32-bit reads and writes across the MXIbus. The least significant data bit maps to MXIbus data line[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-8 © National Instruments Corporation Table 6-3. Transfer Responses for VMEbus Address Modifiers AM5 AM4 AM3 AM2 AM1 AM0 Transfer Type HHHHHH A24 supervisory block transfer HHHHHL A24 supervisory program access HHHHL H A24 supervisory data access HHHL HH A24 nonprivileged block transfer HHHL HL A2[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-9 VXI-MXI User Manual Table 6-4. VMEbus/MXIbus Transfer Size Comparison VMEbus MXIbus Byte Locations DS1* DS0* A01 LWORD* Size AD01 AD00 D24-31 D16-23 D08-15 D00-07 8-bit Transfers Byte(0) 0101000 Byte(0) Byte(1) 1001001 Byte(1) Byte(2) 0111010 Byte(2) Byte(3) 1011011 Byte(3) 16-bi[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-10 © National Instruments Corporation VXI-MXI VXI-MXI VXIbus Mainframe #1 VXIbus Mainframe #2 MXIbus VMEbus VMEbus Slave Slave Master Master Slave Slave Figure 6-2. Deadlock Situation If the VXI-MXI responds with a VMEbus BERR* to a transfer initiated by a VXIbus device, the transfer was not comp[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-11 VXI-MXI User Manual Table 6-3. When a transfer involving an address in one of the inward windows is detected, the VXI-MXI begins arbitrating for the VMEbus. When the VXI -MXI wins the VMEbus, the MXIbus transfer is converted into a VMEbus transfer. The data transfer size informa[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-12 © National Instruments Corporation MXIbus specifies trapezoidal bus transceivers to reduce noise and crosstalk in the MXIbus transmission system. These transceivers have open collector drivers that generate precise trapezoidal waveforms with typical rise and fall times of 9 ns. The trapezoidal[...]

Chapter 6 Theory of Operation © National Instruments Corporation 6-13 VXI-MXI User Manual All MXIbus masters must have bus request logic for requesting the MXIbus, and the MXIbus System Controller must have bus arbiter logic to grant the bus to requesting masters. Four signals are used for arbitration: bus request (BREQ*), bus grant in (BGIN*), bu[...]

Theory of Operation Chapter 6 VXI-MXI User Manual 6-14 © National Instruments Corporation For example, if the VXI -MXI owns the VMEbus and it receives a VMEbus bus request from another VXIbus device, the VXI-MXI continues holding the VMEbus and arbitrates for the MXIbus. When it wins the MXIbus, the VXI -MXI can then release the VMEbus so that ano[...]

© National Instruments Corporation A-1 VXI-MXI User Manual Appendix A Specifications Capability Codes VMEbus Capability Code Description MA32, MA24, MA16 Master Mode A32, A24, and A16 addressing SA32, SA24, SA16 Slave Mode A32, A24, and A16 addressing MD32, MD16, MD08(EO) Master Mode D32, D16, and D08 data sizes SD32, SD16, SD08(EO) Slave Mode D32[...]

Specifications Appendix A VXI-MXI User Manual A-2 © National Instruments Corporation MXIbus Capability Code Description MA32, MA24, MA16 Master Mode A32, A24, and A16 addressing SA32, SA24, SA16 Slave Mode A32, A24, and A16 addressing MD32, MD16, MD08(EO) Master Mode D32, D16, and D08 data sizes SD32, SD16, SD08(EO) Slave Mode D32, D16, and D08 da[...]

Appendix A Specifications © National Instruments Corporation A-3 VXI-MXI User Manual Safety Not applicable Shock and Vibration Not applicable Physical Board size Fully shielded VXI C-size board (9.187 in. by 13.386 in.; 233.35 mm by 340 mm) Connectors Single fully implemented MXIbus connector Single INTX connector (on boards equipped with optional[...]

© National Instruments Corporation B-1 VXI-MXI User Manual Appendix B Mnemonics Key This appendix contains an alphabetical listing of mnemonics used in this manual to describe signals and terminology specific to MXIbus, VMEbus, VXIbus, and register bits. Refer also to the Glossary . The mnemonic types in the key that follows are abbreviated to mea[...]

Mnemonics Key Appendix B VXI-MXI User Manual B-2 © National Instruments Corporation Mnemonic Type Definition A A01 VBS VME Address Line 1 A16BASE[7-0] B A16 Window Base Address A16DIR B A16 Window Direction A16EN B A16 Window Enable A16HIGH[7-0] B A16 Window Upper Bound A16LOW[7-0] B A16 Window Lower Bound A16SIZE[2-0] B A16 Window Size A24BASE[7-[...]

Appendix B Mnemonics Key © National Instruments Corporation B-3 VXI-MXI User Manual Mnemonic Type Definition BTO VBS/MBS Bus Timeout BUSY* MBS Bus Busy C CLK10 VXS VXIbus 10-MHz System Clock CMODE B Comparison Mode D D[31-0] VBS VMEbus Data Lines 31 through 0 DEVCLASS B VXIbus Device Class DIRQ[7-1] B Drive IRQ Lines DRVECL0 B Drive ECL Trigger Li[...]

Mnemonics Key Appendix B VXI-MXI User Manual B-4 © National Instruments Corporation Mnemonic Type Definition I I[15-0] B Interrupt Acknowledge Status/ID IACK* VME VMEbus Interrupt Acknowledge IACKIN* VME VMEbus Interrupt Acknowledge Daisy-Chain Input IACKOUT* VME VMEbus Interrupt Acknowledge Daisy-Chain Output INTLCK B Interlocked Bus Operation IN[...]

Appendix B Mnemonics Key © National Instruments Corporation B-5 VXI-MXI User Manual Mnemonic Type Definition O OMS[2-0] B Output Trigger Mode Select OTS[3-0] B Output Trigger Select OUTEN B MODID Output Enable P PAR* MBS MXIbus Parity Line PARERR B Parity Error PASS B Passed PRI ARBITER VME VMEbus Prioritized Arbiter PULSE B Pulse Selected Trigger[...]

Mnemonics Key Appendix B VXI-MXI User Manual B-6 © National Instruments Corporation Mnemonic Type Definition T TERMPWR MXI Terminator Power TRIGDIR[7-0] B Trigger Direction TRIGEN[7-0] B Trigger Enable TRIGIN B Trigger Input Status TRIGINT B Trigger Interrupt TRIGINTIE B Trigger Interrupt Enable TRIGOUT B Trigger Output Status TTLTRG[7-0] VXI VXIb[...]

© National Instruments Corporation C-1 VXI-MXI User Manual Appendix C VXI-MXI Component Placement This appendix contains instructions on opening the VXI-MXI module, and removing and reinstalling the optional INTX daughter card. This appendix also contains parts locator diagrams of the VXI-MXI and the INTX daughter card. Removing the Metal Enclosur[...]

VXI-MXI Component Placement Appendix C VXI-MXI User Manual C-2 © National Instruments Corporation Figure C-1. VXI -MXI Parts Locator Diagram[...]

Appendix C VXI-MXI Component Placement © National Instruments Corporation C-3 VXI-MXI User Manual Removing the INTX Daughter Card from the VXI-MXI Under normal circumstances you will not need to remove the INTX card from the VXI-MXI module. You have easy access to the INTX terminators and CLK10 mapping switches through cut-outs in the VXI-MXI encl[...]

VXI-MXI Component Placement Appendix C VXI-MXI User Manual C-4 © National Instruments Corporation Figure C-3 is a parts locator diagram of the front side of the INTX daughter card, showing the location of the various components. Figure C-3. VXI-MXI INTX Parts Locator Diagram (Front View) Installing the INTX Daughter Card onto the VXI-MXI When you [...]

© National Instruments Corporation D- 1 VXI-MXI User Manual Appendix D Connector Descriptions This appendix describes the connector pin assignments for the MXIbus connector and the INTX connector. MXIbus Connector The MXIbus signals are assigned to the device connector as shown in Figure D-1 and Table D-1. 21 20 19 18 17 16 15 14 13 12 1 1 10 09 0[...]

Connector Descriptions Appendix D VXI-MXI User Manual D- 2 © National Instruments Corporation The MXIbus defines 49 active signals, 12 ground lines, and 1 line for terminator power. Table D-2 describes the signals on the MXIbus connector and groups them in five categories. Table D-2. MXIbus Signal Groupings Category Description Signal Name Lines P[...]

Appendix D Connector Descriptions © National Instruments Corporation D- 3 VXI-MXI User Manual INTX Connector The INTX connector is used only on VXI-MXIs with the INTX daughter card option. The INTX signals are assigned to the device connector as shown in Figure D-2 and Table D-3. 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22[...]

Connector Descriptions Appendix D VXI-MXI User Manual D- 4 © National Instruments Corporation Table D-4. INTX Signal Groupings Category Description Signal Name Lines Type § Interrupts INTX Interrupt IRQ7-1* 7 O.C. Triggers INTX Trigger TRIG7-0 +,- 16 Diff Utility Lines INTX SYSRESET SYSRESET* 1 O.C. INTX SYSFAIL SYSFAIL* 1 O.C. INTX ACFAIL ACFAIL[...]

© National Instruments Corporation E-1 VXI-MXI User Manual Appendix E Configuring a Two-Frame System This appendix describes how to configure a system containing two mainframes linked by VXI-MXI modules. Configuring VXI-MXIs for a Two-Frame System The factory configuration of the VXI-MXI is suitable for the most common system configurations. Howev[...]

Configuring a Two-Frame System Appendix E VXI-MXI User Manual E-2 © National Instruments Corporation Figure E-2 shows the necessary settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI without the INTX option installed in Frame A. Figure E-2. VXI-MXI in Frame A without INTX[...]

Appendix E Configuring a Two-Frame System © National Instruments Corporation E-3 VXI-MXI User Manual Figure E-3 shows the necessary settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI without the INTX option installed in Frame B. Figure E-3. VXI-MXI in Frame B without INTX[...]

Configuring a Two-Frame System Appendix E VXI-MXI User Manual E-4 © National Instruments Corporation Figure E-4 shows the necessary settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI with the INTX option installed in Frame A. Figure E-4. VXI-MXI in Frame A with INTX[...]

Appendix E Configuring a Two-Frame System © National Instruments Corporation E-5 VXI-MXI User Manual Figure E-5 shows the necessary settings of the VXI -MXI configuration jumpers and switches for a VXI-MXI with the INTX option installed in Frame B. Figure E-5. VXI-MXI in Frame B with INTX[...]

Configuring a Two-Frame System Appendix E VXI-MXI User Manual E-6 © National Instruments Corporation Configuration Requirements for Two-Frame System This section contains miscellaneous information you need to consider as you configure a two-frame system. BTO Unit Notice that although the VXI-MXI in Frame A is not the VXI System Controller (not a S[...]

© National Instruments Corporation F-1 VXI-MXI User Manual Appendix F Customer Communication For your convenience, this appendix contains forms to help you gather the information necessary to help us solve technical problems you might have as well as a form you can use to comment on the product documentation. Filling out a copy of the Technical Su[...]

Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware, and use the completed copy of this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions m[...]

VXI-MXI Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item. Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your current configuration. Completing this form accurately before[...]

Other Products • Other MXIbus Devices in System Manufacturer Model Function Slot Logical Address • Other VXIbus Devices Manufacturer Model Function Slot Logical Address • Address Space(s) and Size(s) of Other Devices: _________________________________________________ _________________________________________________ __________________________[...]

Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: VXI-MXI User Manual Edition Date: October 1993 Part Number: 320222-01 Please comment on the completeness, clarity, and organization of the manual. If[...]

© National Instruments Corporation Glossary-1 VXI-MXI User Manual Glossary ___________________________________________________ Prefix Meaning Value n- nano- 10 -9 µ- micro- 10 -6 m- milli- 10 -3 K- kilo- 10 3 M- mega- 10 6 g- giga- 10 9 Symbols ° degrees ohms % percent ± plus or minus A A amperes A16 Space VXIbus address space equivalent to the[...]

Glossary VXI-MXI User Manual Glossary-2 © National Instruments Corporation Address Modifier One of six signals in the VMEbus specification used by VMEbus masters to indicate the address space and mode (supervisory/nonprivileged, data/ program/block) in which a data transfer is to take place. Address Space A set of 2 n memory locations differentiat[...]

Glossary © National Instruments Corporation Glossary-3 VXI-MXI User Manual Block-mode An uninterrupted transfer of data elements in which the master sources Transfer only the first address at the beginning of the cycle. The slave is then responsible for incrementing the address on subsequent transfers so that the next element is transferred to or [...]

Glossary VXI-MXI User Manual Glossary-4 © National Instruments Corporation Configuration A set of registers through which the system can identify a module device Registers requirements. In order to support automatic system and memory configuration, the VXIbus specification requires that all VXIbus devices h ave a set of such registers, all accessi[...]

Glossary © National Instruments Corporation Glossary-5 VXI-MXI User Manual Dynamically A device that has its logical address assigned by the Resource Manager. A Configured Device VXI device initially responds at Logical Address 255 when its MODID line is asserted. A MXIbus device responds at Logical Address 255 during a priority select cycle. The [...]

Glossary VXI-MXI User Manual Glossary-6 © National Instruments Corporation I IACK Interrupt Acknowledge IC Integrated Circuit IEEE Institute of Electrical and Electronics Engineers IEEE 1014 The VME specification. in. inches I/O input/output; the techniques, media, and devices used to achieve communication between entities. Interlocked Contrasted [...]

Glossary © National Instruments Corporation Glossary-7 VXI-MXI User Manual M MB megabytes of memory m meters Mainframe Extender A device such as the VXI-MXI that interfaces a VXIbus mainframe to an interconnect bus. It routes bus transactions from the VXIbus to the interconnect bus or vice versa. A mainframe extender has a set of registers that de[...]

Glossary VXI-MXI User Manual Glossary-8 © National Instruments Corporation N Nonprivileged One of the defined types of VMEbus data transfers; indicated by certain Access address modifier codes. Each of the defined VMEbus address spaces has a defined nonprivileged access mode. Non-Slot 0 Device A device configured for installation in any slot in a [...]

Glossary © National Instruments Corporation Glossary-9 VXI-MXI User Manual Resource Manager A Message-Based Commander located at Logical Address 0, which provides configuration management services such as address map configuration, Commander and Servant mappings, and self-test and diagnostic management. Response A signal or interrupt generated by [...]

Glossary VXI-MXI User Manual Glossary-10 © National Instruments Corporation SMB Sub-miniature BNC; a miniature connector for coaxial cable connections. Soft Reset Occurs when the RESET bit in the VXIbus Control Register of the VXI-MXI is set. A soft reset clears signals that are asserted by bits in the configuration registers but does not clear co[...]

Glossary © National Instruments Corporation Glossary-11 VXI-MXI User Manual TERMPWR Termination Power; 3.4 VDC for the MXIbus. Trigger Either TTL or ECL lines used for intermodule communication. TTL Transistor-Transistor Logic V V volts VDC volts direct current VMEbus Versa Module Eurocard or IEEE 1014; the IEEE Standard for a Versatile Backplane [...]

© National Instruments Corporation Index-1 VXI-MXI User Manual Index A A16 Window Map Register, 4-14 to 4-17 bit descriptions, 4-14 to 4-15, 4-16 definition, 2-7 description, 4-14 example, 4-15 format CMODE bit cleared, 4-14 CMODE bit set, 4-16 planning VXIbus/MXIbus system A16 address map examples, 5-24 to 5-25 overview, 5-21 space allocation for[...]

Index VXI-MXI User Manual Index-2 © National Instruments Corporation A32EN, 4-22, 4-23 A32HIGH[7-0], 4-24 A32LOW[7-0], 4-24 A32SIZE[2-0], 4-23 ACCDIR, 4-7 ACFAIL, 4-47 ACFAILIE, 4-47 ACFAILIN, 4-29 ACFAILINT, 4-46 ACFAILOUT, 4-29 ADDR, 4-4 ASIE, 4-44 ASINT*, 4-44 BKOFF, 4-46 BKOFFIE, 4-46 BOFFCLR, 4-35 CMODE, 4-32 DEVCLASS, 4-4 DIRQ[7-1], 4-47 DRV[...]

Index © National Instruments Corporation Index-3 VXI-MXI User Manual BTO. See VME BTO chain position; VME BTO circuitry. bus master compliance levels, 2-4 bus slave compliance levels, 2-3 C cable connections INTX daughter card, 3-27 MXIbus, 3-28 to 3-30 capability codes MXIbus, A-2 VMEbus, A-1 VXIbus, A-1 CLK10 circuitry definition, 2-5 INTX daugh[...]

Index VXI-MXI User Manual Index-4 © National Instruments Corporation environmental specifications, A-2 to A-3 equipment, optional, 1-6 to 1-7 ETOEN bit, 4-43 ETRG[7-0]DIR bit, 4-27 ETRG[7-0]EN bit, 4-27 ETRIG bit, 4-44 EXT CLK connector, 6-2 EXT CLK SMB input/output configuration, 3-20 Extended P2 ECL Trigger Line Support (1) bit, 4-28 Extended P3[...]

Index © National Instruments Corporation Index-5 VXI-MXI User Manual J jumpers and switches CLK10 source signal options, 3-19 EXT CLK SMB input/output, 3-20 factory default settings VXI-MXI with INTX, 3-3 VXI-MXI without INTX, 3-2 interlocked arbitration mode, 3-14 INTX CLK10 mapping switches, 3-21 to 3-22 logical address, 3-6 to 3-7 MXIbus fairne[...]

Index VXI-MXI User Manual Index-6 © National Instruments Corporation connector description, D-1 to D-2 definition, 1-4 limit for daisy-chained devices, 3-29 mapping, 1-4 signal assignments, D-1 signal groupings, D-2 system power cycling requirements, 3-30 to 3-31 termination networks, 3-24 to 3-25 MXIbus defined registers configuration registers, [...]

Index © National Instruments Corporation Index-7 VXI-MXI User Manual R RDY bit, 4-8 registers description format, 4-1 hard reset, 4-1 MXIbus defined registers Drive Triggers/Read LA Register, 4-39 to 4-40, 6-2 Interrupt Status/Control Register, 4-45 to 4-47 IRQ Acknowledge Registers, 4-51 MXIbus IRQ Configuration Register, 4-37 to 4-38 MXIbus Lock[...]

Index VXI-MXI User Manual Index-8 © National Instruments Corporation SUBCLASS bit, 4-30 Subclass Register, 4-30 switches. See jumpers and switches. Synchronous protocol, 6-3 SYSFAIL bit, 4-46 SYSFAIL signal, 2-5, 6-3 SYSFAILIE bit, 4-46 SYSFAILIN bit, 4-29 SYSFAILINT bit, 4-47 SYSFAILOUT bit, 4-29 SYSFIN bit, 4-37 SYSFOUT bit, 4-37 SYSRESET signal[...]

Index © National Instruments Corporation Index-9 VXI-MXI User Manual signals list of signals, 2-1 to 2-2 signals supplied by VXI-MXI, 1-4 to 1-5 VMEbus Data Transfer Bus Arbiter (PRI ARBITER), 3-5 VMEbus Data Transfer Bus (DTB), 3-7 VMEbus System Controller, 3-5 VMEbus timeout. See VME BTO chain position; VME BTO circuitry. VMEbus transceivers add[...]