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A good user manual
The rules should oblige the seller to give the purchaser an operating instrucion of Atmel ATmega324PA, along with an item. The lack of an instruction or false information given to customer shall constitute grounds to apply for a complaint because of nonconformity of goods with the contract. In accordance with the law, a customer can receive an instruction in non-paper form; lately graphic and electronic forms of the manuals, as well as instructional videos have been majorly used. A necessary precondition for this is the unmistakable, legible character of an instruction.
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First and foremost, an user manual of Atmel ATmega324PA should contain:
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Usually it results from the lack of time and certainty about functionalities of purchased items. Unfortunately, networking and start-up of Atmel ATmega324PA alone are not enough. An instruction contains a number of clues concerning respective functionalities, safety rules, maintenance methods (what means should be used), eventual defects of Atmel ATmega324PA, and methods of problem resolution. Eventually, when one still can't find the answer to his problems, he will be directed to the Atmel service. Lately animated manuals and instructional videos are quite popular among customers. These kinds of user manuals are effective; they assure that a customer will familiarize himself with the whole material, and won't skip complicated, technical information of Atmel ATmega324PA.
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Table of contents for the manual
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Page 1
Features • High-perf ormance, Low-po wer A VR ® 8-bit Micr ocontroller • Adv anced RISC Architecture – 131 P owerful Instruction s – Mo st Single-c lock Cyc le Executio n – 32 x 8 General Purpose W orking Registers – Fully Static Operat ion – Up to 20 MIP S Throughput at 2 0 MHz – On-chip 2 -cycle Multiplier • High Endurance Non-[...]
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Page 2
2 8152AS–AVR–11/08 ATmega324PA 1. Pin Configurations 1.1 Pinout - PDIP/TQ FP/VQFN/QFN/MLF Figure 1-1. Pinout Note: The large center pad under neath the VQFN/QFN/MLF package should be soldered to ground on the board to ensure good mechani cal stability . (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10/INT2/AIN0) PB2 (PCINT1 1/OC0A/AIN1) PB3 ([...]
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Page 3
3 8152AS–AVR–11/08 ATmega324PA 1.2 Pinout - DRQFN Figure 1-2. DRQFN - Pinout T able 1-1. DR QFN - Pinout A1 PB5 A7 PD3 A13 PC4 A19 PA 3 B1 PB6 B6 PD4 B11 PC5 B16 PA 2 A2 PB7 A8 PD5 A14 PC6 A20 PA 1 B2 RESET B7 PD6 B12 PC7 B17 PA 0 A3 VCC A9 PD7 A15 AV C C A21 VCC B3 GND B8 VCC B13 GND B18 GND A4 XT AL2 A10 GND A1 6 AREF A22 PB0 B4 XT AL1 B9 PC0[...]
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Page 4
4 8152AS–AVR–11/08 ATmega324PA 1.3 Pinout - VFBGA Figure 1-3. VFBGA - Pinout T able 1-2. BGA - Pinout 1234567 A GND PB4 PB2 GND VCC P A2 GND B PB6 PB5 PB3 PB0 P A0 P A3 P A5 C VCC RESET PB7 PB1 P A1 P A6 AREF D GND XT AL2 PD0 GND P A 4 P A7 GND E XT AL1 PD1 PD5 PD7 PC5 PC7 A VCC F PD2 PD3 PD6 PC0 PC2 PC4 PC6 G GND PD4 VCC GND PC1 PC3 GND A B C [...]
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Page 5
5 8152AS–AVR–11/08 ATmega324PA 2. Overview The ATmega324PA is a low-power CMOS 8- bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instru ctions in a single clock cycle, the ATmega324PA achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus proc ess[...]
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Page 6
6 8152AS–AVR–11/08 ATmega324PA The ATmega324PA provides the following featur es: 32K bytes of In-System Programmable Flash with Read-While-Write c apabilities, 1K bytes EEPROM, 2K bytes SRAM, 32 general pur- pose I/O lines, 32 general purpo se working register s, Real Time Counter (RTC), three flexib le Timer/Counters with comp are modes and PW[...]
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Page 7
7 8152AS–AVR–11/08 ATmega324PA 2.2 Pin Descriptions 2.2.1 VCC Digital supply voltage. 2.2.2 GND Ground. 2.2.3 P ort A (P A7:P A0) Port A serves as analog inputs to the Analog-to-digital Co nver ter. Port A also serves as an 8-bit bi-direction al I/O port with inte rnal pull-up resistors (sele cted for each bit). The Port A output buffer s have [...]
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Page 8
8 8152AS–AVR–11/08 ATmega324PA 2.2.7 RESET Reset input. A low level on this pin for longer than the minimum pulse length will gen erate a reset, even if the clock is not runni ng. The minimum pulse length is given in ”System an d Reset Characteristics” on page 329 . Sho rter pulses are not guarant eed to generate a re se t. 2.2.8 XT AL1 Inp[...]
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Page 9
9 8152AS–AVR–11/08 ATmega324PA 5. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pa ge (0xFF) Reserved - - - - - - - (0xFE) Reserved - - - - - - - - (0xFD) Reserved - - - - - - - - (0xFC) Reserved - - - - - - - - (0xFB) Reserved - - - - - - - (0xFA) Reserved - - - - - - - - (0xF9) Reserved - - - - - - - (0xF8) Res[...]
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Page 10
10 8152AS–AVR–11/08 ATmega324PA (0xC0) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0 190/205 (0xBF) Reserved - - - - - - - - (0xBE) Reserved - - - - - - - - (0xBD) TWAMR TWAM6 TWAM5 TWAM4 TWAM3 TW AM2 TWAM1 TWAM0 -2 3 6 (0xBC) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN -T W I E 2 3 3 (0xBB) TWDR 2-wire Serial I nterface Data Register 235 (0xBA) TW[...]
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Page 11
11 8152AS–AVR–11/08 ATmega324PA (0x7E) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 260 (0x7D) Reserved - - - - - - - - (0x7C) ADMUX REFS1 REFS0 ADLAR MU X4 MUX3 MUX2 MUX1 MUX0 256 (0x7B) ADCSRB -A C M E - - - ADTS2 ADTS1 ADTS0 2 39 (0x7A) ADCSRA ADEN ADSC ADA TE ADIF ADIE ADPS2 ADPS1 ADPS0 258 (0x79) ADCH ADC Data Regis ter High byte [...]
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Page 12
12 8152AS–AVR–11/08 ATmega324PA Notes: 1. F or compatibili ty with future devices, reserved bits s hould be written to zero if accessed. Reser ved I/O memory addre ss es should nev er be written. 2. I/O registers within the address range $00 - $1F are directly bit-accessible using th e SBI and CBI instr uctions. In these re g - isters, the v al[...]
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Page 13
13 8152AS–AVR–11/08 ATmega324PA 6. Instruction Set Summary Mnemonics Operands Description Operation Flags #Clocks ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers Rd ← Rd + Rr Z,C,N,V,H 1 ADC Rd, Rr Add with Carry two Regi sters Rd ← Rd + Rr + C Z,C,N,V,H 1 ADIW Rdl,K Add Immediate to Wo rd Rdh:Rdl ← Rdh:Rdl + K Z,C,N,V,S 2 [...]
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Page 14
14 8152AS–AVR–11/08 ATmega324PA BRVC k Branch if Overflow Flag is Cleared if (V = 0) then PC ← PC + k + 1 None 1/2 BRIE k Branch if Interrupt En abled if ( I = 1) then PC ← PC + k + 1 None 1/2 BRID k Branch if Interrup t Disabled if ( I = 0) then PC ← PC + k + 1 None 1/2 BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Re gister I/O(P[...]
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Page 15
15 8152AS–AVR–11/08 ATmega324PA SPM Store Program Memory (Z) ← R1:R0 None - IN Rd, P In Port Rd ← PN o n e 1 OUT P, Rr Out Port P ← Rr None 1 PUSH Rr Push Register on Stack STACK ← Rr None 2 POP Rd Pop Register from Stack Rd ← STACK None 2 MCU CONTROL INSTRUCTIONS NOP No Operation None 1 SLEEP Sleep (see specifi c descr. for Sleep fun[...]
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Page 16
16 8152AS–AVR–11/08 ATmega324PA 7. Or dering Information 7.1 A Tmega324P A Notes: 1. This device can also be supplied in wafe r f orm. Please contac t your local Atmel sales office for detailed ordering info r mation and minimum quantities. 2. Pb-free packaging, complies to the Euro pean Directive f or Restr iction of Hazardous Subst ances (RoH[...]
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Page 17
17 8152AS–AVR–11/08 ATmega324PA 8. P ac kaging Inf ormation 8.1 44A 2325 Orchard P arkwa y San Jose, CA 95131 TITLE DRA WING NO. R REV . 44A, 44-lead, 10 x 10 mm Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) B 44A 10/5/2001 PIN 1 IDENTIFIER 0˚~7˚ PIN 1 L C A1 A2 A D1 D e E1 E B COMMON DIMEN[...]
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Page 18
18 8152AS–AVR–11/08 ATmega324PA 8.2 40P6 2325 Orchard P arkwa y San Jose, CA 95131 TITLE DRA WING NO. R REV . 40P6 , 40-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) B 40P6 09/28/01 PIN 1 E1 A1 B REF E B1 C L SEA TING PLANE A 0º ~ 15º D e eB COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 4.826[...]
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Page 19
19 8152AS–AVR–11/08 ATmega324PA 8.3 44M1 TITLE DRA WING NO. GPC REV . Pa ck a g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 44M1 ZW S H 44M1, 44-pad, 7 x 7 x 1.0 mm Body , Lead Pitch 0.50 mm, 5.20 mm Exposed Pad , T hermally Enhanced Plastic V ery Thin Quad F lat No Lead P ackage ( VQFN) 9/26/0 8 COMMON DIMEN S ION S (Unit of Me asu[...]
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Page 20
20 8152AS–AVR–11/08 ATmega324PA 8.4 44MC TITLE DRA WING NO . REV . Pa ck a g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 44MC A 9/1 3 /07 D2 E2 L L B15 A1 8 B11 A1 3 B10 A12 B6 A7 A6 B5 B1 B20 A1 A24 eT L b R0.20 0.40 eR A19 B16 eT/2 S IDE VIEW A1 A y C D E Pin 1 ID T OP VIEW BO TT OM VIEW Note: 1. The ter min a l #1 ID i s a L as e[...]
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Page 21
21 8152AS–AVR–11/08 ATmega324PA 8.5 49C2 TITLE DRA WING NO. GPC REV . Pa ck a g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 49C2 CBD A 49C2, 49- ba ll (7 x 7 Arr a y), 0.65 mm Pitch, 5.0 x 5.0 x 1.0 mm, V er y Thin, Fine-Pitch B a ll Grid Arr a y P a ck a ge (VFBGA) 3 /14/0 8 COMMON DIMEN S ION S (Unit of Me asu re = mm) S YMBOL MIN[...]
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Page 22
22 8152AS–AVR–11/08 ATmega324PA 9. Errata 9.1 A Tmega324P A Rev . F No known Errata.[...]
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Page 23
23 8152AS–AVR–11/08 ATmega324PA 10. Datasheet Re vision History Please note that the referring page numbers in this se ction are referred to this documen t. The referring re visio n in th is section are referring to the document revision. 10.1 Re v . 8152A- 11/08 1. Ini ti al re vision (Based on the A Tmega1 64P /324P/644P datasheet 80 11K-A VR[...]
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Page 24
8152AS–AVR–11/0 8 Headquar ters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Unit 1-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon Hong Kong Tel: (852) 2245-6100 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre T[...]