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Table of contents for the manual
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Page 1
CY14B256K 256 Kbit (32K x 8) nvSRAM with Real T ime Clock Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-06431 Rev . *H Revised February 24, 2009 Features ■ 25 ns, 35 ns, and 45 ns access times ■ Pin compat ible with STK17T88 ■ Data integrity of Cypress nvSR AM comb[...]
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Page 2
CY14B256K Document Number: 001-06431 Rev . *H Page 2 of 28 Pin Configurations Figure 1. 48-Pin SSOP Pin Definitions Pin Name Alt IO T ype Description A 0 –A 14 Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. DQ0-DQ7 Input or Output Bidirectional Dat a IO lines . Used as input or output lines depending on operation. NC [...]
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Page 3
CY14B256K Document Number: 001-06431 Rev . *H Page 3 of 28 Device Operation The CY14B256K nvSRAM consists of two functional components paired in the same physical cell. Th e component s are SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvola[...]
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Page 4
CY14B256K Document Number: 001-06431 Rev . *H Page 4 of 28 t DELA Y , multi ple SRAM READ operations take place. If a WRITE is in progress when HSB is pulled LOW , it allows a time, t DELA Y , to complete. However , any SRAM WRITE cycles requested after HSB goes LOW are inhibited until HSB retu rns HIGH. During any STORE operation, regardless of ho[...]
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Page 5
CY14B256K Document Number: 001-06431 Rev . *H Page 5 of 28 Low A verage Active Power CMOS technology provides the CY14B25 6K the benefit of drawing significantly le ss current when it is cycled at times longer than 50 ns. Figure 3 shows the relation ship between I CC and READ and/or WRITE cycle time. Worst case current consumption is shown for comm[...]
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Page 6
CY14B256K Document Number: 001-06431 Rev . *H Page 6 of 28 T able 1. Mode Selection CE WE OE A13–A0 Mode IO Power H X X X Not Selected Output High Z S tandby L H L X Read SRAM Output Data Active L L X X Write SRAM Input Data Active L H L 0x0E38 0x31C7 0x03E0 0x3C1F 0x303F 0x0FC0 Read SRAM Read SRAM Read SRAM Read SRAM Read SRAM Nonvolatile STORE [...]
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Page 7
CY14B256K Document Number: 001-06431 Rev . *H Page 7 of 28 Real Time Clock Operation nvTIME Operation The CY14B256K consists of internal registe rs that contain clock, alarm, watchdog, interrupt, and co ntro l functions. RTC registers use the last 16 address locati ons of the SRAM . Intern al double buffering of the clock and the clock and timer in[...]
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Page 8
CY14B256K Document Number: 001-06431 Rev . *H Page 8 of 28 Calibrating the Clock The RTC is driven by a quartz controlled oscillator with a nominal frequency of 32.768 kHz. Clock accu racy depends on the quality of the crystal and calibration. The crystal oscillators typically have an error of + 20ppm to + 35ppm. However , CY14B256K employs a calib[...]
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Page 9
CY14B256K Document Number: 001-06431 Rev . *H Page 9 of 28 Power Monitor The CY14B256K provides a power management sch eme with power fail interru pt capability . It also controls the inte rnal switch to backup po wer for the cl ock and prot ects t he memory from lo w V CC access. The power monitor is b ased on an internal band gap reference circui[...]
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Page 10
CY14B256K Document Number: 001-06431 Rev . *H Page 10 of 28 Figure 5. Interrupt Block Diagram Figure 6. RTC Recommende d Componen t Configurati on WDF - W atchdog T imer Flag WIE - W atchdog I nterrupt PF - Power Fai l Flag PFE - Power F ail Enable AF - Alarm Flag AIE - Ala rm Interrup t Enable P/L - Pulse Le vel H/L - High /Low Enable W atchdog T [...]
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Page 11
CY14B256K Document Number: 001-06431 Rev . *H Page 1 1 of 28 T able 3. RTC Register Map [5, 6] Register BCD Format Data [5 ] Fu nction/Range D7 D6 D5 D4 D3 D2 D1 D0 0x7FFF 10s Y ears Y ears Y ears: 00–99 0x7FFE 0 0 0 10s Months Months Months: 01–1 2 0x7FFD 0 0 10s Day of Month Day Of Month Day of Month: 01–31 0x7FFC 0 0 0 0 0 Day of Week Day [...]
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Page 12
CY14B256K Document Number: 001-06431 Rev . *H Page 12 of 28 T able 4. Register Map Detail 0x7FFF Time Keeping - Y ears D7 D6 D5 D4 D3 D2 D1 D0 10s Y ears Y ears Contains the lower two BCD digits of the year . Lower nibble (four bits) contains the value for years; upper nibble (four bits) contains the value for 10s of years. Each nibble operates fro[...]
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Page 13
CY14B256K Document Number: 001-06431 Rev . *H Page 13 of 28 0X7FF8 Calibration/Con trol D7 D6 D5 D4 D3 D2 D1 D0 OSCEN 0 Calibration Sign Calibration OSCEN Oscillator Enable. When set to 1, the oscillator is stopped . When set to 0, the oscillator runs. Disabling the oscillator saves battery or capacitor power during storage. Calibration Sign Determ[...]
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Page 14
CY14B256K Document Number: 001-06431 Rev . *H Page 14 of 28 0x7FF4 Alarm - Hours D7 D6 D5 D4 D3 D2 D1 D0 M 10s Alarm Hours Alarm Hours Contains the alarm value for the hours and the ma sk bit to select or desele ct the hours value. M Match. When this bit is set to 0, the hours valu e is used in the alarm match. Setting this bit to 1 causes the matc[...]
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Page 15
CY14B256K Document Number: 001-06431 Rev . *H Page 15 of 28 Maximum Ratings Exceeding maximum ratin gs may impair the useful life of the device. These user guidelines are not teste d. S torage T emperature ............. .............. ...... –65 ° C to +150 ° C Ambient T emper ature wit h Power Applied ....... ............................ .....[...]
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Page 16
CY14B256K Document Number: 001-06431 Rev . *H Page 16 of 28 Dat a Retention and Endurance Parameter Description Min Unit DA T A R Data Retention 20 Y ears NV C Nonvolatile STORE Operations 200 K Cap acitance These parameters are guaranteed but not tested. Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 2 5 ° C, f = 1 M[...]
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Page 17
CY14B256K Document Number: 001-06431 Rev . *H Page 17 of 28 AC Switching Ch aracteristics Parameter Description 25 ns 35 ns 45 ns Unit Min Max Min Max Min Max Cypress Parameter Alt. Parameter SRAM Read Cycle t ACE t ELQV Chip Enable Access T ime 25 35 45 ns t RC [10] t AVAV, t ELEH Read Cycle T ime 25 35 45 ns t AA [1 1] t AV Q V Address Access Tim[...]
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Page 18
CY14B256K Document Number: 001-06431 Rev . *H Page 18 of 28 AC Switching Ch aracteristics (continued) Parameter Description 25 ns 35 ns 45 ns Unit Min Max Min Max Min Max Cypress Parameter Alt. Parameter SRAM Write Cycle t WC t AVAV Write Cycle T ime 25 35 45 ns t PWE t WL WH, t WLEH Write Pulse Wid t h 20 25 30 ns t SCE t EL WH, t ELEH Chip Enable[...]
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Page 19
CY14B256K Document Number: 001-06431 Rev . *H Page 19 of 28 AutoStore or Power Up RECALL Parameter Descrip tion CY14B256K Unit Min Max t HRECALL [17] Power Up RECALL Duration 40 ms t STORE [18, 19] STORE Cycle Duration Commercial 12.5 ms Industrial 15 ms V SWITCH Low V oltage T rigger Level 2.65 V t VCCRISE VCC Rise T ime 150 μ s Figure 12. AutoSt[...]
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Page 20
CY14B256K Document Number: 001-06431 Rev . *H Page 20 of 28 Sof tware Con trolled STORE/RECALL Cycles [20, 21] Parameter Alt. Parameter Descriptio n 25 ns 35 ns 45 ns Unit Min Max Min Max Min Max t RC t AVAV STORE/RECALL Initiation Cycle T ime 25 35 45 ns t SA t A VEL Address Setup T ime 0 0 0 ns t CW t ELEH Clock Pulse Width 20 25 30 ns t HA t EHA[...]
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Page 21
CY14B256K Document Number: 001-06431 Rev . *H Page 21 of 28 Hardware STORE Cycle Parameter Alt. Parameter Description CY14B256K Unit Min Max t DELA Y [22] Time Allowed to Comp lete SRAM Cycle 1 70 μ s t PHSB t HLHX Hardware STORE Pulse Width 15 ns Figure 15. Hardware STORE Cycle Sof t Sequence Commands Parameter Description CY14B2 56K Unit Min Max[...]
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Page 22
CY14B256K Document Number: 001-06431 Rev . *H Page 22 of 28 RTC Characteristics Parameter Description T est Conditions Min Max Unit I BAK [25] RTC Backup Current Commercial 300 nA Industrial 350 nA V RTCbat [26] R TC Battery Pin V oltage 1.8 3.3 V V RTCca p [27] RTC Capacitor Pin V oltage 1.2 2.7 V tOCS R TC Oscil lator T ime to S tart At Min T emp[...]
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Page 23
CY14B256K Document Number: 001-06431 Rev . *H Page 23 of 28 Part Numbering Nomenclature CY 14 B 256 K - SP 25 X C T Option: T -T ape and Reel Blank - S td. S peed: 25 - 25 ns 45 - 45 ns Data Bus: K - x8 + R TC Density: 256 - 256 Kb V oltage: B - 3.0V Cypress nvSRAM 14 - AutoStore + Software Store + Hardware Sto r e Package: SP - 48-SSOP 35 - 35 ns [...]
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Page 24
CY14B256K Document Number: 001-06431 Rev . *H Page 24 of 28 Ordering Information All the below mentioned parts are Pb-free. Contact your local Cypress sales representative for availability of these parts. Spee d (ns) Ordering Co de Package Diagram Package T ype Operating Range 25 CY14B256K-SP25XC 51-850 61 48-pin SSOP Commercial CY14B256K-SP25XCT C[...]
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Page 25
CY14B256K Document Number: 001-06431 Rev . *H Page 25 of 28 Package Diagrams Figure 17. 48-Pin Shrunk Small Outline Package (51-85061) 51-85061-* C [+] Feedback[...]
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Page 26
CY14B256K Document Number: 001-06431 Rev . *H Page 26 of 28 Document History Page Document Title: CY14B256K 256 Kbit (32K x 8) nvSRAM with Real Time Clock Document Number: 001-06431 Rev . ECN Orig. of Change Sub mission Date Description of Chan ge ** 425138 TUP See ECN New data sheet *A 43 7321 TUP See ECN Show data sheet on external Web *B 47 1966[...]
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Page 27
CY14B256K Document Number: 001-06431 Rev . *H Page 27 of 28 *H 2663934 GVCH/PYRS 02/24/09 U pdated Features section Updated pin definition o f WE pin Updated “Reading the clock”, “Backup Power”, “S topping and starting the Oscillator” and “Alarm” descriptions under R TC operation Modified “Figure 4. RTC Recomm ended Co mponent Con[...]
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Page 28
Document Number: 001-06431 Rev . *H Revised February 24, 2009 Page 28 of 28 All product s and comp any names mentioned in thi s document ar e the tradem arks of their re spective holder s. CY14B256K © Cypress Sem iconductor Corp oration, 2006-2009. The informatio n contained herein is su bject to change without notice. Cypress S emiconducto r Corp[...]