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Cypress STK11C88 manual

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Table of contents for the manual

  • Page 1

    STK1 1C88 256 Kbit (32K x 8) Sof tS tore nvSRAM Cypress Semiconducto r Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-50591 Rev . ** Revised January 29, 2009 Features ■ 25 ns and 45 ns access times ■ Pin compatible with industry standard SRAMs ■ Software initiated STORE and RECALL ■ Aut[...]

  • Page 2

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 2 of 15 Pin Configurations Figure 1. Pin Diagram - 28-Pin SOIC T able 1. Pin Defini tions - 28-Pin SOIC Pin Name Alt IO T ype Description A 0 –A 14 Input Address In pu ts. Used to select one of the 32,768 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bidirectional Data IO lines . Used as input [...]

  • Page 3

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 3 of 15 Device Operation The STK1 1C88 is a versatile memory chip that provides several modes of operation. The STK1 1C88 can operate as a standard 32K x 8 SRAM. A 32K x 8 array of nonvolatile storage elements shadow the SRAM. SRAM data can be copied fro m nonvolatile memory or nonvolatile data can[...]

  • Page 4

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 4 of 15 Hardware Protect The STK1 1C88 offers hardware protection against inad vertent STORE operation and SRAM WRITEs during low voltage conditions. When V CC <V SWITCH , all externally initiated STORE operations and SRAM WRITEs are inhibited. Noise Considerations The STK1 1C88 is a high speed [...]

  • Page 5

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 5 of 15 T able 2. Software ST OR E/RECALL Mo de Selection CE WE A 13 – A 0 Mode IO Notes L H 0x0E38 0x31C7 0x03E0 0x3C1F 0x303F 0x0FC0 Read SRAM Read SRAM Read SRAM Read SRAM Read SRAM Nonvolatile STORE Output Data Output Data Output Data Output Data Output Data Output Data [1, 2] L H 0x0E38 0x31[...]

  • Page 6

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 6 of 15 Maximum Ratin gs Exceeding maximum ratings may shorten the useful life of the device. These user g uidelines are not tested. S torage T emperature ............. ... ... ... ........... –65 ° C to +150 ° C T emperature under bias ................ .............. –55 ° C to +125 ° C Su[...]

  • Page 7

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 7 of 15 Cap acit ance In the following table, the capacitance parameters are listed. [4] Parameter Description T est Conditions Max Unit C IN Input Capacit ance T A = 25 ° C, f = 1 MHz, V CC = 0 to 3.0 V 5p F C OUT Output Capacitance 7 pF Thermal Resist ance In the following table, the thermal res[...]

  • Page 8

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 8 of 15 AC Switching Characteristics SRAM Read Cycle Parameter Description 25 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access Time 25 45 ns t RC [5] t AVAV, t ELEH Read Cycle T ime 25 45 ns t AA [6] t AV Q V Address Access T ime 25 45 ns t DOE t GLQV Output Enab [...]

  • Page 9

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 9 of 15 SRAM Writ e Cycle Parameter Description 25 n s 45 ns Unit Min Max Min Max Cypress Parameter Alt t WC t AVAV Write Cycle T ime 25 45 ns t PWE t WL WH, t WLEH Write Pulse Width 20 30 ns t SCE t EL WH, t ELEH Chip Enable T o End of W rite 20 30 ns t SD t DVWH, t DVEH Data Setup to End of W rit[...]

  • Page 10

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 10 of 15 STORE INHIBIT or Power Up RECALL Parameter Alt Description STK1 1C88 Unit Min Max t HRECALL [10] t RESTORE Power up RECALL Duration 550 μ s t STORE [6] t HLHZ STORE Cycle Duration 10 ms V RESET Low V oltage Reset Level 3.6 V V SWITCH Low V oltage T rig ger Level 4.0 4.5 V Switching W avef[...]

  • Page 11

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 1 1 of 15 Sof tware Controlled ST ORE/RECALL Cycle The software controlled ST ORE/RECALL cycle follows. [1 1, 12] Parameter Alt Description 25 ns 45 ns Unit Min Max Min Max t RC t AVAV STORE/RECALL Initiation Cycle T ime 25 45 ns t SA [1 1] t A VEL Address Setup T ime 0 0 ns t CW [1 1] t ELEH Clock[...]

  • Page 12

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 12 of 15 Ordering Information Spe e d (ns) Ordering Code Package Diagra m Package T ype Operating Range 25 ST K1 1C88-NF25TR 51-85026 28-Pin SOIC (300 mil) Commercial STK1 1C88-NF25 51-85026 28-Pin SOIC (300 mil) STK1 1C88-SF25TR 51-85058 28-Pin SOIC (330 mil) STK1 1C88-SF25 51-85058 28-Pin SOIC (3[...]

  • Page 13

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 13 of 15 Package Diagrams Figure 1 1. 28-Pin (300 mil) SOIC (51 -85026) 51 85127 *A PIN 1 ID 0.291[7.39] 0.300[7.62] 0.394[10.01] 0.419[10.64] 0.050[1.27] TYP. 0.092[2.33] 0.105[2.67] 0.004[0.10] 0.0118[0.30] SEATING PLANE 0.0091[0.23] 0.0125[3.17] 0.015[0.38] 0.050[1.27] 0.013[0.33] 0.019[0.48] 0.[...]

  • Page 14

    STK1 1C88 Document Number: 001-50591 Rev . ** Page 14 of 15 Figure 12. 28-Pin (330 mil) SOIC (51-85 058 ) Package Diagrams (continued) 51-85058-*A [+] Feedback[...]

  • Page 15

    Document Number: 001-50591 Rev . ** Revised January 29, 20 09 Page 15 of 15 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this docum ent may be the trade marks of t heir respe ctive holders. STK1 1C88 © Cypress Semicondu ctor Corpor ation, 2008-200 9. [...]