Intel 80219 manual

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The rules should oblige the seller to give the purchaser an operating instrucion of Intel 80219, along with an item. The lack of an instruction or false information given to customer shall constitute grounds to apply for a complaint because of nonconformity of goods with the contract. In accordance with the law, a customer can receive an instruction in non-paper form; lately graphic and electronic forms of the manuals, as well as instructional videos have been majorly used. A necessary precondition for this is the unmistakable, legible character of an instruction.

What is an instruction?

The term originates from the Latin word „instructio”, which means organizing. Therefore, in an instruction of Intel 80219 one could find a process description. An instruction's purpose is to teach, to ease the start-up and an item's use or performance of certain activities. An instruction is a compilation of information about an item/a service, it is a clue.

Unfortunately, only a few customers devote their time to read an instruction of Intel 80219. A good user manual introduces us to a number of additional functionalities of the purchased item, and also helps us to avoid the formation of most of the defects.

What should a perfect user manual contain?

First and foremost, an user manual of Intel 80219 should contain:
- informations concerning technical data of Intel 80219
- name of the manufacturer and a year of construction of the Intel 80219 item
- rules of operation, control and maintenance of the Intel 80219 item
- safety signs and mark certificates which confirm compatibility with appropriate standards

Why don't we read the manuals?

Usually it results from the lack of time and certainty about functionalities of purchased items. Unfortunately, networking and start-up of Intel 80219 alone are not enough. An instruction contains a number of clues concerning respective functionalities, safety rules, maintenance methods (what means should be used), eventual defects of Intel 80219, and methods of problem resolution. Eventually, when one still can't find the answer to his problems, he will be directed to the Intel service. Lately animated manuals and instructional videos are quite popular among customers. These kinds of user manuals are effective; they assure that a customer will familiarize himself with the whole material, and won't skip complicated, technical information of Intel 80219.

Why one should read the manuals?

It is mostly in the manuals where we will find the details concerning construction and possibility of the Intel 80219 item, and its use of respective accessory, as well as information concerning all the functions and facilities.

After a successful purchase of an item one should find a moment and get to know with every part of an instruction. Currently the manuals are carefully prearranged and translated, so they could be fully understood by its users. The manuals will serve as an informational aid.

Table of contents for the manual

  • Page 1

    Intel ® 80219 General Purpose PCI Processor Specification Update July 2004 Notice: The Intel ® 80 219 Genera l Purpose PCI Process or (80219) may cont ain desig n defect s or errors known as errata that may cau s e the product to deviate from published sp ecification s. Current c haracterized errat a are docu mented in th is specificat ion update[...]

  • Page 2

    2 Speci fication Update INFORMA TION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRO DUCTS. NO LI CENSE, EXPRESS OR IMPLIED, BY ESTO PPEL O R OTHERWISE, TO ANY INTELLECTUAL PROPER TY RIGH TS IS GRANTED BY THIS DOCUMENT . EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITI ONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO L IABILITY WHA T[...]

  • Page 3

    Spec if icatio n Updat e 3 Intel ® 80219 G eneral P urpose PCI Proc essor Contents Revision History ........... ................... .................. ................... ................... ... 5 Preface................ .................. ................... ....................... ................... ........ 6 Summa r y T able of Chan ges .....[...]

  • Page 4

    4 Speci fication Update Intel ® 80219 G eneral Purpos e PCI P rocesso r This Page Lef t Intentionall y Blank[...]

  • Page 5

    Specification Up date 5 Intel ® 8 0219 General Purpos e PCI Processor Revision His tory Revision History Date V ersion Description July 2004 002 Added S pecification Clarification 7. November 2003 001 Initial Rel e ase.[...]

  • Page 6

    6 Specification Up date Intel ® 80219 General Purpose PCI Processor Prefac e Preface This document is an upd at e to the specifications contained in the Affected Documents/Related Doc u me nts t a ble belo w . This do cument is a compilation of device an d documentation errata, specification clarifications and ch anges. It is int ended for hardwar[...]

  • Page 7

    Specification Up date 7 Intel ® 8 0219 General Purpos e PCI Processor Summary T able of Changes Summary T able of Changes The following table ind i cates the errata, specifi cation changes, specification clarifications , or documentation chan ges which apply to the Intel ® 80219 General Purpose PCI P rocessor product . Intel may fix some of the e[...]

  • Page 8

    8 Specification Up date Intel ® 80219 General Purpose PCI Processor Summary T able of Changes Core Errat a No. Step pings Page Status Errata A-0 1 X 13 NoFix Boundary Scan Is Not F ully Compliant to t he IEEE 1 149.1 S pecification 2 X 13 NoFix Drain Is Not Flushed Correctly when S talled i n the Pipeline 3 X 14 NoFix Undefined Data Processing-‘[...]

  • Page 9

    Specification Up date 9 Intel ® 8 0219 General Purpos e PCI Processor Summary T able of Changes Non-Core Errat a No. Ste ppings Page St at us Errat a A-0 1 X 20 NoFix The A TU Returns Invalid Data for the DWORD that T arget A bort ed from the MCU when Using 32-Bit Memory , ECC Enabled and in PCI Mode 2 X 20 NoFix PBI Issue When Using 16-bit PBI T [...]

  • Page 10

    10 Specification Up date Intel ® 80219 General Purpose PCI Processor Summary T able of Changes Docume nt ation Ch anges S p ecification Ch anges No. Step pings Page Speci fication Ch anges A-0 1 X 24 Signal NC2 was renamed to P_BMI (AE23). New function added to signal P_BMI. S p ecification Clarif ications No. Step pings Page St atus Specification[...]

  • Page 11

    Specification Up date 11 Intel ® 8 0219 General Purpos e PCI Processor Identification Information Identification Information Marki ngs Figur e 1. T o p s ide Mark ings Intel ® 80219 Gen eral Pur pose P CI Proce ssor SLxx x M © ‘2001 {FPO #} FW80219Mxxx INTEL[...]

  • Page 12

    12 Specification Up date Intel ® 80219 General Purpose PCI Processor Identifica ti on Infor mat ion Die Det ails Stepping Part Number QDF (Q )/ Specification Number (SL) V olt age ( V) Intel ® 80219 Gen eral Purpose PCI Pro cessor Speed (MHz) No tes A-0 A-0 A-0 A-0 FW80219M400 FW80219M600 FW80219M400 FW80219M600 Q690 Q691 SL7CL SL7CM 3.3 3.3 3.3 [...]

  • Page 13

    Specification Up date 13 Intel ® 8 0219 General Purpos e PCI Processor Core Er rata Core Errata 1. Boundary Scan Is Not Fully Compliant to th e IEEE 1 149.1 S pecification Problem: The IEEE S tandard 1 149.1 specifies the b oundary scan logic t o support two m ain goals: 1. T o allo w the interconnections between the various components to be teste[...]

  • Page 14

    14 Specification Up date Intel ® 80219 General Purpose PCI Processor Core E rrata 3. Undefined Dat a Processing-‘like’ I nstructions are Interpreted as an M SR Instruction Problem: The instructio n decode allows undef ined opcodes, which look similar to the MSR (Move to Status register from an ARM register) instruction, to be interpreted as an[...]

  • Page 15

    Specification Up date 15 Intel ® 8 0219 General Purpos e PCI Processor Core Er rata 6. Incorrect Decode of Unindexed Mode, Usi ng Addressing Mode 5, Can Corrupt Protected Registers Problem: The i nstruct i on decoder inco rrectly decodes the valid combination of P=0, U=1 and W=0, when using uni nd exed m ode i n a ddres s ing mo de 5 (load and sto[...]

  • Page 16

    16 Specification Up date Intel ® 80219 General Purpose PCI Processor Core E rrata 10. Aborted S tore that Hit s the Dat a Cache May Mark Writ eback Data As Dirty Problem: W hen there is an abor ted store that hits clean data in the data cache (d ata in an aligned four word range, that has n o t been modified from the co r e, since it was last load[...]

  • Page 17

    Specification Up date 17 Intel ® 8 0219 General Purpos e PCI Processor Core Er rata 1 1. Performance Monitor Unit Event 0x1 Can Be Incremented Erroneously by Unrelated Event s Problem: Even t 0x1 in the performan ce monitor unit (P MU) can be used to count cycles in which th e instruction cache can not deliver an instruction. The only cycles count[...]

  • Page 18

    18 Specification Up date Intel ® 80219 General Purpose PCI Processor Core E rrata 13. Accesses to the CP15 ID register with opcode2 > 0b001 returns unpredict able values Problem: Th e ARM Ar chitectur e Refer ence Manual (ARM DDI 0100E) s tates the following in chapter B-2, sec tio n 2 .3: “If an <opcode2 > value correspond ing to an un[...]

  • Page 19

    Specification Up date 19 Intel ® 8 0219 General Purpos e PCI Processor Core Er rata 15. Up dating the JT AG par a ll el register requires an extra TCK risin g edge Problem: IEEE 1 149.1 states that the ef fects of updatin g all parallel J T AG register s should be seen on the falling edge of TCK in the Update-DR state. The Intel Xscale ® core par[...]

  • Page 20

    20 Specification Up date Intel ® 80219 General Purpose PCI Processor Non-Core Er rat a Non-Core Errata 1. The A TU Returns Invalid Data f or the DWORD that T arget Aborted from the MCU when Using 32-Bit Memory , ECC Enabled and in PCI Mode The external PCI bus requests a read through th e A TU to the MCU, starting at the high DWORD. Remember the M[...]

  • Page 21

    Specification Up date 21 Intel ® 8 0219 General Purpos e PCI Processor Non-Co re Errata 3. MCU Pointers ar e Incorrect following a Restoration from a Power Fail Problem: This issue occurs wh en: 1. There i s a power failure (not during power man agement or normal shutdown). 2. When power is restored, the internal MCU pointers to the SDRAM may not [...]

  • Page 22

    22 Specification Up date Intel ® 80219 General Purpose PCI Processor Non-Core Er rat a 6. The MTTR1 (Core Multi-T r ansaction T i mer) is not opera ti ng due to improper behavior of the core inter n al bus request signal (REQ#) Problem: The MTTR1 (Core Multi-T r ansaction T im er) is n o t op erating due to i mp rop er b ehavi o r o f the core int[...]

  • Page 23

    Specification Up date 23 Intel ® 8 0219 General Purpos e PCI Processor Non-Co re Errata 8. Vih Minimum Input High V oltage ( Vih) level for the PCI pins Problem: The V ih Minimum Input H igh V oltage (V ih) le vel for the PCI pins is bei ng tested at 100 mV higher than the mini mum V ih lev el specified in T able 4-3 (DC Specificat ions for 3.3 V [...]

  • Page 24

    24 Specification Up date Intel ® 80219 General Purpose PCI Processor Specification Changes Specification Changes 1. Signal NC2 was renamed to P _BMI (AE23). New function added to si gnal P_BM I. The P_BMI (AE23) signal has been added to the Intel ® 8021 9 general purpose P CI processo r. This signal replaces, using an ex ternal GPIO pin for In it[...]

  • Page 25

    Specification Up date 25 Intel ® 8 0219 General Purpos e PCI Processor Specificat ion Cha nges Note: The host BIOS d o es not require any mod i fications to acco mmodate this im plementation. All the responsibility for I/O device configuration and resource falls to the 80219 firmware. Figure 2. Intel ® 80219 Gene ral Pur pose P CI Proce ssor P_BM[...]

  • Page 26

    26 Specification Up date Intel ® 80219 General Purpose PCI Processor Specific ation Clar ifications Specification Cla rificatio ns 1. The Intel ® 802 19 general purpose PCI p rocessor is complia nt with the PCI Local Bus Specifi cation, Revision 2.2 but it is not compliant wit h PCI Local Bus S pecification, Revi sion 2.3 Issue: The Intel ® 8 02[...]

  • Page 27

    Specification Up date 27 Intel ® 8 0219 General Purpos e PCI Processor Specificat ion Clarif icatio ns 3. BAR0 Configurati on When Using the Messag ing Unit (MU) Issue: When the BAR0 is configured as a prefetch able regis ter by def ault and a burst request cros s es i nto or th r oug h the rang e of o ffsets 4 0h to 4Ch (i.e . , th is includes th[...]

  • Page 28

    28 Specification Up date Intel ® 80219 General Purpose PCI Processor Specific ation Clar ifications 6. In-order Delivery not guara nteed for dat a blocks described by a single DMA descriptor Issue: In-order deliver y is not guaranteed fo r data blocks descr ibed by a single DMA descriptor that crosses a 1 KB boun dary . T h is may resu l t in out [...]

  • Page 29

    Specification Up date 29 Intel ® 8 0219 General Purpos e PCI Processor Documentation Changes Documentation Changes None for this revision of this specification update.[...]

  • Page 30

    30 Specification Up date Intel ® 80219 General Purpose PCI Processor Documentation Changes This Page Lef t Intentionally Bla nk[...]