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Table of contents for the manual
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Intel 186 EB/EC Evaluati on Board User’s Manual 80C186EC/80C188EC 80L186EC/8 0L188EC and 80C186EB/8 0C188EB 80L186EB/80L 188EB Ma rch 1 997 Order Num ber: 272 986-001[...]
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I nfo rmat i o n i n thi s do cum ent is p r ov id ed i n conn ect io n wit h Int el p r od uct s. No lic ense , ex pr e ss or i mp l ie d, b y e sto pp el o r oth er- wi se , to any i nt ell ect ua l pr o pert y rig ht s is gra nt e d by thi s doc umen t . Exc ep t as pr ov i de d in Int el ’s Ter m s an d Condi t i ons of Sal e f or suc h pro d[...]
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iii CONTENTS CHAPTER 1 ABOUT THIS MANUAL 1.1 CONTENT OV ERVIEW ................. ................. ................. ................. ................. ............ 1-1 1.2 NOTATION CO NVENTIONS ......... ................. ................. ................. ................. ............ 1-2 1.3 RELATED DOCUM ENTS ....................... ........[...]
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CONTENTS iv CHAPTER 4 INTRODUCTION TO THE SOFTWARE 4.1 SOFTWA RE FEATURES .............. ................. ................. ........ ................. ................. .... 4-1 4.2 RESTRICT IONS ........... ................. ................. ................. ................. ................. ............ 4-2 4.3 EMBEDDED CO NTROLLER MONITO R [...]
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v CONTENTS CHAPTER 6 iRISM-186 COMMANDS 6.1 IRISM VARIA BLES ................ ................. ........ ................. ................. ................. ............ 6-1 6.1.1 Other Variab les ................ ................. ................. ................ ................. ................. .....6-1 6.2 RISM STRUCTURE .................[...]
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CONTENTS vi FIGURES 2-1 Intel 186 EB Evaluat ion Board Layo ut .. ................. ................ ................. ................. .....2-1 2-2 Intel 186 EC Evaluation B oard La yout ......... ................. ................. ................. .............2-2 3-1 Physical Memor y Map ................. ................. ......... .........[...]
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A 1 About Thi s Manual[...]
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1-1 1 CHAPTER 1 ABOUT THIS MANUAL This man ual descri bes how t o set up and use t he Intel 186 EB/EC Eval uati on Board. The boa rd is us ed to evalua te har dware and sof tware per formanc e and p rovide an “emul ati on-li ke” fe el when exec uting and debug ging use r-wri tten c ode. This board ope rate s at eit her 3.3 volts o r 5.0 volt s.[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 1-2 1.2 NOTATION CONVENTIONS The fol lowin g notatio n conven tions are us ed in thi s manual . # Pound s ymbol ( #) appe nded to a sig nal name indic ates t hat t he signal is acti ve l ow . ital ics Itali cs ide ntif y vari ables and ind icate new terms. bold sans-serif In t ext, ident ifies comma[...]
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1-3 ABOUT THIS MANUAL 1 1.3 RELATED DOCUMENTS You can order I ntel produc t liter ature from t he fol lowing Int el li tera ture center s. 1-800- 548-47 25 U.S. and Ca nada 708-29 6-9333 U.S. (fr om overseas ) 44(0) 1793-43 1155 Europe (U.K.) 44(0) 1793-42 1333 Germany 44(0) 1793-42 1777 France 81(0) 120- 47- 88- 32 Japan (f ax only ) The fol lowin[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 1-4 1.4 ELECTRONIC SUPPORT SYSTEM S Inte l’s Fa xBack* se rvice provi des up- to-da te tec hnical info rmatio n. Inte l also of fers a vari ety of info rmatio n on the Wo rld Wide W eb. These systems are avai labl e 24 hours a day, 7 days a week, provi ding t echnic al in format ion whene ver you [...]
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1-5 ABOUT THIS MANUAL 1 1.5 TECHNICAL SUPPORT Tabl e 1-1 . Cus tom er Suppo rt Te le phon e Numb er s Customer Suppo rt (US and Canada ) 800 -628-86 86 Australia Na tional Sy dney 008-25 7-307 61-2-97 5-3300 61-3-81 0-2141 Belgi um, Nethe rlands , an d Luxemb ourg 010-40 71-111 Canada Contac t l ocal distri buto r Fin land 358-0-5 44-644 Fra nce 33[...]
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2 Getting Start ed[...]
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2 2-1 CHAPTER 2 GETTING STA RTED This c hapter des cribes th e Intel 18 6 EC/EB Evaluat ion Board ki t, and provi des setup instruct ions. Figur e 2-1 shows the 80x 186 EB Evaluatio n Board layout , and Figur e 2-2 s hows the EC board lay out. Re fer to th ese fi gure s when you are foll owin g the in stru ction s in th is chap ter for setti ng up [...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 2-2 Figu re 2-2. Intel 18 6 EC Ev aluation Bo ard L ayout TP4 TP3 TP2 80X186EC EVAL 3V / 5V TP1 +5V GND U6 J2 JP2 A5288-01 JP1 GND GND CLKOUT DT-R# +5V DEN# +12V RESOUT GCS5# BHE# NMI WR# LOCK# RD# ALE LA19 READY LA18 HOLD LA17 HLDA LA16 GND GND AD15 LA15 AD14 LA14 AD13 LA13 AD12 LA12 AD11 LA11 AD10[...]
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2-3 GETTING ST ARTED 2 2.1 SYSTEM REQUIREMENTS • IBM* P C AT, XT or BIOS-c ompatib le comput er ho st syste m (int erfac es via COM1 or COM2 at 960 0 baud). • 5 V power sup ply (t he conn ector housin g and con tact pins a re inc luded i n the kit). 2.2 WHAT’S IN YOUR KI T Evaluat ion Boa rd Your k it in cludes a bo ard with e ither a 3. 3 vo[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 2-4 2.3 VIEWING THE BOARD SCHEMATICS The s chemati cs pr ovide d on t he di sket te ar e in the Adobe* Acrobat .pdf for mat. You can v iew and pri nt the sc hematic s using the Acrobat Read er. The Reade r is avai labl e at no char ge from the Intel World Wide Web sit e (http://www.int el.com/) or f[...]
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2-5 GETTING ST ARTED 2 4. Apply powe r to the h ost PC a nd the e valuati on boar d. When power is a pplied to the board, t he mess age “i 186 Ex 3V/5V EV” s hould appear ac ros s the L CD di spla y. This messa ge in dic a tes bo ard init iali zati on is com ple te. If the message does not appea r, pres s the reset butt on (S1). Connect one end[...]
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3 Hardware O verview[...]
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3-1 HARDWARE OVERVIEW 3 CHAPTER 3 HARDWAR E OVERV IEW The eval uation boar d comes with a 16 MHz 80L186 EB or EC processo r, 512 Kbytes of Fl ash (cont ai ni ng the iRI SM-186 moni t or an d a Flas h loa der uti l it y in t h e boot blo ck) , and 256 Kbytes of SRAM. The exp ansion c onnector (JP1) suppo rts up to 1 Mbyte of e xtern al memory and 64[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-2 3.2 MICROPROCESSOR The core of the eva luat ion boar d is the 80 x186 micropr ocesso r. This pr ocesso r opera tes at 3.3 volts up to 16 MHz i n thi s board. Al tern ative ly, th e boar d can be conf igure d to run at 5 volts up to 33 M Hz. To va ry the CPU c lock sp eed, an ap pro priate f requ[...]
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3-3 HARDWARE OVERVIEW 3 3.3 MEMORY CO NFIGURATION The memory on th e evalua tion board can be divi ded into three types : Flash , SRAM, and expans ion. Fla sh memory cont ains th e Flash lo ader uti lity, loc ated in the boot bl ock bounda ry, and t he RISM mon itor progr am, beginni ng at F800:0 000. Use rs ca n execu te t heir test code fr om boo[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-4 Figu re 3-1. Physical M emory M ap GCS7 — Expan sion I /O Start : 400H Stop : 500H • Zero Wai t States • Ignor e Stop Ad dress • A ctive f or I/O Bu s Cyc les • Bus Re ady Required GCS2 — LCD Display I/O Start : 400H Stop : 440H • 8 Wait St ates • A ctive f or I/O Bu s Cyc les ?[...]
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3-5 HARDWARE OVERVIEW 3 3.3.1 Flash ( Program Mem ory) Flash memory, as configur ed in t he RISM moni tor, i s mappe d to th e upper 512 Kbyt es of t he 1 Mbyte 80x186 pr ocessor ad dress spac e. The board include s a single 4 Mbit, 32 -pin PSOP Flash devic e at location U9 wit h 110 ns acc ess time at 3.3 V and 60 ns access time at 5 V. This memor[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-6 Fig ure 3-2. Ju mper Asse mbly f or Flash Do wnload ing 3. Reconnec t the seria l cabl e and p ower-up the boa rd. You shoul d notice t hat the t ext CQFLASH LOADER now dis plays on th e LED, sign aling that t he boa rd is rea dy for Flash d ownloading. When t he jumper assemb ly is in stall ed,[...]
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3-7 HARDWARE OVERVIEW 3 If t his text doe s not display o n the LED, ind icating a problem wi th the j umper asse mbly, the board boots as if no Flash l oader a sse mbly is i nsta lled; that i s, the Fl ash ta rget p rog ram imme diate ly star ts th e load ed user appli cati on progr am (for exam ple, t he iRIS M mon itor softwa re). You can find c[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-8 3.5 POWER SUPPLY The po wer sup ply conne cts t o J2 on the boar d sche matic. Pin 1 must c onnect to + 5 vol ts a nd pin 2 must c onnect t o grou nd. The sup ply is the n regul ated t o 3. 3 volts by the o n-boar d circ uitr y. The V CC fo r the board is contr olle d by ju mper E1. Whe n E1 is [...]
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3-9 HARDWARE OVERVIEW 3 The M axi m MAX7 34 loc at ed at U11 is al so a cur re nt- mode DC-DC conv er ter . T his de vice steps up the V CC volt age to +12.0 volts. This voltage ou tpu t is suppl ied to p rovide a V PP o ption f or Flash memory pr ogrammi ng. The S HDN# inpu t (pin 1) connec ts to a port pin (P 1.1) on t he processo r throug h an i[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-10 The t wo seri al conne ctors are connec ted t o the M axim MAX561, an EIA/ TIA-562 Drive r/Rece iver. Th is devi ce operat es fr om a 3.3 vol t V CC (or 5 v olts, opti onall y). The EIA/ TIA- 562 st andard is a low vol tage s erial commu nication s prot ocol. T his pr otocol opera tes a t ±3.7[...]
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3-1 1 HARDWARE OVERVIEW 3 Fig ure 3-5. 25 -Pin t o 9-Pi n Adap tor To Evaluation Board P1 To Host PC DCD DSR RXD RTS TXD CTS DTR RI GND A2343-02 1 6 2 7 3 8 4 9 5 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 Shield Ground TXD RXD RTS CTS DSR GND DTR DCD RI Note : Signal mnem[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-12 3.7 EXPANSION INTERFACE There are two expansi on conne ct ors on t he eva luati on boar d. Refer to the schemat ics i nclude d on a flop py diskett e in your ki t for repres entation of the conne ctor pinou ts. The 60- pin JP1 conn ector (Figu re 3-7 ) prov ides l atch ed addr ess pi ns and the[...]
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3-1 3 HARDWARE OVERVIEW 3 Figure 3- 7. 186 E B Per iphera l Expa nsion C onnector JP2 (24 p in) 1 3 5 7 9 11 13 15 17 19 21 23 2 - V CC 4 - T0IN 6 - T1IN 8 - V SS 10 - INT0 12 - INT1 14 - INT2 16 - INT3 18 - INT4 20 - V SS 22 - GCS6# 24 - GCS7# V CC ............ T1OUT....... T0OUT....... V SS ..... ........ P2.2........ .... P2.3........ .... BCLK0[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 3-14 Figure 3-8. CPU Bu s Expansion (EB and EC) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 2 - V CC 4 - D0 Bi direc tio nal 6 - D1 Bi direc tio nal 8 - D2 Bi direc tio nal 10 - D3 Bi direc ti onal 12 - D4 Bi direc ti onal 14 - D5 Bi direc ti onal 16 - D6 Bi [...]
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3-1 5 HARDWARE OVERVIEW 3 3.8 LCD INTERFACE The eval uati on board includ es a 16- charac ter by 1 -line LCD display. The displ ay has an 8-bit inte rface and is desi gned t o oper ate a t up to 20 M Hz . The d ispla y inc lud es a Hitach i* 447 80 LCD displ ay cont roll er th at takes care of funct io ns such as char ac ter i nterp retat ion and d[...]
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4 Introduction to the Software[...]
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4-1 4 CHAPTER 4 INTRODUCTION TO THE SOF TW ARE The In tel 1 86 EC/EB Eva luati on Boar d uses an Embedd ed Contr olle r Monit or (ECM ) writte n for the 8 0x186 f amily of 16- bit mi cropro cessor s. Thi s monitor suppor ts ba sic de bug fa cili ties (LOAD, GO, STEP, etc.) i n the use r’s target s ystem. The ECM is br oken into two indep endent p[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 4-2 4.2 RESTRICTIONS Two words of the use r stack ar e reser ved for use by the iRISM-186 software. Ot her memory and/o r regi ster s in the t arget memory are used by the iRI SM-186 softw are . The e xact a mount and locat ion of t his memor y is imp lementa tion-de pendent . An async hronou s seri[...]
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4-3 INTRODUCTION TO THE SOF TWARE 4 4.4 USER INTERFACE The use r int erfa ce to the iE CM-86 suppo rts c ommands t o init iate and co nfigur e the ECM-86, perf orm I/O o perat ions i nvolvi ng DOS fi les, e xecut e user progra ms, and i nter rogate vari ables in the ta rget syst em. Interrog ation can be do ne in a number of for mats and in most ca[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 4-4 4.5.2 -COM2, -COM1 These op tions tel l the iECM-86 software whi ch seria l communic ation port is to be use d. If neith er opti on is enter ed, COM1 is us ed as a de fault . If iECM-8 6 detec ts valid CTS (Clear to Send) and DSR (D ata Se t Ready ) sign als fr om th e appr opria te COM port, i [...]
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4-5 INTRODUCTION TO THE SOF TWARE 4 4.5.4 -POLL, -SI GNAL These two opt ions cont rol how the host software detects whether or not the user’s code is running. If pol l mode is se lecte d, th e host per iodic ally polls th e ta rget wit h a REPORT_ST ATUS comman d. This tak es no ad diti onal ha rdware, but it forc es the ta rget to spend inst ruc[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 4-6 4.6 RELATED INFORMATION All un reserved funct ions of the proce ssor a re avail able to you, exc ept the N on-M askable Interr upt (NMI ), the Breakpo int i nstr uctio n (INT 3) , the Trap Fl ag (TF) , 16 K bytes of addre ss spa ce, and 128 byt es of I/O spa ce. 4.6.1 Reserved Functions The Tra [...]
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5 iECM-86 Co mmands[...]
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5-1 5 CHAPTER 5 iECM-86 C OMMANDS This c hapter defines the i ECM-86 sof tware c ommands. 5.1 ENTERING CO MMANDS The syn tax fo r iECM command s is s hown belo w: COMMAND meta symb ol iECM-86 c ommand def initi ons use on e or more of th e foll owing metas ymbols: addr addres s iECM- 86 is able to interpr et the mic roproc essor ’s add ress spa c[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-2 bp_number Sixte en breakpo ints are avail able to the user. This numb er selects which b reakpoint to ac cess. code_a ddr The code add ress m ay be specifi ed by eithe r segment : offs et , CS:offse t , or CB:offset . count Thi s denot es th e number of ti mes a com mand exe cutes . file na me T[...]
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5-3 iECM-86 COMMANDS 5 5.2.2 Other Fi le Oper ations In ad ditio n to o bje ct fi les, the i ECM-86 makes us e of i nclude fil es, log f iles, and l ist f iles . Incl ude fil es conta in comm ands to be exec uted by i ECM-86. They must con tain t he exact sequenc e of ASCII char acte rs t hat yo u wo uld en ter from t he key boar d to execut e th e[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-4 parsi ng command s unti l a spa ce cha racte r is e ntere d from the keyboa rd (t he spac e chara cter can ’t come from an INCLUDE file). This all ows the user t o pause in the middle of an INCLUDE file opera tion t o see wh at is occurr ing an d then a cknowle dge the pause condi tion b y pre[...]
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5-5 iECM-86 COMMANDS 5 5.3 PROGRAM CONTROL Commands t hat co ntrol pr ogram exe cut io n all o w you to res et th e proc essor, set ex ecu ti on b reak- point s, start execut ion, s top execut ion, st ep, and super s tep. The comman ds are grouped by thei r major fun ctions for t he sak e of di scuss ion. 5.3.1 Resetti ng the Target The pro cessor [...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-6 NOTE Most m onito r prog rams si milar to iECM-8 6 displ ay a mes sage on the co nsole when a break o ccurs (e.g., “P rogram b reak at 12 34H”). Thi s is not done in iECM-86 bec ause t he syst em supp orts c oncurr ent i nterr ogati on of t he ta rget on which the us er's cod e is runni[...]
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5-7 iECM-86 COMMANDS 5 5.3.3 Program Executio n These c ommands star t and s top ex ecution of user code. The comman ds prov ided ar e: GO GO FOREVER GO FROM cod e_addr GO FROM cod e_addr FORE VER GO FROM cod e_addr TIL L code_ add r GO FROM cod e_addr TIL L code_ add r OR code_a ddr GO TILL code _addr GO TILL code _addr OR code_ add r HALT If a GO[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-8 GO FROM code_addr FOREVER Th is com ma n d lo ads the user ’ s PC wi th code_addr , clea rs the break point array , and st arts execut ion of the us er’ s code. GO FROM code_addr TILL code_ addr Th is com ma n d lo ads the user ’ s PC wi th th e code_add r t hat fo llows the FROM keyword ,[...]
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5-9 iECM-86 COMMANDS 5 Super- stepp ing is simi lar t o stepp ing, exc ept tha t the s uper-s tep com mand tr eats a n inter rupt servi ce r outine or a subr outine call (and the body of the sub routi ne th at is call ed) as one indi visib le instr ucti on. This allows the us er to i gnore the det ails of subrou tines and in terr upt servi ce rout [...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-10 {STEP | SSTEP} FROM code_addr count This c ommand loads t he use r’ s progra m coun ter ( PC) with code_a ddr and t hen si ngle- steps count times. 5.4 DISPLAYING AND MODIFYING PROGRAM VARIABLES iECM-86 pr ovides commands t o displ ay and modi fy pro gram var iable s in sev eral f ormats . In[...]
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5-1 1 iECM-86 COMMANDS 5 5.4.2 BYTE Commands There are fo ur for ms for t he BY TE commands: BYTE byte_a ddre ss BYTE byte_a ddre ss = byt e_v al ue BYTE byte_a ddre ss TO byte_a ddres s BYTE byte_a ddre ss TO byte_a ddres s = byt e_v al ue All of these co mmands can be us ed whet her or not th e user’ s program i s running. BYTE byte_ address Th[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-12 BYTE byte_ address TO byt e_addr ess = b yte_value This f orm is use d to in itia lize a regi on of memory t o the g iven byte_ value. Note that this command takes a lit tle o ver a mi llis econd (at 9 600 baud ) for each BYTE l oaded. You ca n terminat e thi s comman d by enterin g a carriage [...]
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5-1 3 iECM-86 COMMANDS 5 comman d term inat es wh en all o f the WO RD variab les in the selec ted range have bee n displ ayed. Duri ng len gthy di splays, you c an stop the output to the c onsole by pres sing the space b ar. You c an res ume the displ ay by pr essi ng the space b ar a se con d time. Y ou te rminat e the comman d by ent ering a car[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-14 DW OR D va ri ab le s . Whe n this co mm an d is in vok ed, iEC M- 8 6 st a rts by dis playi ng the curren t defa ult b ase and the n a ser ies o f lin es show ing th e cont ents of the s elect ed mem ory reg ion. The nex t lin e star ts w i th a h exadec imal di sp lay of t he add ress of the [...]
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5-1 5 iECM-86 COMMANDS 5 resume the di splay by pres sing t he spa ce bar a secon d time. You term inate t he command by ente ring a carr iage r eturn . 5.4.6 STRING Commands There is only on e form of the STRING comman d: STRING byte _addres s The l ine st ar ts with a h exa deci mal di sp lay of by te _add res s follow ed by th e NU L-te r min at[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-16 defau lt bas e and t hen a s eries of lines showin g th e content s of t he sele cted po rts. Th e ne xt line s tart s with a hexad ecimal displ ay of t he addre ss of t he next PORT variab le to be disp layed, fol lowed by t he displ ay of u p to 16 PORT var iabl es in the defaul t bas e. A ne[...]
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5-1 7 iECM-86 COMMANDS 5 WP ORT wpo rt_add ress = word_val ue This f orm is used to set a n indi vidual WPORT var iable withou t fir st checki ng it s curr ent va lue. When inv oked , this comman d sets th e WPORT variable at wpor t_ address to word_value. WP ORT wpo rt_add ress TO wpo rt_add ress This f or m is used to dis play a seri es of W POR [...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 5-18 CS DS SP BP DI ES FLAGS IP PC {= <cod e_addre ss> } REGS SI SP = <w ord_addr ess> SS The pro cessor varia bles c an be modi fied on ly while t he tar get is stoppe d. They ca n be rea d at any time. The se com mands all ow the dis play an d loadi ng of the i ntern al target proces s[...]
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6 iRISM-186 Commands[...]
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6-1 6 CHAPTER 6 iRISM-186 C OMMANDS This ch apt er des cri be s the el emen ts of i RISM-1 86 moni t or c ode. This infor mation i s c ommon to all impl em ent at io ns. 6.1 iRISM VARIABLES The fol lowin g tabl e lis ts the RIS M vari ables and pr ovides a desc ripti on of e ach. 6.1.1 Other Va ria bles Speci fic imp lement ation s of RISMs will r [...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 6-2 6.2 RISM STRUC TURE The RISM re sides in the targ et syst em and prov ides the interf ace bet ween th e target system and the us er inter face, which resi des in the h ost system . The RISM is com pact and si mple. This s erves two pur poses: 1. The RISM can re side in a user’ s syst em with m[...]
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6-3 iRISM-186 COMMANDS 6 6.5.1 SET_DATA_FLAG (Code 00H) This command sets the DATA_FLAG. This forces the next charact er receiv ed by the RISM to be tr ea ted as dat a, ev en i f it s va lue corr es pond s to a RISM command. The code that ove r- ride s the no rmal sele ction of comm and or da ta al so clea rs th e DATA _FLAG so tha t it appli es on[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 6-4 6.5.8 WRITE_DOUBLE (Code 09H) This command stores the RISM_DATA reg iste r in the double- word of memory poi nted to by the RISM_ ADDR reg ister an d incr ements th e RISM_ADDR regis ter (by f our) to poi nt at t he next memory double -word. 6.5.9 LOAD_ADD RESS (Code 0AH) Th is co mm and loa ds [...]
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6.5.14 TRAP_ISR This i s a pseu do- command . It ca nnot be i ss u ed dir ec tl y by t he host so ftware , but is execut ed when an INT3 is exe cuted. The INT3 ins truct ion is used by iECM-86 for imp lement ing soft ware br eakpoi nts and for s ingle- step ping. A se parat e entry po int i nto th e STOP_US ER comman d is provi ded for the INT3 vec[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL 6-6 6.5.20 WRITE_WPORT (Code 19H) This co mmand st ores th e least -sig nific ant w ord of th e RISM_DATA regis ter in the 16-bi t output port poi nted t o by th e RISM_ADDR regi ster . 6.5.21 STEP (Code 1AH) This co mmand sets the tar get pr ocesso r’ s TRAP_FLAG and the RUN_FL AG and steps one i[...]
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6-7 iRISM-186 COMMANDS 6 6.5.24 Sta rt Up Co mmands (/ or ) Upon res et, the board is in the echo mod e. Unti l it rece ives an ASCII sl ash (/ ) or reve rse- slas h (), i t incr ements ev ery charac ter it recei ves fro m the ho st and se nds the i ncrement ed value back to the host . It als o displa ys the bi nary code of the char ac ter re cei[...]
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A Parts List[...]
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A-1 A APPEN DIX A PARTS LIST Table A-1 prov ides t he boar d loca tion, man ufact urer, a nd desc ript ion of each par t on the 8 0186 EB Eval uation Bo ard. Ta ble A-2 provides the s ame infor mation f or th e 186 EC Ev aluation Board. Tab le A-1. 801 86 EB Boa rd Manu al Par ts List (Sheet 1 of 3) LOCATION MANUFACTURER PART NUMBER DESCRIPTION FOO[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL A-2 J1 AMP #5442 82- 3 14 PI N SIP SKT SI P14 14 pin SIP sock et terminal strip JP1 AMP # 4-8722 7-0 2 X 30 HEAD E R HDR2X30 Cu t t o size (3-10318 6-0) JP2 AMP # 1-1031 86-2 2 X 12 HEAD E R HDR2X12 L3 C oilcraf t #D033 16P-103 10 µH INDUCTOR SMT induct or, 10µH L2 Coilc raft # D03316P -104 100µ [...]
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A-3 PARTS L IST A XU9 Meritec # 980021- 44-01 SMT 44 pi n s ocket S OP4 4 SMT 44 pin s oc k et ,w / o ali g nm e nt pins U9 INTEL #PA28F40 0BV- T60 4Mb,bo ot b lk,flas h Socket ed U6,U12, U14 Motorol a # MC74AC573D W 74AC57 3 SO20 W SMT Oc tal latc h U7 Maxi m # MAX7 50CSA Step- down reg ul ator SO8 Pendi ng S MT availability XU10 AMP # 822039 -3 2[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL A-4 Table A- 2. 80186 EC Bo ard Manu al Par ts List (Sheet 1 o f 3) LOCATION MANUFACTURER PART NUMBER DESCRIPTION FOOTPRINT COMMENTS C31 Kemet # C0805C 102K5RA C CAP, .001µF CC0805 SMT Chip Cap C21,C30 Kemet # C0805C 103K5RA C CAP, .01µF CC0805 SMT Chip Cap C8,C 32 Kemet # T491C1 06K010 AS CAP, 10[...]
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A-5 PARTS L IST A L1 3216CH I P Not in s tall ed, but place f oot print P1,P 2 AMP # 748875 -3 DB9 RECEPTACLE DB9FM1 9 pin, sub-D, R/ A, fem ale Q1 Motorol a # MMBT2907AL T1 PNP T R ANSIST O R SOT23 SMT PNP trans istor, 2907A R1 Dale # CRCW 1206 RE S, 100k Ω CR1 206 SMT resistor, 100k R4,R5,R6, Dale # CRCW1206 RES, 10k Ω CR1206 SMT resistor, 10[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL A-6 XU10 AMP # 822039 -3 28 Pin PLC C so cke t SOCKET28 SMT 28 pi n PL CC so cke t U10 Latt ice # GAL22LV 10C- 15LJ Low v oltage GAL Socketed U1 Motorol a # MC74AC14D 74AC14 SO14 SMT Hex Schmitt Trg. inverter U2 Maxim # MAX5 61CWI 562 Ser. x ceiver SO28W SMT 3.3 V 562 Int e rf ac e de vi c e XU3, XU[...]
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Index-1 INDEX 80C186EB/EC features, 3-2 80C188EB/EC, configuring board jumpers, 3-2 8-bit bus, configuring the board f or, 3-2 A adaptor 25-pin to 9-pin, 3- 11 for in- circuit e mulation, 3-2 B BCLK0 inp ut, 3-10 breakpoints, 5-5 bus expansion, 3- 14 C connectors P1, 3- 9 P2, 3-10 customer servi ce, 1-4 D data types, su pported by iECM-86, 5-10 dis[...]
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INTEL 186 EB/EC EVALUAT ION BOARD USER’S MANUAL Index-2 L LCD interf ace, 3-15 list file s, 5-3 log files, 5-3 M Maxim MAX561, 3-10 Maxim MAX750, 3-8 memory configuration, 3-3 memory ma p, 3-3 memory, reser ve d, 4-6 N non-maskable interrupt, 4- 6 notational conventions, 1- 2 P P1 connector, 3-9 P2 connector, 3-10 peripheral expansion connector, [...]