English dropdown-ico

Intel SDS2 manual

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145

Go to page of

Similar user manuals

A good user manual

The rules should oblige the seller to give the purchaser an operating instrucion of Intel SDS2, along with an item. The lack of an instruction or false information given to customer shall constitute grounds to apply for a complaint because of nonconformity of goods with the contract. In accordance with the law, a customer can receive an instruction in non-paper form; lately graphic and electronic forms of the manuals, as well as instructional videos have been majorly used. A necessary precondition for this is the unmistakable, legible character of an instruction.

What is an instruction?

The term originates from the Latin word „instructio”, which means organizing. Therefore, in an instruction of Intel SDS2 one could find a process description. An instruction's purpose is to teach, to ease the start-up and an item's use or performance of certain activities. An instruction is a compilation of information about an item/a service, it is a clue.

Unfortunately, only a few customers devote their time to read an instruction of Intel SDS2. A good user manual introduces us to a number of additional functionalities of the purchased item, and also helps us to avoid the formation of most of the defects.

What should a perfect user manual contain?

First and foremost, an user manual of Intel SDS2 should contain:
- informations concerning technical data of Intel SDS2
- name of the manufacturer and a year of construction of the Intel SDS2 item
- rules of operation, control and maintenance of the Intel SDS2 item
- safety signs and mark certificates which confirm compatibility with appropriate standards

Why don't we read the manuals?

Usually it results from the lack of time and certainty about functionalities of purchased items. Unfortunately, networking and start-up of Intel SDS2 alone are not enough. An instruction contains a number of clues concerning respective functionalities, safety rules, maintenance methods (what means should be used), eventual defects of Intel SDS2, and methods of problem resolution. Eventually, when one still can't find the answer to his problems, he will be directed to the Intel service. Lately animated manuals and instructional videos are quite popular among customers. These kinds of user manuals are effective; they assure that a customer will familiarize himself with the whole material, and won't skip complicated, technical information of Intel SDS2.

Why one should read the manuals?

It is mostly in the manuals where we will find the details concerning construction and possibility of the Intel SDS2 item, and its use of respective accessory, as well as information concerning all the functions and facilities.

After a successful purchase of an item one should find a moment and get to know with every part of an instruction. Currently the manuals are carefully prearranged and translated, so they could be fully understood by its users. The manuals will serve as an informational aid.

Table of contents for the manual

  • Page 1

    Intel® Server Board SDS2 Technical Product Specification Order Number: A85874 - 002 Revision 1.2 December 2, 2002 Enterprise Platforms and Services Marketing[...]

  • Page 2

    Revision History Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 ii Revision History Date Revision Number Modifications 9/20/2001 1.0 Initial release. 5/ 15/2002 1.1 Added Section 13: Errata. Corrected miscellaneous document errors. Added Table 6.2.5.4: Baseboard Management Controller (BMC) Beep Code Generation. 12/2/02 1.2 Added [...]

  • Page 3

    Intel® Server Board SDS2 Disclaimers Revision 1.2 Order Number: A85874 - 002 iii Disclaimers Information in this document is provided in connection with Intel ® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Condition[...]

  • Page 4

    Table of Co ntents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 iv Table of Contents 1. Introduction ............................................................................................................................. 1 2. Architecture ....................................................................................[...]

  • Page 5

    Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 v 4.6.2 BIOS Flash .................................................................................................................. 20 4.7 Interrupt Routing ...........................................................................................................[...]

  • Page 6

    Table of Contents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 vi 6.3.4 Clearing CMOS ........................................................................................................... 67 6.4 Flash Update Utility ...........................................................................................................[...]

  • Page 7

    Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 vii 8.9 Connector Manufacturers and Part Numbers .................................................................. 87 9. Jumpers .................................................................................................................................. 88 9.[...]

  • Page 8

    Table of Contents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 viii 5. Intel® & ICP Vortex* RAID Controllers will cause the Intel® Server Board SDS2 t o halt during POST when the BIOS Logo screen is enabled ............................................................. 109 6. Intel® Server Board SDS2 CD - ROM issues .....[...]

  • Page 9

    Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 ix 34. Peer - to - peer PCI transactions are not supported between the CIOB - controlled 64 - bit PCI bus and the legacy 32 - bit PCI bus controlled by the HE - SL north bridge ......................... 125 35. SDS2 PCI slot current levels supported by the 5V rail .[...]

  • Page 10

    List of Figures Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 x List of Figures Figure 1. SDS2 Server Board Block Diagram ................................................................................. 1 Figure 2. SDS2 Memory Bank Layout ..........................................................................................[...]

  • Page 11

    Intel® Server Board SDS2 List of Tables Revision 1.2 Order Number: A85874 - 002 xi List of Tables Table 1. SDS2 Intel® Pentium® III Processor Support Matrix ......................................................... 4 Table 2. Memory DIMM Pairs .......................................................................................................[...]

  • Page 12

    List of Tables Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 xii Table 32. Main Menu Selections .................................................................................................... 55 Table 33. Primary Master and Slave IDE Submenu Selections .................................................... 56 Table 34. Proces[...]

  • Page 13

    Intel® Server Board SDS2 List of Tables Revision 1.2 Order Number: A85874 - 002 xiii Tabl e 66. IDE 40 - pin Connector Pin - out ........................................................................................ 82 Table 67. Stacked Three - port USB Connector Pin - out ................................................................. 82 Tabl[...]

  • Page 14

    List of Tables Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 xi v < This page intentionally left blank. >[...]

  • Page 15

    Intel® Server Board SDS2 Introduction Revision 1.2 Order Number: A85874 - 002 1 1. Introduction This chapter provides an archite ctural overview of the Intel® SDS2 Server Board. It provides a view of the functional blocks and their electrical relationships. The figure below shows the functional blocks of the Server Board and the plug - in modules[...]

  • Page 16

    Architecture Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 2 2. Architecture The SDS2 Server Board is a monolithic printed circuit board that can accept two Intel ® Pentium ® III processors using the Socket 370 FCPGA2 package. The SDS2 Server Board complies with the Entry SSI version 1.0 and ATX version 2.03 (12 inch x 13 inch[...]

  • Page 17

    Intel® Server Board SDS2 Arch itecture Revision 1.2 Order Number: A85874 - 002 3 • 64 - bit, 66 - MHz 3.3 V full - length PCI segment C (P6 4 - C ) with one embedded device - Dual Channel Wide Ultra160 SCSI controller : Adaptec* AIC - 7899W - Two 64 - bit 3.3 V Slots: PCI slots 5 and 6 • LPC (Low Pin Count) bus segment with two embedde d devic[...]

  • Page 18

    Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 4 3. Processor and Chipset The Server Works* ServerSet III HE - SL chipset provides the 36 - bit address , 72 - bit data (64 - bit data + 8 - bit ECC) process or host bus interface , operating at 133 MHz in the AGTL signaling environment . The HE - SL North Brid[...]

  • Page 19

    Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 5 Pentium III – Tray SL5XL Intel Pentium III – Boxed FCPGA2 843849 1.4GHZ/133MHz 512KB tA 1 06B1h SL5XL Yes Notes: • All processor sockets must be populated with either a processor or a terminator module . The BMC will not allow DC power to be applied to t[...]

  • Page 20

    Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 6 3.1.1 Processor Voltage Regulator Module (VRM) The SDS2 Server Board has dual, on board, RM circuitry to support the two processors. The circuit is c ompliant with the VRM8.5 specification and provides a maximum of 60A, which will support the currently availab[...]

  • Page 21

    Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 7 Table 2 . Memory DIMM Pairs Memory DIMM DIMM PAIR Row DIMM1 A , DIMM 1 B 1 1, 2 DIMM2 A , DIMM2B 2 3, 4 DIMM3A, DIMM3B 3 5 , 6 DIMM Pair 1 DIMM Pair 2 DIMM Pair 3 Figure 2 . SDS2 Memory Bank Layout[...]

  • Page 22

    Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 8 3.2.2 I 2 C Bus An I 2 C* bus is between the BMC and the six DIMM slots. This bus is used by the system BIOS to retrieve DIMM information needed to program the HE - SL memory registers which are required to boot the system. The foll owing table provides the I [...]

  • Page 23

    Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 9 3.3.1 CNB20HE - SL Champion North Bridge The Champion North Bridge Rev 2.0 High End Super Lite (CNB20HE - SL ) is the third generation product in the Server Works Champion North Bridge Technology. The HE - SL is a 644 - pin ball - grid array (BGA) device and u[...]

  • Page 24

    Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 10 3.3.2 CIOB20 Champion I/O Bridge The Champion I/O Bridge (CIOB) i s a 352 - pin ball - grid array device and provides an integrated I/O bridge that provides a high - performance data flow path between the IMBus and the 64 - bit I/O subsystem. This subsystem s[...]

  • Page 25

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85 874 - 002 11 4. I/O Subsystem 4.1 PCI Subsystem The primary I/O bus for SDS2 DP Server Board is PCI, with three PCI bus segments . The PCI buses comply with the PCI Local Bus Specification, Rev 2.2. The P32 - A bus segment is directed through the HE - SL North Bridge while the t[...]

  • Page 26

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 12 Table 5 . P32 - A Configuration IDs IDSEL Value Device 18 ATI RAGE XL Video Controller 19 Intel  82550 Fast Et hernet Controller 1 20 Intel 82550 Fast Ethernet Controller 2 24 PCI Slot 3 25 PCI Slot 4 31 CSB5 South Bridge 4.1.1.2 P32 - A Arbitration P32 - A suppor[...]

  • Page 27

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 13 Table 4 . P64 - B Configuration IDs IDSEL Value Device 24 PCI Slot 1 25 PCI Slot 2 Table 5 . P64 - C Configuration IDs IDSEL Value Device 20 Adaptec AIC - 7899W S CSI Controller 24 PCI Slot 5 25 PCI Slot 6 4.1.2.2 P64 - B Arbitration P 64 - B supports three PCI maste[...]

  • Page 28

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 14 4.1.2.4 Zero Channel RAID (ZCR) Capable PCI Slot 6 The SDS2 Server Board supports zero - channel RAID controller on PCI Slot 6 . This add - in card leverages the on - board SCSI controller a long with its own built - in intelligence to provide a complete RAID control[...]

  • Page 29

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 15 Table 9 . Video Modes SDS2 2D Mode Video Support 2D Mode Refresh Rate (Hz) 8 bpp 16 bpp 24 bpp 32 bpp 640x480 60, 72, 75, 90, 100 Supported Supported Supported Supported 800x600 60, 70, 75, 90, 100 Supported Supported Supported Supported 1024x768 60, 72, 75, 90, 100 [...]

  • Page 30

    I /O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 16 4.4.1 NIC Connecto r and Status LEDs The 82550 drives LEDs on the network interface connector to indicate link/activity on the LAN and 10 - Mbps or 100 - Mbps operation. • The green LED indicates a network connection when lighted solidly and TX/RX activity when bl[...]

  • Page 31

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 17 • The scatter / gather mechanism supports both DMA and PIO IDE drives and ATAPI devices • Support for ATA and ATAPI, PIO Mode 0, 1, 2, 3, 4, DMA Mode 0, 1, 2, and Ultra DMA Mode 0, 1, 2, 3, 4, 5 • The IDE drive transfer rate is capable of up to ATA - 100 (100 M[...]

  • Page 32

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 18 Pad GPIO Name Description Y19 N_NVRAMCL R Input from jumper to be in BIOS Recovery mode in case of corruption V17 N_PASSDIS_00 Input from jumper to clear password assignments U16 N_CMOSCLR_00 Input from jumper to clear setup info in CMOS T20 N_F3SETUPEN_00 Input from[...]

  • Page 33

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 19 Pin # Signal Name Description 35 N_BMC_SWIN 36 N_BMCPWRN Power LED from BMC 37 N_EXTEN_00 External Event 38 N_SUPERSCI_00 System Control Interrupt used to detect wake - up events 45 N_SIO_CLK_RTC_BMC Real Time Clock output to BMC 49 N_P2_PME Power Management Event fr[...]

  • Page 34

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 20 4.6.2 BIOS Flash The SDS2 Server Board incorporates a Fairchild* 29LV008B 8Mbit Flash ROM. The flash de vice is connected through the X - bus of the CSB5 . 4.7 Interrupt Routing The SDS2 Server Board interrupt architecture implements both PC - compatible PIC mode and[...]

  • Page 35

    Intel® Se rver Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 21 ISA Interrupt Description INTR Processor interrupt NMI NMI to processor IRQ1 Keyboard interrupt IRQ3 Serial port 1 or 2 interrupt from SIO device IRQ4 Serial port 1 or 2 interrupt from SIO device IRQ5 IRQ6 Floppy Controller IRQ7 IRQ8_L Real Time Clock interrupt IRQ9[...]

  • Page 36

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 22 Figure 3 . SDS2 Interrupt Routing Diagram (CSB5 Internal) PCIIRQ16 PCIIRQ17 PCIIRQ18 PCIIRQ19 PCIIRQ20 PCIIRQ21 PCIIRQ22 PCIIRQ23 PCIIRQ24 PCIIRQ25 PCIIRQ26 PCIIRQ27 PCI IRQ28 PCIIRQ0 PCIIRQ1 PCIIRQ2 PCIIRQ3 PCIIRQ4 PCIIRQ5 PCIIRQ6 PCIIRQ7 PCIIRQ8 PCIIRQ9 PCIIRQ10 PC[...]

  • Page 37

    Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 23 Figure 4 . SDS2 Interrupt Routing Diagram PCIIRQ1 PIRQ_LATCH PCIIRQ3 PIRQ1 PCIIRQ2 PCIIRQ4 PCIIRQ5 PCIIRQ6 PCIIRQ7 PCIIRQ8 PCIIRQ9 PCIIRQ10 PCII RQ11 PCIIRQ12 PCIIRQ13 PCIIRQ14 PCIIRQ15 PCIIRQ0 Super I/O Timer Keyboard Serial Port2/ISA Serial Port1/ISA ISA Floppy/ISA[...]

  • Page 38

    I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 24 PCI IRQ 6 PCI IRQ 5 PCI IRQ 13 PCI IRQ 11 PCI IRQ 12 NIC 1 NIC 2 VIDEO INTA INTB INTC INTD SCSI PORT A PORT B Slot 2 Slot 1 Slot 4 Slot 3 Slot 6 Slot 5 PCI IRQ 7 PCI IRQ 8 PCI IRQ 9 PCI IRQ 10 PCI IRQ 2 PCI IRQ 3 PCI IRQ 4 PCI IRQ 0 PCI IRQ 1 ZCR Present Figure 5 . S[...]

  • Page 39

    Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 25 5. Server Management The SDS2 server management features are implemented using the Sahalee Server Board Management Controller chip. The Sahalee BMC is an ASIC packaged in a 156 - pin BGA that contains a 32 - bit RISC processor core and associated peripherals. The[...]

  • Page 40

    Serve r Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 26 BASEBOARD PROCESSOR SOCKETS SMS I/F System Bus 5V 12V 3.3V -12V Power Button Front Panel NMI Switch IERR (2) Thermal Trip (2) - Chassis ID - Baseboard ID - Power State NMI Chip set NMIs Chip set SMI CPU Voltage (1) INTELLIGENT PLATFORM MANAGEMENT BUS (IPMB) Rese[...]

  • Page 41

    Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 27 5.1 Sahalee Baseboard Management Controller The Sahalee BMC contains a 32 - bit RISC processor core and associated peripherals used to monitor the system for critical events. The Sahalee BMC, packaged in a 156 - pin BGA, monitors all power supplies, including tho[...]

  • Page 42

    Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 28 Pin Signal Name Description 13 N_SM2_CLK Serial Bus Clock 14 N_SM2_DATA Serial Bus Data 18 N_ADM_FAN_PWM Pulse - width modulated output for control of fan speed 19 N_RST_BMCRST_L Power - on Reset with minimum of 200ms pulse width 29 3VSB Monitors 3V Standby suppl[...]

  • Page 43

    Intel® Server Board SDS2 Server Manage ment Revision 1.2 Order Number: A85874 - 002 29 Pin Signal Name Description C14 N_FAN6_SENSE_P Rear System Fan 2 Speed L12 N_MEM_ALERT_L Memory ECC Error Detect M12 N_BMC_SECUREMODE Secure Mode Detect Note: For a complete listing of BMC sensors, please refer to SDS2 Baseboard Management Controller External Pr[...]

  • Page 44

    Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 30 5.2 System Reset Con trol Reset circuitry on the SDS2 Server Board looks at resets from the front panel, CSB5 , ITP, and processor subsystem to determine proper reset sequencing for all types of reset. The reset logic is designed to accommodate a variety of ways [...]

  • Page 45

    Intel® Server Board SDS2 Server Management Revision 1 .2 Order Number: A85874 - 002 31 Table 17 . IPMB Bus Devices Function Voltage Address Notes SCSI HSBP - A 5VSB 0xC0 SCSI HSBP - B 5VSB 0xC2 OEM Connector 5VSB N/A In addition to the “public” IPMB, the Sahalee BMC also has five private I 2 C busses. Four of these are used on the Server Board[...]

  • Page 46

    Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 32 Function Voltage Address Notes CSB5 3.3 V 0xC2 South Bridge DIMM 1 3.3 V 0xA0 DIMM 2 3.3 V 0xA2 DIMM 3 3.3 V 0xA4 DIMM 4 3.3 V 0xA6 DIMM 5 3.3 V 0xA8 DIMM 6 3.3 V 0xAA PCK2001M 3.3 V 0xD2 Clock Buffers Table 21 . Private I 2 C Bus 4 Devices Function Voltage Addre[...]

  • Page 47

    Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 33 uncorrectable errors. In addition, the HE - SL can ge nerate BERR# on unrecoverable ECC errors detected on the processor bus. Unrecoverable errors are routed to NMI by BIOS. 5.4.4 Memory Bus Errors The HE - SL is programmed to generate an SMI on single - bit data[...]

  • Page 48

    Serve r Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 34 Setup Utility (F2) can change th e AC link mode settings.[...]

  • Page 49

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 35 6. BIOS This section describes the BIOS - embedded software for the SDS2 server board. The BIOS contains standard PC - compatible basic input/output (I/O) services, system - specific hardware confi guration routines and register default settings that are embedded in Flash rea[...]

  • Page 50

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 36 • OEM customization • PCI and Plug and Play (PnP) BIOS interface • Console redirection • Resource allocation support 6.2 BIOS Error Handling This section defines how errors are handled by the system BIOS on the SDS2 server board . Also discusse d are the role of BIOS [...]

  • Page 51

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 37 The BIOS logs the following SEL entries. Table 22 . BIOS Generated SEL Errors Sensor Type Sensor Number Sensor Type Code Sensor - Sp ecific Offset Event 02h FRB1/BIST Failure Processor 5Fh 60h 07h 03h FRB2/Hang in POST Failure Memory 08h 0Ch 01h Un correctable ECC POST Memory[...]

  • Page 52

    BIOS Intel® Server Board SDS2 Revis ion 1.2 Order Number: A85874 - 002 38 Table 23 : Event Request Message Event Data Field Contents Event Trigger Class Event Data Discrete 7:6 00 = Unspecified byte 2 01 = Previous state and/or severity in byte 2 10 = OEM code in byte 2 11 = Sensor specific event extension code in byte 2 5:4 00 = Unspecified byte [...]

  • Page 53

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 39 6.2.3.3 Memory Bus Error The BMC monitors and logs memory errors. The BIOS will configure the hardware to notify the BMC on correctable and uncorrectable memory errors. Uncorrectable errors generate an SMI to stop the system and prevent propagation of the error. The BMC will [...]

  • Page 54

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 40 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Power Unit Status 01h Power Unit - 09h Sensor Specific - 6Fh Power Off, Power Cycle, A/C Lost, Power Un it Redundancy 02h Power Unit - 09h Generic 0Bh Redundancy Regain Redundancy lost Watchdog 03h Wat[...]

  • Page 55

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 41 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers BB - 12V 10h Voltage – 02h Threshold - 01h - BB V BAT 11h Voltage – 02h Threshold - 01h - Proc VRM 1 12h Voltage – 02h Threshold - 01h - Proc VRM 2 13h Voltage – 02h Threshold - 01h - LVDS SCSI[...]

  • Page 56

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 42 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Fan Boost Front Panel Temp 3Ch OEM - C7h Threshold - 01h - Fan Boost PDB Temp 3Dh OEM - C7h Threshold - 01h - Fan Boost Proc 1 Core Temp 3Eh OEM - C7h Threshold - 01h - Fan Boost Proc 2 Core Temp 3Fh O[...]

  • Page 57

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 43 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Power Supply 2 5Bh Power Supply - 08h Sensor Specific - 6Fh Presence, Failure, Predictive Fail, A/C Lost Power Supply 3 5Ch Power Supply - 08h Sensor Specific - 6Fh Presence, Failure, Predictive Fail, [...]

  • Page 58

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 44 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers DIMM 6 6Dh Slot Connector - 21h Sensor Specific - 6Fh Fault Status Asserted, Device Installed, Disabled System ACPI Power State 78h System ACPI Power State – 22h Sensor Specific - 6Fh S0 / G0, S1, S4[...]

  • Page 59

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 45 6.2.5 Error Messages and Error Codes The system BIOS displays error messages on the video screen. Before video initialization, beep codes inform the user of errors. POST error codes are logged in the System Event Log. Th e BIOS displays POST error codes on the video monitor. [...]

  • Page 60

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 46 The following table contains the POST codes displayed during the boot process. A beep code is a series of individual beeps on the PC speaker, each of equal length. The following table describes the error conditions associated with each beep code and the corresponding POST che[...]

  • Page 61

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 47 CP Beeps Reason 1C Reset Programmable Interrupt Controller 20 1 - 3 - 1 - 1 Test DRAM refresh 22 1 - 3 - 1 - 3 Test 8742 Keyboard Controller 24 Set ES segment register to 4GB 28 1 - 3 - 3 - 1 Auto size DRAM, system BIOS sto ps execution here if the BIOS does not detect any us[...]

  • Page 62

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 48 CP Beeps Reason 59 Initialize the POST display service 5A Display prompt “P ress F2 to enter SETUP” 5B Disable L1 cache during POS T 5C Test RAM between 512 and 640k 60 Test extended memory 62 Test extended memory address lines 64 Jump to UserPatch1 66 Configure advanced [...]

  • Page 63

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 49 CP Beeps Reason 97 Fix up Multi Processor tabl e 98 1 - 2 Search for option ROMs. One long, two short beeps on checksum failure 99 Check for SMART Driv e 9A Shadow option ROMs 9C Set up Power Management 9D Initialize security engin e 9E Enable hardware interrupts A0 Set time [...]

  • Page 64

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 50 6.2.5.3 POST Error Codes and Messages The following table defines POST error codes and their associated messages. The BIOS prompts the user to press a key in case of serious errors. Some error messages are preceded by the string "Error” to indicate that th e system may[...]

  • Page 65

    Intel® Server Boar d SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 51 Code Error Message Failure Description 0614 COM A config. error - device disabled 0615 COM B configuration changed 0616 COM B config. error - device disabled 0617 Floppy configuration changed 0618 Floppy config. error - device disabled 0619 Parallel port configur ation chang[...]

  • Page 66

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 52 Code Reason for Beep 1 - 5 - 1 - 1 FRB failure (processor failure) 1 - 5 - 2 - 1 Empty Processor 1 - 5 - 2 - 2 No Processor 1 - 5 - 2 - 3 Processor configuration error (e.g., mismatched VIDs) 1 - 5 - 4 - 2 Power fault: DC power unexpectedly lost (power control failures) 1 - 5[...]

  • Page 67

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 53 Options Menu Each Option Menu occupies the left and center sections o f the screen. Each menu contains a set of features. Selecting certain features within a major Option Menu drops you into submenus. Item Specific Help Screen An item - specific help screen is located at the [...]

  • Page 68

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 54 Key Option Description F1 Help Pressing F1 on any menu invokes the g eneral Help window. This window describes the Setup key legend. The up arrow, down arrow, Page Up, Page Down, Home, and End keys scroll the text in this window. Enter Execute Command The Enter key is used to[...]

  • Page 69

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A858 74 - 002 55 6.3.2.3 Menu Selection Bar The Menu Selection Bar is located at the top of the screen. It displays the various major menu selections available to the user: • Main Menu . • Advanced Menu . • Security Menu. • Server Menu. • Boot Menu. • Exit Menu . These and associ[...]

  • Page 70

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 56 Feature Option Description Spanish Italian French German Table 33 . Primary Master and Slave IDE Submenu Selections Feature Option Description Type Auto None CDROM User ATAPI Removable IDE Removable Other ATAPI Select the byte of device that is attached to the IDE. Channel. I[...]

  • Page 71

    Intel® Server Board SDS2 BIOS Revision 1.2 Order N umber: A85874 - 002 57 Feature Option Description Transfe r Mode Standard FPIO 1 FPIO 2 FPIO 3 FPIO 4 FPIO 3 / DMA 1 FPIO 4 /DMA 2 Select the method for moving data to/from the drive. This field is informational only, for Type Auto. This field is updated to display only the modes supported by the [...]

  • Page 72

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 58 6.3.2.3.2 Advanced Menu Selections The followin g tables describe the menu options and associated submenus available on the Advanced Menu . Please note that MPS 1.4/1.1 selection is no longer configurable. The BIOS always builds MPS 1.4 tables. Table 35 . Advanced Menu Select[...]

  • Page 73

    Intel® Server Board SDS2 BIOS Revisio n 1.2 Order Number: A85874 - 002 59 Extended RAM Step Disabled 1 MB 1 KB Every - Location Selec ts the size of step to use during Extended RAM tests. Table 37 . PCI Configuration Menu Selections Feature Option Description Embedded SCSI Selects sub - menu Embedded NIC 1 Selects sub - menu Embedded NIC 2 Selects[...]

  • Page 74

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 60 Feature Option Description Option ROM Scan Enabled Disabled Enable option ROM scan of the selected device.[...]

  • Page 75

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 61 Table 41 . I/O Device/Peripheral Configuration Submenu Selections Feature Option Description Serial Port 1 Disabled Ena bled Auto If set to “Auto,” BIOS or OS configures the port. Base I/O Address 3F8h 2F8h 3E8h 2E8h Selects the base I/O address for COM port 1. Interrupt [...]

  • Page 76

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 62 Table 42 . Advanced Chipset Control ler Submenu Selections Feature Option Description PCI Device Selects sub - menu Wake On Ring Enabled Disabled Only controls legacy wake up. May not be present if not supported. Wake On LAN Enabled Disabled Only controls legacy wake up. May [...]

  • Page 77

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 63 Feature Option Description Set Administrative Password Press Enter When the Enter key is press ed, the user is prompted for a password; press ESC key to abort. Once set, can be disabled by setting to a null string, or clear password jumper on board. Password on boot Disabled [...]

  • Page 78

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 64 Feature Option Descriptio n Assert NMI on PERR Disabled Enabled If enabled, PCI bus parity error (PERR) is enabled and is routed to NMI. Assert NMI on SERR Enabled Disabled If enabled, PCI bus system error (SERR) is enabled and is routed to NMI. FRB - 2 Policy FRB2 Disabl e D[...]

  • Page 79

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 65 Table 47 . Console Redirection Submenu Selections Feature Option Description Serial Port Address Disabled On - b oard COM A On - b oard COM B When enabled, Console Redirection uses the I/O port specified. Choosing “Disabled” completely disables Console Redirection. Baud R[...]

  • Page 80

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 66 Table 49 . Hard Drive Selections Option Description Drive #1 (or actual drive string) Other bootable cards Additional entries for each drive that has a PnP header To select the boot drive, use the up and down arrows to highlight a device, then press the plus key (+) to move i[...]

  • Page 81

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 67 6.3.3 CMOS M emory Definition The CMOS map is available in the NVRAM .LST file generated for every BIOS release. The CMOS map is subject to change without notice. 6.3.4 Clearing CMOS The BIOS detects the state of the CMOS jumper. If the jumper is set to “CMOS Clear” prior[...]

  • Page 82

    BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 68 This file is loaded into the PHLASH program with the /b=<bin file>. The disk created by the BIOS.EXE program automatically run s “PHLASH /s /b=PLATCXLU.BIN command” in non - interactive mode. For a complete list of PHLASH options, run “PHLASH /h”. Once an update[...]

  • Page 83

    Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 69 5. Turn on system power. The system boots from the recovery diskette. The BIOS will beep twice when the update process starts. The system will continue to beep while updating the BIOS. If BIOS update completes successfully, the system will stop beeping. If the update fails, t[...]

  • Page 84

    Clock/Voltage Generation and Distribution Intel® Server Board SDS2 Revision 1.2 Order Number: A8587 4 - 002 70 7. Clock/Voltage Generation and Distribution 7.1 Clock All buses on the SDS2 Server Board operate using synchronous clocks . Clock synthesizer/driver circuitry on the Server Board generates clock frequenc ies and voltage levels as require[...]

  • Page 85

    Intel® Server Board SDS2 Clock/Voltage Gener ation and Distribution Revision 1.2 Order Number: A85874 - 002 71 HOST CLK APIC CLK 48 MHz 14 MHz PCI 33MHz CLK PCI 66MHz CLK CPU 1 CPU 2 HE-SL CSB5 PCI 33MHz CLK BUFFER SDRAM CLK PLL VGA SDRAM 1 SDRAM 2 SDRAM 3 SDRAM 4 SDRAM 5 SDRAM 6 SDRAM REGISTER 1 CIOB PCI 66MHz CLK BUFFER PCI SLOT 2 PCI SLOT 1 PCI[...]

  • Page 86

    Clock/Voltage Generation and Distribution Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 72 7.2 Voltage T he system power supply provides +3.3V, +5V, +12V, - 12V, and +5VSB and voltage regulators on the Server Board are used to create the following voltages: • +3.3VSB • VCORE for the CPUs • VTT for the CPUs • +2.5V for th[...]

  • Page 87

    Intel® Server Board SDS2 Clock/Voltage Generation and Distribution Revision 1.2 Order Number: A85874 - 002 73 Power Supply -12V +12V +5V +3.3V +5VSB 5VSB --> 3.3VSB 5V--> 2.5V 5V--> 1.8V SCSI Term Processor 1 Processor 2 HE-SL CIOB20 CSB5 NIC 1 NIC 2 Sahalee CORE VRM VTT VRM Super I/O VIDEO SCSI Fan KB/ MS USB PCI Slots DIMM Figure 9 . SD[...]

  • Page 88

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 74 8. Connections 8.1 Power Distribution Board Connector The main power supply connection is obtained using a 24 - pin connector. A separate 8 - pin connector is used for the +12 V power connector dedicated to providing power to the processor. A third 5 - pin auxiliary si[...]

  • Page 89

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 75 3 PS_ALERT (Not Used) 4 ReturnS 5 3.3RS 8.2 Memory Module Connector The SDS2 Server Board has six PC - 133 SD RAM DIMM connectors and supports registered SDRAM modules. For more information on DIMM modules refer to PC SDRAM Registered DIMM Design Support Document Rev 1[...]

  • Page 90

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 76 8.3 System Management Headers 8.3.1 ICMB Connector The Intelligent Chassis Management Bus (ICMB) allows inter - chassis communications between intelligen t chassis. This makes it possible to externally access chassis management functions, alert logs, port - mortem data[...]

  • Page 91

    Intel® Server Board SDS2 Conne ctions Revision 1.2 Order Number: A85874 - 002 77 Table 59 . HSBP - B Connector Pin - out Pin Signal Name Description 1 IPMB_SDA 5 VSB Data Line 2 GND GND 3 IPMB_SCL 5 VSB Clock Line 4 I2C_ADR_CNTRL Address Control 8.4 Front Panel Header A 34 - pin header is provided for cabling to the system front panel. The header [...]

  • Page 92

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 78 8.5 PCI Slot Connector The Server Board support two 32 - bit, 33 - MHz 5V PCI Slots and four 64 - bit, 66 - MHz 3.3 V PCI Slots. The tables below define their pin - outs. Table 61 . 32 - bit 5 V PCI Slot Pin - out Pin Side B Side A Pin Side B Side A 1 - 12 V TRST# 32 A[...]

  • Page 93

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 79 Pin Side B Side A Pin Side B Side A 1 - 12 V TRST# 49 M66EN AD[09] 2 TCK +12 V 50 Ground Ground 3 Ground TMS 51 Ground Ground 4 TDO TDI 52 AD[08] C/BE[0]# 5 +5 V +5 V 53 AD[07] +3.3 V 6 +5 V INTA# 54 +3.3 V AD[06] 7 INTB# INTC# 55 AD[05] AD[04] 8 INTD# +5 V 56 AD[03] G[...]

  • Page 94

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 80 Pin Side B Side A Pin Side B Side A 45 AD[14] +3.3 V 91 Ground AD[32] 46 Ground AD[13] 92 RSV RSV 47 AD[12] AD[11] 93 RSV Ground 48 AD[10] Ground 94 Ground RSV 8.6 I/O Connectors 8.6.1 VGA Connect or The video connector interface is a standard VGA compatible 15 - pin c[...]

  • Page 95

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 81 Connector Contact Number Signal Name Signal Name Connector Contact Number 3 +DB(14) - DB(14) 37 4 +DB(15) - DB(15) 38 5 +DB(P1) - DB(P1) 39 6 +DB(0) - DB(0) 40 7 +DB(1) - DB(1) 41 8 +DB(2) - DB(2) 42 9 +DB(3) - DB(3) 43 10 +DB(4) - DB(4) 44 11 +DB(5) - DB(5) 45 12 +DB([...]

  • Page 96

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 82 1 TXDP 7 RXDP 2 TXDM 8 RXDM 3 N/C 9 Activity LED Cathode 4 N/C 10 Link LED Anode 5 N/C 11 Speed LED Anode 6 N/C 12 3VSB 8.6.4 IDE Connector There is one IDE channel on the Se rver Board through the use of a 40 - pin connector. The connector pin - out is detailed in the[...]

  • Page 97

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 83 Pin Signal Name 1 Fused 5 V 2 USB_PORT1_D - 3 USB_PORT1_D+ 4 GND 5 Fused 5 V 6 USB_PORT2_D - 7 USB_PORT2_D+ 8 GND 9 Fused 5 V 10 USB_PORT3_D - 11 USB _PORT3_D+ 12 GND A 10 - pin header (2X5) located at CN18 on the Server Board provides an option to cable out the USB to[...]

  • Page 98

    Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 84 Table 69 . 34 - pin F loppy Connector Pin - out Pin Signal Name Pin Signal Name 1 GND 2 FD_DENSEL 3 GND 4 Test Point 5 KEY 6 FD_DRATE0 7 GND 8 FD_INDEX_L 9 GND 10 FD_MTRA_L 11 GND 12 FD_DRVSELB_L 13 GND 14 FD_DRVSELA_L 15 GND 16 FD_MTRB_L 17 GND 18 FD_DIR_L 19 GND 20 F[...]

  • Page 99

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 85 Pin Signal Name Description 1 DCD Data Carrier Detect 2 RXD Receive Data 3 TXD Transmit Data 4 DTR Data Terminal Ready 5 GND Ground 6 DSR Data Set Ready 7 RTS Request to Send 8 CTS Clear to Send 9 RI Ring Indicate 10 KEY Key 8.6.8 Parallel Port One DB25 parallel port c[...]

  • Page 100

    Connections Intel® Server Board SDS2 Revision 1.2 Or der Number: A85874 - 002 86 Keyboard Mouse Pin Signal Name Pin Signal Name 1 KBDATA 1 MSDATA 2 N/C 2 N/C 3 GND 3 GND 4 Fused 5V 4 Fused 5V 5 KBCLK 5 MSCLK 6 N/C 6 N/ C 8.7 Miscellaneous Headers 8.7.1 Fan Headers There are two fan connectors for processors and four system fan connectors . All six[...]

  • Page 101

    Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 87 Table 76 . External Drive Activity Header Pin - o ut Pin Signal name 1 N/C 2 DRIVE_ACTIVITY 3 DRIVE_ACTIVITY 4 N/C 8.8 Rear I/O Panel The following diagram shows the locations of keyboard, mouse, USB, serial, parallel, video, and NIC connector interfaces on the system [...]

  • Page 102

    Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 88 CN Numbers Qty Manufacturer Mfg. Part # Functional Description 25 1 FOXCONN MH11061 - PD2 25 - pin DSUB parallel port connector 22 1 FOXCONN DT10121 - P5T DB9 serial port connector 33 1 FOXCONN HL07051 - P5 10 - pin serial port header 19 1 FOXCONN UB1112C - M1 3 - pole USB[...]

  • Page 103

    Intel® Server Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 89 1 2 CLOSED = CMOS Clear DEFAULT FUNCTION OPEN OPEN OPEN OPEN OPEN CLOSED = Password Disable CLOSED = RSV CLOSED = RSV CLOSED = BIOS Recovery 5 6 7 8 9 10 2 1 3 4 11 12 CLOSED SPARE JUMPER CN42 CN45 CLOSED = RSV DEFAULT FUNCTION OPEN CN49 CLOSED = BMC Force Update DEFAULT F[...]

  • Page 104

    Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 90 5 6 7 8 9 10 2 1 3 4 11 12 CN42 CMOS Clear FUNCTION Password Disable RSV RSV BIOS Recovery CPU Frequency Select FUNCTION RSV 5 6 7 8 9 10 2 1 3 4 11 12 RSV CN59 CPU Frequency Select CPU Frequency Select CPU Frequency Select CN46 BIOS Write Protect FUNCTION CN47 BMC Write P[...]

  • Page 105

    Intel® Server Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 91 The following tables describe each jumper options. Table 78 . System Configuration Jumper Options Option Description CMOS Clear When CN42’s pins 1 and 2 are OPEN (default), CMOS contents are preserved through the system reset. When they are CLOSED, CMOS contents are set [...]

  • Page 106

    Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 92 Table 80 . List of Assembled Jumpers in Pr oduction Jumper Pins Default Operation 1 – 2 Open When closed, clears CMOS during POST 3 – 4 Open When closed, clears CMOS password 5 – 6 Open RESERVED (Do Not Use) 7 – 8 Open RESERVED (Do Not Use) 9 – 10 Open When close[...]

  • Page 107

    Intel® Se rver Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 93 2. Power off the system, unplug the power cord, and remove the chassis panel. 3. Add a jumper on CN42 pins 9 - 10 (BIOS Recovery). 4. Insert the BIOS Recovery floppy diskette into the disk drive. 5. Reinstall the chassis panel; plug in the power cord (s), and power on the[...]

  • Page 108

    Electrical and Thermal Specifications Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 94 10. Electrical and Thermal Specifications This section describes the electrical and thermal specifications required to integrate this board in a system. 10.1 Absolute Maximum Ratings Operation of the SDS2 Server Board at conditions beyond thos[...]

  • Page 109

    Intel® Server Board SDS2 Electrical and Thermal Specifications Revision 1.2 Order Number: A85874 - 002 95 Table 82 . SDS2 Server Board Power Consumption Device(s) +3.3 V +5 V +12 V - 12 V 5 V Stan dby Server Board 3.85 A 2.5 A 0.3 A 0.1 A 1.2 A Processors – – 6.3A – – Memory 8.3A – – – – PCI Slots 6.1A 2A 0.2A 0.1A – Fans – –[...]

  • Page 110

    Electrical and Thermal Specifications Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 96[...]

  • Page 111

    Intel® Server Board SDS2 Electrical and Thermal Specifications Revision 1.2 Order Number: A85874 - 002 97 Figure 13 . Output Voltage Timing Table 85 : Turn On/Off Timing Item Description Min Max Units T sb_on_delay Delay from AC being applied to 5VSB being within regulation. 2000 msec T ac_on_delay Delay from AC being applied to all output voltage[...]

  • Page 112

    Intel® Server Board SDS2 Mechanical Specifications Revision 1.2 Order Nu mber: A85874 - 002 101 11. Mechanical Specifications The following figure shows the Server Board mechanical drawing. Figure 15 . SDS2 Server Board M echanical Drawing[...]

  • Page 113

    Regulatory and Integration Information Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 102 12. Regulatory and Integration Information 12.1 Regulatory Compliance The SDS2 server board complies with the following safety standard requirements . Table 88 . Safety Regulations Regu lation Title UL 1950/CSA950 Bi - National Standard for[...]

  • Page 114

    Intel® Server Board SDS2 Regulatory and Integration Information Revision 1.2 Order Number: A85874 - 002 103 UL Recognition Mark (USA/Canada) CE Mark (Europe) C - Tick Mark (Australia) GOST Mark (Russia) BSMI Mark (Taiwan) 12.2 Installation Instructions CAUTION: Follow these guidelines to meet safety and regulatory requirements when installing this[...]

  • Page 115

    Regulatory and Integration Information Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 104 If the host chassis, power supply, and other modules have not passed applicable EMC certification testing before integration, EMC testing must be conducted on a representative sample of the newly completed computer. 12.2.2 Ensure Host Comput[...]

  • Page 116

    Intel® Server Board SDS2 Regulatory and Integration Information Revision 1.2 Order Number: A85874 - 002 105 12.2.5 Use Only for Intended Applications This product was evaluated for use in ITE computers that will be installed in offices, schools, computer rooms and similar locations. The suitability of this product for other product categories othe[...]

  • Page 117

    Errata Listing Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 106 13. Errata Listing 13.1 Summary Errata Table The fo llowing tables indicate the errata and the document changes that apply to the Intel® Server Board SDS2 . Intel intends to fix some of the errata in a future stepping of components, and to acco unt for the other [...]

  • Page 118

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 107 21. Fixed Fab 5 Keyboard and Mouse do not function under Microsoft* Windows* 2000 when legacy USB is enabled in BIOS setup 22. Fixed Data miscompares when using Seagate* ATA III model ST310215A hard drives 23. Fixed Fab 5 Boot to service partition via modem fails 2[...]

  • Page 119

    Errata Listing Intel® Server Board SDS2 Revis ion 1.2 Order Number: A85874 - 002 108 13.2 Errata [DD1] 1. Intel® RAID controller SRC MR not yet supported with Intel® Server Board SDS2 Problem: The Intel RAID Controller SRCMR installed on the Intel Server Board SDS2 is currently an unsupported configuration. Intel has induced a failure condition [...]

  • Page 120

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 109 in BIOS Setup, the following error message will appear when attempting to update the FRU/SDR files: Updating the FRU and Sensor Data Records Packaged file is corrupt Implication: If console redirection is set to enabled in BIOS Setup, the Intel Server Board SDS2 FR[...]

  • Page 121

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 110 Server Board SDS2 does not service this interrupt when the BIOS Logo screen is enabled. Implication: When booting the Intel Server Board SDS2 with a n Intel RAID Controller or ICP Vortex* RAID controller installed, the system will halt during POST when the Intel Se[...]

  • Page 122

    Intel® Serve r Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 111 2. On the Utilities page, drop down the menu and choose the Platform Confidence Test option. 3. Click on the Create Diskette icon that appears and when prompted, choose to save the file to a temporary folder on your hard drive. 4. Locate the file you just s aved a[...]

  • Page 123

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 112 Problem: Microsoft* Wi ndows* 2000 NIC driver set 5.1.2 v.5.41.27 prevents the Intel® Server Board SDS2 from making a DPC LAN connection when the operating system is loaded. Implication: NIC driver set 5.1.2 v.5.41.27 for Microsoft* Windows* 2000 should not be use[...]

  • Page 124

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 113 1600x1200 Not supported. Workaround: Utilize a video mode that is currently supported by the SDS2 Server Board. Status: Fixed. SDS2 BIOS Production Release 2.4 (Build 47) and later versions have added support for additional high resol ution video modes. The followi[...]

  • Page 125

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 114 Implic ation: The SDS2 server board will not complete POST if more than 4GB or more of total system memory is installed and the Extended RAM step option in BIOS Setup is set to “Every Location”. Workaround: Choose a different option besides “Every Location”[...]

  • Page 126

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 115 Workaround: This issue does not occur when the SDS2 onboard SCSI controller option ROM is set to “Disabled”. To disable the SDS2 onboard SCSI controller option ROM, access the Intel® Server Board SDS2 BIOS Setup by pressing F2 during POST. In BIOS Setup, chang[...]

  • Page 127

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 116 In addition to this message, the SC5100 front panel system status LED will light solid amber, indicating a system temperature fault. This condition will continue to appear during POST each time the SDS2 system i s rebooted, until AC power is removed from the system[...]

  • Page 128

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 117 Implication: The SDS2 sy stem BIOS will enter the PXE boot sequence if various numeric keys are pressed during POST. Workaround: Do not enter numeric keys during the POST process. Status: Fixed. This issue is fixed in SDS2 BIOS Production Release 2.5 (Build 48) and[...]

  • Page 129

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 118 Implication: If you are installing the Intel Server Board SDS2 into the Intel SC5100 Server Chassis, Intel recommends installing the rubber bumper included with the server board. If you are inst alling the Intel Server Board SDS2 into a chassis other than the Intel[...]

  • Page 130

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 119 Figure 1 . Placing the Rubber Bumper in the Chassis Workaround: Utilizing the rubber bumper with the SDS2 Server Board is a workaround for issues th at may occur due to vibration during shipment of the integrated system product. Status: NoFix. 21. Keyboard and Mous[...]

  • Page 131

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 120 22. Data miscompares when using Seagate* ATA III model ST310215A hard drives Problem: Intel has induced data miscompares in SDS2 sytems configured with a Seagate* ATA III model ST310215A hard drive under extreme workloads during validation testing. Intel has verfie[...]

  • Page 132

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 121 Problem: Mechanical interference between the Myelex installed memory module (DIMM) and the onboard SCSI connector occurs if a Wide or Singled Ended SCSI cable is installed on embedded SCSI A or B connector. LVD SCSI cable connectors do not interfer. Implication: Me[...]

  • Page 133

    Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 122 28. OB P100 NICs do not show at POST but attempt PXE boot and appear in Boot Menu Problem: On board NIC are not display ed during post but do appear in Boot Device menu. These controllers will also attempt to do a PXE boot if no other bootable devices are found . I[...]

  • Page 134

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 123 Status: Will Not Fix. 30. Can Not Change BIOS SETUP IDE Options Using <Enter> Key Problem: In SETUP, when attempting to change any option under the Primary/Secondary IDE controller sub - menu, one must use the space bar. The enter key doe s not function. The [...]

  • Page 135

    Errata Listing Intel® Server Boar d SDS2 Revision 1.2 Order Number: A85874 - 002 124 Alternatively, the updated drivers may installed using the following procedure to install NW6. . a) Boot to DOS and fdisk/format the C: p artition. b) Boot to C: drive and load loddvc.com and cdex from there: "loddvc aoatapi.sys /D:cdr0m001 cdex.exe /D:cdr0m0[...]

  • Page 136

    Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 125 34. Peer - to - peer PCI transactions are not supported betwee n the CIOB - controlled 64 - bit PCI bus and the legacy 32 - bit PCI bus controlled by the HE - SL north bridge Problem: Peer - to - peer PCI transactions are supported between the two peer CIOB - contr[...]

  • Page 137

    Errata Listing Intel® Server Board SDS2 Revision 1.2 O rder Number: A85874 - 002 126 therefore does not display any text messages and does not allowing the CTRL - S option. Status: Will not fix.[...]

  • Page 138

    Intel® Server Board SDS2 Glossary Revision 1.2 Order Number: A85874 - 002 I Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.g., “AGP 4x”). Acronyms are then entered in their respective place, with non - acrony[...]

  • Page 139

    Glossary Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 II Term Definition Mux multiplexor NMI Non - maskable Interrupt OEM Original equipment manufacturer Ohm Unit of electrical resistance P32 - A 32 bit PCI Segment P64 - B Full Length 64/66 MHz PCI Segment P64 - C Full Length 64/66 MHz PCI Segment PBGA Pin Ball Grid Array PCT P[...]

  • Page 140

    Intel® Server Board SDS2 Reference Documents Revision 1.2 Order Number: A85874 - 002 III Reference Documents Refer to the following documents for additional information: Refer to the following documents for additional information: • Coppermine - T Processor Data Sheet Rev 1.0, FM - 2051 • Tualatin Processor Electrical, Mechanical, and Thermal [...]

  • Page 141

    Index Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 IV Index 1 1.25V, 39 12V, 39 - 12V, 39 2 2.5 V logic levels, 68 2.5V, 39 29LV008B, 3, 20 2 - way interleaved SDRAM, 6, 9 3 3.3 V logic leve ls, 68 3.3v Standby, 39 3.3VI, 39 5 5V, 39 8 82550, 2, 11, 12, 15, 16 82550PM , 9, 20 8259, 16 82C59, 17, 20 A A/D converter, 38 AC link m[...]

  • Page 142

    Index Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 II D Data channels , 21 Data transfer, 8 Device ID, 11, 12 DIMM, 42 DIMM sockets, 2, 6 DMA Mode, 17 DP8473, 19 E Errata Summary Table, 103 Error handling, 34, 35 Error logging, 35 Error pins, 32 ESCD parameter block, 65 Ev ent Logging, 39 Event, Trigger , 37 Exit Menu, 51, 54,[...]

  • Page 143

    Intel® Server Board SDS2 Index Revision 1.2 Order Number: A85874 - 002 III Memory configuration requirements , 6 Memory controller, 2, 4, 6, 8 Memory interleaving , 6 Memory scrubbing , 6, 9 MIRQ#, 32 Missing CPU Module, 41 MPS, 57 Multiple - bit error detection , 6 Multiple - bit errors , 4 N N_KBD_ PINITL, 30 N_PWRGD+00 , 30 N_RST_BMCRST_L, 28, [...]

  • Page 144

    Index Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 IV SCSI Controller, 13, 68 SDRAM DIMM connectors, 73 Security, 51, 54 Processor, 45, 46 SEL Log Sensors, 38 Sensor Event , 37 Sensor Failure, 43 Sensor, Processor, 45, 46 Serial ports, 3, 18, 19, 82 Serialized IRQs , 21 SERIRQ , 21 SERR#, 32, 37, 76 , 77 ServerSet* III HE - SL [...]

  • Page 145

    Intel® Server Board SDS2 Index Revision 1.2 Order Number: A85874 - 002 V Zero - channel RAID controller , 14[...]