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The rules should oblige the seller to give the purchaser an operating instrucion of Renesas SH7710 E10A, along with an item. The lack of an instruction or false information given to customer shall constitute grounds to apply for a complaint because of nonconformity of goods with the contract. In accordance with the law, a customer can receive an instruction in non-paper form; lately graphic and electronic forms of the manuals, as well as instructional videos have been majorly used. A necessary precondition for this is the unmistakable, legible character of an instruction.
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Table of contents for the manual
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Page 1
Revision Date: Mar . 01, 2005 Renesas Micro computer Devel opment Environme nt System SuperH Family / SH7700 Series SH7710 E10A HS 7710KCM02HE Rev.1.00 SuperH TM Family E10A Emulator Additional Docume nt for User’s Manua l Specific Gu ide for the SH7710 E10A E mulator REJ10B0186-0100[...]
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1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp[...]
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i Contents Section 1 Connecting the Emulator with the User System ................................1 1.1 Components of the Emulato r ............................................................................................ 1 1.2 Connecting the Em ulator with the User System ............................................................... 3 1.3 Ins[...]
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1 Section 1 Connecting the Emulator with the User System 1.1 Components of the Emulator The SH7710 E10A em ulator s upports the SH7710. Table 1. 1 list s the components o f the emulator. Table 1.1 Com ponents of the E mulator (HS7710KCM 01H, HS7710KCM 02H, HS7710KCI01 H, or HS771 0KCI 02H) Classi- fication Component Appearance Quan- tity Remarks Ha[...]
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2 Table 1.1 Com ponents of the E mulator (HS7710KCM 01H, HS7710KCM 02H, HS7710KCI01 H, or HS771 0KCI 02H) (cont) Classi- fication Component Appearance Quan- tity Remarks Hard- ware Ferrite core (connect ed with th e user interfac e cable) 1 Countermeasure for EMI* (only for HS7 710KCM02H a nd HS7710KCI02H ) Soft- ware SH7710 E10A emulator setup pro[...]
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3 1.2 Connecting the Emulator with the User System To connect the E10A emulator (hereina fter referred t o as the emulator), t he H-UDI port connector must be installed on the user syst em to connect the user s ystem interface cable. W hen designing the user syst em, refer to an e xample of rec ommended conne ction between t he connector a nd the M[...]
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4 1.3 Installing the H-UDI Port Connector on the User System Table 1.3 show s the recommended H -UDI port c onnectors for the em ulator. Table 1.3 Recommended H-UDI Port Connectors Connector Type Number Manufacturer Specifications DX10M-36S Screw type 36-pin conne ctor DX10M-36SE, DX10G1M-36SE Hirose Electri c Co., Ltd. Lock-pin ty pe 14-pin conne [...]
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5 Notes: H-UDI port connector (Pin 1 mark) (top view) Unit: mm 4.8 M 2 .6 x 0.45 9.0 0.3 3.9 H-UDI port connector (front view) 1. Input to or output from the user system. 2. The slash (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected. Pin No. S[...]
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6 Pin 1 mark Notes: 1. Input to or output from the user system. 2. The slash (/) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected. 25.0 23.0 6 x 2.54 = 15.24 (2.54) 0.45 Pin 1 Pin 8 Pin 7 Pin 14 Pin 1 mark H-UDI port connector (top view) H-UDI por[...]
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7 1.5 Recommended Circuit between the H- UDI Port Connector and the MPU 1.5.1 Recommended Circuit ( 36-Pin Ty pe) Figure 1.5 s hows a recomme nded circuit bet ween the H-UD I port c onnector (36 pi ns) and the MPU. Notes: 1. Do not connect an ything t o the N.C . pins of the H-UD I port connector. 2. The processing of the /AS EMD0 pin di ffers depe[...]
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8 CPU 3.3 V 4.7 k Ω E10A TMS, TRST Diode equivalent to 1SS106* Note: Schottky-barrier diode Figure 1.4 Coun termeasure against the L eakage Current in th e Emulator The result above di ffers depen ding on the circ uit and ca n only be us ed as a reference . 7. The resist ance values shown i n figure 1.5 are rec ommended. 8. For the pin processi n[...]
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9 H-UDI port connector (36-pin type) SH7710 Reset signal 4.7 k Ω 1 AUDATA0 AUDATA2 AUDATA1 AUDATA3 TCK TMS N.C. N.C. RESET TDI TDO TRST ASEBRKAK N.C. GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 12 10 14 16 18 20 22 24 26 28 30 32 34 36 AUDCK N.C. 1 k Ω 4.7 k [...]
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10 1.5.2 Recommended Circuit ( 14-Pin Ty pe) Figure 1.7 shows a recomme nded circuit between the H-UD I port connecto r and the MPU. Notes: 1. Do not connect an ything t o the N.C . pins of the H-UD I port connector. 2. The processing of the /AS EMD0 pin di ffers depe nding on w hether the em ulator is used or not. As the emulato r does not cont ro[...]
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11 CPU 3.3 V 4.7 k Ω E10A TMS, TRST Diode equivalent to 1SS106* Note: Schottky-barrier diode Figure 1.6 Coun termeasure against the L eakage Current in th e Emulator The result above di ffers depen ding on the circ uit and ca n only be us ed as a reference . 7. The resist ance values shown i n figure 1.7 are rec ommended. 8. For the pin process i[...]
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12[...]
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13 Section 2 Specifications of the SH7710 E10A Emulator’ s Software 2.1 Differences between the SH7710 and the Emulator 1. When the em u lator system is in itiated , it initializes the ge n eral register s an d part of the control registers as s hown in table 2.1. The initial values of the actu al SH7710 regist ers are undefined. Table 2.1 Regi s[...]
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14 3. Low-Power States (Sleep, S oftware Standby, a nd Module S tandby) For low-power consumpti on, the SH 7710 has s leep, softwar e standby, a nd modul e standb y states. The sleep, software st andby, and mo dule standby s tates are switched us ing the SLEEP instruction. When the e mulator is used, o nly the sleep state can be cleared with either[...]
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15 8. Cache Operation during User Program Break When cache is enabled, t he emulator accesses the memory by the f ollowing methods: At memory write: Writes t hrough the cache, t hen writes to the memory. At memory read: Does not c hange the cache write mode that has been set. Therefore, when memory read or write is perf ormed duri ng us er [...]
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16 Table 2.2 Watchd og Timer Regi ster Register Name Usage Register WTCSR(W) Write Watchdog timer contr ol/ statu s regis ter WTCNT(W) Write Watchdog timer counter WTCSR(R) Read Watchdog timer contr ol/ statu s register WTCNT(R) Read Watchdog timer counter The watchdog timer operates only when the user pro gram is executed. D o not change the v[...]
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17 2.2 Specific Functions for the SH7710 E10A Emulator 2.2.1 Emulator Dr iver Selection Table 2.3 show s drivers which are selected i n the [E10A Dri ver Detail s] dialog b ox. Table 2.3 Type Number and Driver Type Number Driver HS7710KCM01H E10A PC Card Driver 3 HS7710KCM02H E10A PC Card Driver 4 HS7710KCI01H E10A PCI Card Dr iver 3 HS7710KCI02H E[...]
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18 2.2.2 Break Conditio n Function s In addition to BREAKPOINT functions, the e mulator has B reak Condition functions. Three types of conditions can be set under Break Condition 1, 2, 3. Tabl e 2.4 lists these conditions of B reak Conditi on. Table 2.4 Ty pes of Break Co nditions Break Conditi on Type Description Address bus condit ion (Addre ss) [...]
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19 Table 2.5 lists the combi nations of conditions that can be set under Break Condition 1, 2, 3. Table 2.5 Di alog Boxes f or Setti ng Break C ondition s Type Dialog Box Address Bus Condition (Address) Data Bus Condition (Data) ASID Condition (ASID) Bus State Condition (Bus Status) Count Condition (Count) Internal I/O Break LDTLB Instruction Break[...]
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20 AUD Trace Functions: This fun ction is operational wh en the AUD pin of the d evice is connected to the emulator. Table 2.8 shows th e AUD trace acq uisition mode that can b e set in each trace function. Table 2.8 AUD Trace Acqu isitio n Mode Type Mode Description Continuou s trace occurs Realtime trace When the n ext branch occurs while t he tr[...]
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21 To set the AUD trace acquisition mode, click the [Trace] window with the right mouse but ton and select [Setting] from the pop-u p menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be s et in the [AUD mode1] o r [AUD mode2] group box i n the [Tra ce mode] page of the [Acq uisiti on] dialog box . Figure 2.1 [Trace m[...]
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22 (a) Branch Trace Function The branch source and dest ination address es and their source l ines are displa yed. Branch trace can be acquire d by selecting the [Branc h trace] check b ox in the [AUD function] group box of the [Trace mo de] page. The branch type can be selected in the [AUD Branch trace] page. Figure 2.2 [AUD Branch trace] Page (b)[...]
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23 Figure 2.3 [W indow trace] Page Notes: 1. When the [L - bus] o r [I-bus] radio button is selected , the following b us cycles will be traced. • L-bus: A bus cycl e generated by the CP U is acquired. A bus cycle i s also acquired when the cache has been hit. • I-bus: A bus cycl e generate d by the CP U or DMA is acqui red. A bus cycl e is not[...]
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24 (c) Software Trace Function Note: This function ca n be su pported wit h SHC/C ++ compiler (manufacture d by Renes as Technology Corp .; includin g OEM and bu ndle prod ucts) V7.0 o r later. When a specific instruction is executed, the PC value at exec ution and the contents of one general register are acquire d by trace. Describe the T race(x) [...]
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25 9. For the AUD non-realtime trace, the written access may be executed again. If this is a problem on the user system, do not use the non-realtime trace. Internal Trace Function: This function is activated by selecting the [I nternal trace] radio button in the [Trace type] group box of the [Trace mode] pa ge. This function traces and displays the[...]
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26 An area that can be only read by MMU 3. During step operation, a BREAKP OINT is di sabled. 4. Conditions set at Break Condit ion 2 are dis abled when a n inst ruction to which a BREAKPOINT has b een set is executed. Do not set a BREAKPOI NT to an instruction in which Break C ondition 2 is sa tisfied. 5. When execution resumes from the addres[...]
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27 value after settin g . When no ASID value is sp ecif ied , the BREAKPOINT is set to a v irtual address correspo nding to the ASID value at comman d input. 12. An ad d ress (physical add r ess) to which a BREAKPOINT is set is d etermined wh en the BREAKPOINT is set. Accordingly, even if the VP_MAP table is modified after BREAKPOINT s etting, the [...]
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28 2.2.7 Note o n Setting the UBC_MODE Command In the [Confi guration] dial og box, i f [User] i s set whi le the [UB C mode] lis t box has been set, the STEP-type comman ds that us e Break Condi tion 2 for imple mentation cann ot be used. 2.2.8 Performance Measurement Function The SH7710 E10A em ulator s upports the performance measurement f uncti[...]
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29 Figure 2.4 [Perform ance An alysis ] Dialog Box (b) Measurement range One of the foll owing ranges c an be specifi ed. This depen ds on the i tem select ed for [Mod e] in the [Performance A nalysis] di alog bo x. 1. From the start to the end of the user pro gram execution (W hen Normal Break is selected for [Mode]) 2. From the satisf actio n of [...]
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30 Notes: 1. When the second and t hird ranges are specified, exec ute the us er program after t he measurement start conditio n is set to Break C ondition 1 (or B reak Condition 2) and t he measurement end con dition t o Break C ondition 2 (or Break Conditi on 1). 2. Step operatio n is not possible when Break co ndition 1->2 or Break cond ition[...]
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31 Table 2.10 Measurement Item Selected Name Option Disabled None Elapsed tim e AC Number of exe cution stat es VS Branch instru ction c ounts BT Number of e xecution instruct ions I DSP-instructi on execut ion counts DI (Devices incorporati ng the DSP function can only be mea sured.) Instructi on/d ata con fli ct cycle MAC Other confl ict cy cles [...]
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32 Table 2.10 Measurement Item (cont) Selected Name Option Non-cacheab le a rea data access cycle NCD Cacheable area ac cess cycl e CC Cacheable area instru ction a ccess c ycle CIC Cacheabl e area d ata access cycle CDC Access counts oth er than i nstructi on/data NAM Non-cacheable are a access count s NCN Non-cache able are a instr uctio n acce s[...]
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33 Note: I f a p erformance counter overflows as a result o f m easu rement, “********” will b e displayed. 3. Initializing th e measured result To initialize the measured result, s elect [Initialize] from the popu p menu in the [Perfor mance Analysis] window or specify I NIT with the PERF ORMANCE_ANALYSIS command.[...]
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SuperH Family E10A Emulator Additional Document for User's Manual Specific Guide for the SH7710 E10A Emulator Publication Date: Rev.1.00, March 1, 2005 Published by: Sales Strategic Planning Div. Renesas Technology Corp. Edited by: Technical Documentation & Information Department Renesas Kodaira Semiconductor Co., Ltd. 2005. Renesa[...]
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Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Refer to " http://www.renesas.com/en/network " for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) [...]
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SuperH Family E10A Emul a tor Additional Doc ument for User’s Manu al Specific Guide for the SH77 10 E10A Emulator[...]