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Table of contents for the manual
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Page 1
H8DMR-82 H8DMR-i2 USER’S MANUAL Revision 1.0d S UPER ®[...]
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Page 2
Manual Revision 1.0d Release Date: March 13, 2009 The information in this User ’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any per[...]
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Page 3
Preface iii Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8DMR-82/H8DMR-i2 serverboard. The H8DMR-82/H8DMR-i2 is based on the nVidia® MCP55 Pro/NEC uPD720400 chipset and supports single or dual AMD Opteron TM 2000 Seri[...]
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Page 4
H8DMR-82/H8DMR-i2 User ’s Manual T able of Contents Preface About This Manual ...................................................................................................... iii Manual Organization ................................................................................................... iii Chapter 1: Introduction 1-1 Overview ..[...]
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Page 5
v T able of Contents USB Ports .............................................................................................. 2-1 1 USB Headers ......................................................................................... 2-12 Serial Ports ............................................................................................. 2-12[...]
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Page 6
H8DMR-82/H8DMR-i2 User ’s Manual 2-10 Enabling SA T A RAID .................................................................................... 2-24 2-1 1 Installing Additional Drivers .......................................................................... 2-26 Chapter 3: T roubleshooting 3-1 T roubleshooting Procedures .......................[...]
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Page 7
Chapter 1: Introduction 1-1 Chapter 1 Introduction 1-1 Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry . Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have a[...]
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Page 8
1-2 H8DMR-82/H8DMR-i2 User ’s Manual Contacting Supermicro Headquarters Address: Super Micro Computer , Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. T el: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (T echnical Support) Web Site: www .supermicro.com Europe Address: Super Mi[...]
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Page 9
Chapter 1: Introduction 1-3 Note: The H8DMR-82 is pictured. The H8DMR-i2 shares the same layout but with no SCSI components, connectors or jumpers. Figure 1-1. H8DMR-82/H8DMR-i2 Image[...]
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Page 10
1-4 H8DMR-82/H8DMR-i2 User ’s Manual Notes: 1. Jumpers not indicated are for test purposes only . 2. The H8DMR-i2 has the same layout as the H8DMR-82 but with no SCSI compo- nents, connectors or jumpers. Figure 1-2. H8DMR-82/H8DMR-i2 Serverboard Layout (not drawn to scale) NEC uPD720400 A TI ES1000 BIOS KB MSE USB0 /1 VGA Battery SIM1U DIMM 1B DI[...]
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Page 11
Chapter 1: Introduction 1-5 H8DMR-82/H8DMR-i2 Quick Reference Jumpers Description Default Setting J3P 3rd Power Fail Detect En/Dis Closed (Enabled) JBT1 CMOS Clear See Section 2-7 JCF1 Compact Flash Master/Slave Closed (Master) JI 2 C1/2 I 2 C to PCI Enable/Disable Closed (Enabled) JP A1* SCSI Enable/Disable Pins 1-2 (Enabled) JP A2/JP A3* SCSI Cha[...]
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Page 12
1-6 H8DMR-82/H8DMR-i2 User ’s Manual Serverboard Features CPU • Single or dual AMD Opteron 2000 Series Socket F type 64-bit processors Memory • Eight dual/single channel DIMM slots supporting up to 64 GB of DDR2-667 /533/400 registered ECC SDRAM Note: Memory capacities are halved for single CPU systems. Refer to Section 2-4 before installing.[...]
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Page 13
Chapter 1: Introduction 1-7 ACPI Features • Slow blinking LED for suspend state indicator • BIOS support for USB keyboard • Main switch override mechanism • Internal/external modem ring-on Onboard I/O • On-chip SA T A controller supporting six (6) SA T A ports (RAID 0, 1, 0+1 and 5) • Adaptec AIC-7902W SCSI controller (RAID 0, 1 and 10,[...]
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Page 14
1-8 H8DMR-82/H8DMR-i2 User ’s Manual Figure 1-3. nVidia MCP55 Pro/NEC uPD720400 Chipset: System Block Diagram Note: This is a general block diagram and may not exactly represent the features on your serverboard. See the previous pages for the actual speci fi cations of your serverboard. M C P 55 P ro AMD Opte r o n TM Pr o cess or (CPU 2) 16 x 1[...]
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Page 15
Chapter 1: Introduction 1-9 1-2 Chipset Overview The H8DMR-82/H8DMR-i2 serverboard is based on the nVidia MCP55 Pro/NEC uPD720400 chipset. The nV idia MCP55 Pro functions as Media and Communica- tions Processor (MCP) and the NEC chip as a PCI-X T unnel. Controllers for the system memory are integrated directly into the AMD Opteron processors. MCP55[...]
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Page 16
1-10 H8DMR-82/H8DMR-i2 User ’s Manual 1-3 PC Health Monitoring This section describes the PC health monitoring features of the H8DMR-82/H8DMR- i2. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard V oltage Monitors for two CPU cores, Hyper T ransport (1.2V), memory banks (1.8V), chipset (1.5V)[...]
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Page 17
Chapter 1: Introduction 1-1 1 1-4 Power Con fi guration Settings This section describes the features of your serverboard that deal with power and power settings. Slow Blinking LED for Suspend-State Indicator When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user [...]
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Page 18
1-12 H8DMR-82/H8DMR-i2 User ’s Manual 1-5 Power Supply As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. The H8DMR-82/H8DMR-i2 accommodates 12V A TX power supplies. Although most power supplies generally meet the speci fi c[...]
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Page 19
Chapter 1: Introduction 1-13 1-6 Super I/O The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive controller that is compatible with industry standard 82077/765, a data separator , write pre-compensation circuitry , decode logic, data rate selection, a clock genera- tor , drive interface control logic and interrupt and[...]
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Page 20
1-14 H8DMR-82/H8DMR-i2 User ’s Manual Notes[...]
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Page 21
Chapter 2: Installation 2-1 Chapter 2 Installation 2-1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. T o prevent dam- age to your system board, it is important to handle it very carefully . The following measures are generally suf fi cient to protect your equipment from ESD. Precautions • Use a grounde[...]
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Page 22
2-2 H8DMR-82/H8DMR-i2 User's Manual ! 2-2 Processor and Heatsink Installation Installing the Processor (install to the CPU#1 socket fi rst) 1. Begin by removing the cover plate that protects the CPU. Lift the lever on CPU socket #1 until it points straight up. With the lever raised, lift open the silver CPU retention plate. 2. Use your thumb [...]
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Page 23
Chapter 2: Installation 2-3 3. Align pin 1 of the CPU with pin 1 of the socket. Once aligned, carefully place the CPU into the socket. Do not drop the CPU on the socket, move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket, which may damage the CPU and/or the socket . 4. With the CPU inserted i[...]
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Page 24
2-4 H8DMR-82/H8DMR-i2 User's Manual Installing the Heatsink The use of active type heatsinks (except for 1U systems) are recommended. Con- nect the heatsink fans to the appropriate fan headers on the serverboard. T o install the heatsinks, please follow the installation instructions included with your heatsink package (not included). Installin[...]
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Page 25
Chapter 2: Installation 2-5 2-3 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fi t dif ferent types of chassis. Make sure that the locations of all the mounting holes for both the serverboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, met[...]
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Page 26
2-6 H8DMR-82/H8DMR-i2 User's Manual Figure 2-2. Side and T op Views of DDR Installation T o Install: Insert module vertically and press down until it snaps into place. The release tabs should close - if they do not you should close them yourself. T o Remove: Use your thumbs to gently push each re- lease tab outward to release the DIMM from the[...]
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Page 27
Chapter 2: Installation 2-7 Populating Memory Banks for 128-bit Operation CPU1 DIMM1A CPU1 DIMM1B CPU1 DIMM2A CPU1 DIMM2B CPU2 DIMM1A CPU2 DIMM1B CPU2 DIMM2A CPU2 DIMM2B XX XX XX XX XX XX XXXX XXXX XXXXXX XXXX XX XXXXXXXX XX XXXX XX XX XXXXXX Populating Memory Banks for 64-bit Operation CPU1 DIMM1A CPU1 DIMM1B CPU1 DIMM2A CPU1 DIMM2B CPU2 DIMM1A CP[...]
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Page 28
2-8 H8DMR-82/H8DMR-i2 User's Manual 2-5 I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 speci fi cation to make setting up your system easier . See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. I/O Port Locations and De fi nitions Front Control Panel JF1 [...]
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Page 29
Chapter 2: Installation 2-9 2-6 Connecting Cables A TX Power Connector The primary A TX power supply con- nector (JPW1) meets the SSI (Super- set A TX) 20-pin speci fi cation. Refer to the table on the right for the pin de fi nitions of the A TX power connec- tor . This connection supplies power to the chipset, fans and memory . Note: Y ou must a[...]
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Page 30
2-10 H8DMR-82/H8DMR-i2 User's Manual Overheat/Fan Fail LED Connect an LED to the OH connection on pins 7 and 8 of JF1 to provide ad- vanced warning of chassis overheat- ing. Refer to the table on the right for pin de fi nitions and status indicators. NIC1 LED The NIC1 (Network Interface Control- ler) LED connection is located on pins 1 1 and [...]
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Page 31
Chapter 2: Installation 2-1 1 Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table on the right for pin de fi ni- tions. This feature is only available for systems with redundant power supplies. Power Fail LED Pin De fi nitions (JF1) Pin# De fi nition 5 Vcc 6 Control Reset Button The Reset Button con[...]
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Page 32
2-12 H8DMR-82/H8DMR-i2 User's Manual Fan Headers The H8DMR-82/H8DMR-i2 has fi ve- fan headers, which are designated F AN1 through F AN5. See the table on the right for pin de fi nitions. Note: when using active heatsinks (those with fans), connect the heatsink fans to the nearest fan header . Serial Ports The COM1 port is located on the I/O [...]
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Page 33
Chapter 2: Installation 2-13 A TX PS/2 Keyboard and PS/2 Mouse Ports The A TX PS/2 keyboard and the PS/2 mouse ports are located on the I/O backplane (see Figure 2-3). Refer to the table on the right for pin de fi nitions. PS/2 Keyboard and Mouse Port Pin De fi nitions Pin# De fi nition 1 Data 2N C 3 Ground 4 VCC 5 Clock 6N C Chassis Intrusion A[...]
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Page 34
2-14 H8DMR-82/H8DMR-i2 User's Manual W ake-On-LAN The W ake-On-LAN header is desig- nated JWOL. See the table on the right for pin de fi nitions. Y ou must have a LAN card with a W ake-On-LAN connector and cable to use the W ake- On-LAN feature. Note: W ake-On-LAN from S3, S4, S5 are supported by LAN1. LAN2 sup- ports W ake-On-LAN from S1 onl[...]
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Page 35
Chapter 2: Installation 2-15 3rd Power Supply Alarm Reset Header Connect JAR to the alarm reset but- ton on your chassis (if available) or to a microswitch to allow you to turn off the alarm that sounds when a power supply module fails. See the table on the right for pin de fi nitions. PS Alarm Reset Header Pin De fi nitions (JAR) Pin# De fi nit[...]
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Page 36
2-16 H8DMR-82/H8DMR-i2 User's Manual 2-7 J u m p e r S et t i n g s Explanation of Jump ers T o mo dif y th e ope rati on of t he ser verboard, jumpers can be used to choose between optional se tt ings. Jum per s c reate s hor ts b et ween t wo p in s to ch a n g e th e fu nc ti o n of th e c onne ct or . Pin 1 i s ide nti fi ed with a squ ar[...]
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Page 37
Chapter 2: Installation 2-17 CMOS Clear JBT1 is used to clear CMOS and will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS. T o clear CMOS, 1) First power down the system and unplug the power cord(s). 2) With the power disconnected, short the CMOS pads with a met[...]
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Page 38
2-18 H8DMR-82/H8DMR-i2 User's Manual PCI-X Slot Freq. Select Jumpers JPX1A and JPX1B on the H8DMR-82/H8DMR-i2 can be used to change the speed of PCI-X slots 6 and PCI-X slot 7, respectively . See the table on the right for jumper settings. PCI-X Slot Frequency Select Jumper Settings (JPX1A/JPX1B) Jumper Setting De fi nition Open Auto Pins 1-2[...]
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Page 39
Chapter 2: Installation 2-19 SCSI Con troll er Ena ble / Di sa bl e (H8 DM R- 82 o nly) J u m pe r J P A 1 i s u s e d t o e n a b l e o r d i s - abl e th e onb oar d SC SI c ont rol ler . The default setting is on pins 1-2 to enable SCSI. Se e the t ab le o n ri ght fo r jumper settings. SCSI Enable/Disable Jumper Settings (JP A1) Jumper Setting [...]
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Page 40
2-20 H8DMR-82/H8DMR-i2 User's Manual 2-8 Onboard Indicators LAN1/LAN2 LEDs The Ethernet ports (located beside the VGA port) have two LEDs. On each Gb LAN port, one LED indicates activity when blinking while the other LED may be amber or off to indicate the speed of the connection. See the table on the right for the func- tions associated with [...]
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Page 41
Chapter 2: Installation 2-21 2-9 Floppy , IDE, SA T A and SCSI Drive Connections Use the following information to connect the fl oppy and hard disk drive cables. The fl oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single fl oppy disk drive ribbon cable has 34 wires [...]
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Page 42
2-22 H8DMR-82/H8DMR-i2 User's Manual IDE Connector There are no jumpers to con fi g- ure the onboard JIDE1 connec- tor . See the table on the right for pin de fi nitions. IDE Drive Connector Pin De fi nitions (JIDE1) Pin# De fi nition Pin # De fi nition 1 Reset IDE 2 Ground 3 Host Data 7 4 Host Data 8 5 Host Data 6 6 Host Data 9 7 Host Da[...]
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Page 43
Chapter 2: Installation 2-23 Ultra320 SCSI Drive Connectors Pin De fi nitions (JA1, JB1) Pin# De fi nition Pin # De fi nition 1 +DB (12) 35 -DB (12) 2 +DB (13) 36 -DB (13) 3 +DB (14) 37 -DB (14) 4 +DB (15) 38 -DB (15) 5 +DB (P1) 39 -DB (P1) 6 +DB (0) 40 -DB (0) 7 +DB (1) 41 -DB (1) 8 +DB (2) 42 -DB (2) 9 +DB (3) 43 -DB (3) 10 +DB (4) 44 -DB (4) [...]
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Page 44
2-24 H8DMR-82/H8DMR-i2 User's Manual 2-10 Enabling SA T A RAID Now that the hardware is set up, you must now install the operating system and the SA T A RAID drivers, if you wish to use RAID with your SA T A drives. The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a s[...]
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Page 45
Chapter 2: Installation 2-25 2. Use the arrow keys to move to Advanced > Floppy/IDE/SA T A Con fi guration > nVidia RAID Setup and press the <Enter> key . Once in the submenu, enable the "nVidia RAID Function" setting, which will cause the SA T A0/1/2 Primary/Secondary settings to appear . Enable the SA T A devices and channe[...]
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Page 46
2-26 H8DMR-82/H8DMR-i2 User's Manual Figure 2-5. Driver/T ool Installation Display Screen Click the icons showing a hand writing on paper to view the readme fi les for each item. Click the computer icons to the right of these items to install each item (from top to the bottom) one at a time. After installing each item, you should reboot the s[...]
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Page 47
3-1 Chapter 3: T roubleshooting Chapter 3 T roubleshooting 3-1 T roubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘T echnical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter . [...]
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Page 48
3-2 H8DMR-82/H8DMR-i2 User's Manual NOTE If you are a system integrator , V AR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed. 2. Y ou should be using registered ECC DDR2 memory (see next page). Also, it is recommended th[...]
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Page 49
3-3 Chapter 3: T roubleshooting 3. If you still cannot resolve the problem, include the following information when contacting us for technical support: Serverboard model and PCB revision number BIOS release date/version (this can be seen on the initial display when your system fi rst boots up) System con fi guration An example of a T [...]
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Page 50
3-4 H8DMR-82/H8DMR-i2 User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power of f function is controlled in BIOS by the Power But- ton Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of th[...]
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Page 51
Chapter 4: BIOS 4-1 Chapter 4 BIOS 4-1 Introduction This chapter describes the AMIBIOS™ Setup utility for the H8DMR-82/H8DMR-i2. The AMI ROM BIOS is stored in a fl ash chip and can be easily upgraded using a fl oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be r[...]
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Page 52
4-2 H8DMR-82/H8DMR-i2 User ’s Manual 4-2 Main Menu When you fi rst enter AMI BIOS Setup Utility , you will see the Main Menu screen. Y ou can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys. The Main Menu screen provides you with a system overview , which includes the version, built date and [...]
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Page 53
Chapter 4: BIOS 4-3 Advanced ACPI Con fi guration ACPI V ersion Features Use this setting the determine which ACPI version to use. Options are ACPI v1.0 , ACPI v2.0 and ACPI v3.0. ACPI APIC Support Determines whether to include the ACPI APIC table pointer in the RSDT pointer list. The available options are Enabled and Disabled. ACPI OEMB T abl[...]
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Page 54
4-4 H8DMR-82/H8DMR-i2 User ’s Manual Floppy/IDE/SA T A Con fi guration Onboard Floppy Controller Use this setting to Enable or Disable the onboard fl oppy controller . Floppy A Move the cursor to these fi elds via up and down <arrow> keys to select the fl oppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 7[...]
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Page 55
Chapter 4: BIOS 4-5 Primary IDE Master/Slave Highlight one of the items above and press <Enter> to access the submenu for that item. T ype Select the type of device connected to the system. The options are Not Installed, Auto , CDROM and ARMD. LBA/Large Mode LBA (Logical Block Addressing) is a method of addressing data on a disk drive. The op[...]
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Page 56
4-6 H8DMR-82/H8DMR-i2 User ’s Manual DMA Mode Selects the DMA Mode. Options are SWDMA0, SWDMA1, SWDMA2, MWDMA0. MDWDMA1, MWDMA2, UDMA0. UDMA1, UDMA2, UDMA3, UDMA4 and UDMA5. (SWDMA=Single Word DMA, MWDMA=Multi W ord DMA, UDMA=UltraDMA.) S.M.A.R.T . Self-Monitoring Analysis and Reporting T echnology (SMART) can help predict impending drive failure[...]
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Page 57
Chapter 4: BIOS 4-7 PIO Mode PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller . As the PIO mode increases, the cycle time decreases. The options are Auto , 0, 1, 2, 3, and 4. Select Auto to allow AMI BIOS to auto detect the PIO mode. Use this value if the IDE disk drive support cannot be d[...]
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Page 58
4-8 H8DMR-82/H8DMR-i2 User ’s Manual PCI/PnP Con fi guration Load Onboard LAN Option ROM Use this setting to Enable or Disable the onboard option ROM. Clear NVRAM Select Y es to clear NVRAM during boot-up. The options are Y es and No . Plug & Play OS Select Y es to allow the OS to con fi gure Plug & Play devices. (This is not requir[...]
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Page 59
Chapter 4: BIOS 4-9 Advanced Chipset Control NorthBridge Con fi guration Memory Con fi guration Memclock Mode This setting determines how the memory clock is set. Auto has the memory clock by code and Limit allows the user to set a standard value. MCT Timing Mode Sets the timing mode for memory . Options are Auto and Manual. Bank Inte[...]
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Page 60
4-10 H8DMR-82/H8DMR-i2 User ’s Manual DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately , even with background scrubbing on. Options are Enabled and Disabled . DRAM BG Scrub Corrects memory errors so later reads are correct. Options are Dis- abled and various times in nanoseconds and microseconds. L2 Cache BG Scrub Allows L[...]
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Page 61
Chapter 4: BIOS 4-1 1 Processor Clock Options This submenu lists CPU information and the following settings: MTRR Mapping This determines the method used for programming CPU MTRRs when 4 GB or more memory is present. The options are Continuous , which makes the PCI hole non- cacheable, and Discrete, which places the PCI hole below the 4 GB boun[...]
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Page 62
4-12 H8DMR-82/H8DMR-i2 User ’s Manual Serial Port 2 Mode T ells BIOS which mode to select for serial port 2. The options are Normal , IrDA and ASKIR. DMI Event Logging View Event Log Highlight this item and press <Enter> to view the contents of the event log. Mark All Events as Read Highlight this item and press <Enter> to mark al[...]
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Page 63
Chapter 4: BIOS 4-13 Hardware Health Con fi guration CPU Overheat Alarm Use the "+" and "-" keys to set the CPU temperature threshold to between 65 o and 90 o C. When this threshold is exceeded, the overheat LED on the chas- sis will light up and an alarm will sound. The LED and alarm will turn of f once the CPU temperature[...]
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Page 64
4-14 H8DMR-82/H8DMR-i2 User ’s Manual F AN1 Speed through F AN5 Speed The speeds of the onboard fans (in rpm) are displayed here. F AN1 Speed Down Time Use the "+" and "-" keys to set the fan speed time interval of the ramp down. F AN1 Speed Up Time Use the "+" and "-" keys to set the fan speed time interva[...]
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Page 65
Chapter 4: BIOS 4-15 IPMI Con fi guration View BMC System Event Log Pressing the Enter key will open the following settings. Use the "+" and "-" keys to navigate through the system event log. Clear BMC System Event Log Selecting this and pressing the Enter key will clear the BMC system event log. Set LAN Con fi gur[...]
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Page 66
4-16 H8DMR-82/H8DMR-i2 User ’s Manual Startup Delay Use this setting to Enable or Disable the startup delay . Event Message for PEF Action Use this setting to Enable or Disable event messages for a PEF action. BMC W atch Dog Timer Action This setting is used to set the W atch Dog function. The options are Disabled , Reset System, Power Down and P[...]
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Page 67
Chapter 4: BIOS 4-17 CD/DVD Drives This feature allows the user to specify the Boot sequence from available CD/DVD drives. OS Installation Change this setting if using a 64-bit Linux operating system. The available options are Other and 64-bit Linux 2.6.9. 4-5 Security Menu AMI BIOS provides a Supervisor and a User password. If you use both pas[...]
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Page 68
4-18 H8DMR-82/H8DMR-i2 User ’s Manual 4-6 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit When you have completed the system con fi guration changes, select this option to leave BIOS Setup and reboot the computer , so the new system con fi guration parameters can take e[...]
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Page 69
Appendix A BIOS Error Beep Codes During the POST (Power-On Self-T est) routines, which are performed each time the system is powered on, errors may occur . Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen. Fatal errors are those which will not allow t[...]
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Page 70
A-2 H8DMR-82/H8DMR-i2 User ’s Manual Notes[...]
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Page 71
B-1 Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self T est, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. B-1 Uncompressed Initialization Codes The uncompr[...]
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B-2 H8DMR-82/H8DMR-i2 User ’s Manual Checkpoint Code Description E0h The onboard fl oppy controller if available is initialized. Next, beginning the base 512 KB memory test. E1h Initializing the interrupt vector table next. E2h Initializing the DMA and Interrupt controllers next. E6h Enabling the fl oppy drive controller and T imer IRQs. Enabli[...]
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B-3 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description 03h The NMI is disabled. Next, checking for a soft reset or a power on condition. 05h The BIOS stack has been built. Next, disabling cache memory . 06h Uncompressing the POST code next. 07h Next, initializing the CPU and the CPU data area. 08h The CMOS checksum calculation is do[...]
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B-4 H8DMR-82/H8DMR-i2 User ’s Manual Checkpoint Code Description 25h Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. 27h Any initialization before setting video mode will be done next. 28h Initialization before setting the video mode is complete. Con fi guring the mono- chrome mode and color mode set[...]
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B-5 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description 4Ch The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. 4Dh The memory above 1 MB has been cleared via a soft reset. Saving the memory size next. Going to checkpoint 52h next. 4Eh The memory test started, but not as the result of a soft [...]
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B-6 H8DMR-82/H8DMR-i2 User ’s Manual Checkpoint Code Description 86h The password was checked. Performing any required programming before WIN- BIOS Setup next. 87h The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. 88h Returned from WINBIOS Setup [...]
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B-7 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description A9h Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Aah Initialization after E000 option ROM control has completed. Displaying the system con fi guration next. Abh Uncompressing the DMI data and exec[...]
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B-8 H8DMR-82/H8DMR-i2 User ’s Manual (continued from front) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency com- munication devices or other critical systems whose failure to perform be reasonably exp[...]