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Texas Instruments PCI1520 manual

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Table of contents for the manual

  • Page 1

    Applicatio n Repor t SCPA033 - October 2002 1 PCI1520 Implementation G uide Computer Connectivity Solutions AB S T R AC T This document is provided to assist platf orm designers using the PCI1520 dual-socket PC Card controller . Detailed inf ormation can be found in the PCI 1520 data manual. However, this document provides design suggestions f or t[...]

  • Page 2

    SCPA033 2 PCI1520 Implementa tion Guide Figures Figure 1. Typical Sy stem Implementation .......................................................................................................................3 Figure 2. Power Switch Implementation ......................................................................................................[...]

  • Page 3

    SCPA033 PCI1520 Implementa tion Guide 3 1 PCI1520 Typical Sy stem Implementation The figure below represents a typical implementation of the PCI1520 PC C ard Controller . The device serves as a bridge between a PCI Bus an d a PC Card interface. The PCI1520 will operate only with the PCI Bus as a primary bus and t he PC Card interface a s the second[...]

  • Page 4

    SCPA033 4 PCI1520 Implementa tion Guide 2 Pow er Consider ations 2.1 Internal Voltage Regulator One of the major di ff erences between the PCI1520 and p revious Texas Instruments CardBus controllers is that the PCI1520 uses an internal voltage r egulator to power the c ore logic at 2. 5V. This allows for a more than 50% reduction in pow er consumpt[...]

  • Page 5

    SCPA033 PCI1520 Implementa tion Guide 5 3 Power Switch Implementation The following f igure shows the ser ial interface between the PCI1520 and the TPS2226A power switch: VCCB VPPB Socket A Pull-down for I2C interface (optional) VPPA CLOCK PCI1520 LATCH VCCA TPS2226A Socket B VCCA VCCB DATA Pulldown if using internal clock Figure 2. Power Switch Im[...]

  • Page 6

    SCPA033 6 PCI1520 Implementa tion Guide 4 PCI Bus I nterface The PCI1520 has a 33MHz, 32 bit PCI Interface c ompliant with PCI Local Bus Specification Revision 2.2. • PCLK, AD31:0, C/BE#3:0, PAR, DEVSEL#, FRAM E#, STOP#, TRDY#, IRDY#, GNT#, and REQ# are required PCI signals. All except PCLK, GNT#, and REQ# are bussed signals. PCLK is a 33MHz poin[...]

  • Page 7

    SCPA033 PCI1520 Implementa tion Guide 7 5 PC Card Interface There are two dif ferent modes on the PC Card interface. The first is 16-bit mode which is analogous to t he legacy ISA bus. The second is 32-bit CardBus mode which is very similar to a PCI Bus. T he terminal functions f or these two modes are multiplexed and routed to t he PC Card sockets[...]

  • Page 8

    SCPA033 8 PCI1520 Implementa tion Guide 6 Miscellaneous Pin Interface 6.1 Multifunction Terminals The mult ifunction terminals ( MFUNC6:0) can be programmed to serve many dif ferent roles using the Multifunction Routing regist er at PCI con figuration offs et 8Ch. T he discrete ISA interrupts (IRQ15:2), INTA#, INTB#, and IRQSER are explained in Sec[...]

  • Page 9

    SCPA033 PCI1520 Implementa tion Guide 9 7 Interrupt Confi gurations The PCI1520 provides system designers with great flexibility in configuring interrupt s. T he PCI1520 allows four interrupt modes which are selected via bits 2:1 of the Device Control register at PCI offset 92h. PCI interrupts are available on INTA# and INTB#. These signals are ava[...]

  • Page 10

    SCPA033 10 PCI1520 Implementa tion Guide PCI1520 Vcc TPS2226A SDA LATCH EEPROM SCL 8 Softw ar e Consider ations The PCI1520 is natively support ed by Windows XP. T he PCI1520 will be recognized natively as a Generic CardBus Controller under W indows 20 00, Windows ME, and Windows 98SE. The device will function properly using this driver. However, i[...]

  • Page 11

    SCPA033 PCI1520 Implementa tion Guide 11 The EEPROM loading map can be found in the data manual. The following is an example data file which could be loaded into the EEPROM for use w ith the PCI1520: ; EEPROM Programming Data for the PCI1520 Customer Board ; Configured for IRQ serialized interrupts and parallel PCI interrupts ; Register Data Descri[...]

  • Page 12

    SCPA033 12 PCI1520 Implementa tion Guide Latency Timer Register (PCI offset 0Dh) – This regist er indicates the number of PCI clocks the PCI 1520 will be allowed access to the PCI bus if another master has its REQ# asserted. The recommended value is 40h. However, the value should be dependent on the system implementation and which devices need pr[...]

  • Page 13

    SCPA033 PCI1520 Implementa tion Guide 13 9 Pow er Management Consi derati ons 9.1 D3 Wake Information A power management event (PME) is the process by which a PCI or Card Bus function can request a change of its c urrent power consumption state. Typically, a device uses PM E# to request a chan ge fr om a power savings state t o the fully operat ion[...]

  • Page 14

    SCPA033 14 PCI1520 Implementa tion Guide 9.1.1 GRST# Only Registe rs Global reset places all registers in t heir default state regard less of the state of the PME enable bit. T he GRST# signal is gated only by the SUSPEND# sig nal. This means t hat assertion of SUSPEND# block s the GRST # signal internally, thus preserving all register content s. T[...]

  • Page 15

    SCPA033 PCI1520 Implementa tion Guide 15 9.1.2 PME# Context Regist ers If the PM E# enable bit (bit 8) o f the power-management control/status re gist er (PCI o ffs et A4h) is asserted, then the assertion of PRST# will not clear the following PME# context bits. If the PME# enable bit is not asserted, then the PM E# context bits are cleared with PRS[...]

  • Page 16

    SCPA033 16 PCI1520 Implementa tion Guide STOPCLK – Socket Control Re gister (CB offset 10h, bit 7). This bit determines w hether the CB CLKRUN# protocol is affected by the PCI CLKRUN# protocol. CLKCTRLEN – Socket Pow er Management Register (CB o ffset 20h, bit 1 6). T his bit enables the CB CLKRUN# protocol. CLKCTRL – Socket Power Management [...]

  • Page 17

    SCPA033 PCI1520 Implementa tion Guide 17 11 Migration to the PCI1520 from the P CI1420 The major differ ences between the PCI1520 and PCI 1420 are pinout, lower power consumption, and lower cost. The pinout is chan ged on the PCI1520 in order to incorp orate an internal voltage r egulator which allows t he core to operate at 2.5V. W hen moving from[...]

  • Page 18

    SCPA033 18 PCI1520 Implementa tion Guide 11.2 Configuration Register Changes • The device ID f or the PCI 1520 is AC55. • Bit 23 in the System Contro l register ( PCI offset 80h) is re served on the PCI1520. On the PCI1420, this enabled PCI Bus pow er management specification revision 1.1 reporting. The PCI1520 is compliant to revision 1.1 by d[...]

  • Page 19

    SCPA033 PCI1520 Implementa tion Guide 19 11.3 Other Functional Differences • The PCI1520 is natively support ed by Windows XP. T he PCI1520 will be recognized natively as a Generic CardBus Controller under Windows 2000, W indow s ME, and W indow s 98SE. T he device will f unction properly using this driver. However, it is recommended that new dri[...]

  • Page 20

    SCPA033 20 PCI1520 Implementa tion Guide 12 Migration to the PCI1420 from the P CI1225 The major differ ences between the PCI 1420 and PCI1225 ar e the ability to wake f rom the D3 power state and the integration of the pullup resistors on the PC Card interf ace. T his is done using a global reset pin. 12.1 Hardware and Pin Assignment Changes • T[...]

  • Page 21

    SCPA033 PCI1520 Implementa tion Guide 21 12.2 Configuration Register Changes • The device ID f or the PCI 1420 is AC51. • The PCI1420 is both Intel 82365SL-DF and 82365SL register compatible. The PCI1225 is only 82365SL-DF register compatible. Bit 2 in the System Control register (PCI offset 80h) is now ExCA Pow er inst ead of reserved to al lo[...]

  • Page 22

    SCPA033 22 PCI1520 Implementa tion Guide 13 Reference Schematics The following schematics show the most basic implementation of the PC I1520 possible. T hese schematics provide minim um functionality. All interr upts are rout ed using IRQSER. Figure 4. Reference Schematics – P age 1 C/BE#2 R13 43K R10 43K R11 43K AD23 AD7 PME# AD19 AD10 NOTE: R4 [...]

  • Page 23

    SCPA033 PCI1520 Implementa tion Guide 23 Figure 5. Reference Schematics – P age 2 A_OE# B_INPACK# B_A23 A_CD2# A_D2 A_A24 B_D13 A_A6 A_A13 B_RESET B_D8 A_D6 B_A11 B_A1 B_D2 A_A6 A_IOWR# A_D4 B_CE2# A_D9 A_A0 A_A5 B_READY B_A1 B_IOWR# B_BVD1 B_CD2# A_BVD1 B_D6 B_D1 A_A25 B_CE1# A_D7 B_A4 A_A3 B_D13 B_WAIT# B_A20 A_A2 A_D5 B_A11 C9 .1uF B_D9 A_A19 [...]

  • Page 24

    SCPA033 24 PCI1520 Implementa tion Guide 14 References 1. PCI1520 GHK/PDV PC Card Controllers Data Manual (SCPS065A) 2. PCI Local Bus Specification Revision 2.2 3. PC Card Standard Revision 7.1 4. PCI Bus Power Management Interface Specification Revision 1.1 5. PCI Mobile Design Guide Revision 1.0[...]

  • Page 25

    IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orde[...]