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Texas Instruments SLAU081 manual

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Table of contents for the manual

  • Page 1

      January 2002 AAP Data Acquisition (Dallas) User ’ s Guide SLAU081[...]

  • Page 2

    IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orde[...]

  • Page 3

    EVM IMPORT ANT NOTICE T exas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EV ALUA TION PURPOSES ONL Y and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of[...]

  • Page 4

    EVM W ARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of ± 12 V and the output voltage range of ± 12 V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative p[...]

  • Page 5

    Running Title — Attribute Reference v Chapter Title — Attribute Reference Contents 1 Introduction 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 EVM Modes 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 6

    Running Title — Attribute Reference vi Figures 2 – 1 SAM Configuration 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T ables 2 – 1 Default Switch Settings 2-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 7

    1-1 Introduction This chapter contains an overview of the features and functions of the EVM. T opic Page 1.1 EVM Modes 1–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Analog Input Conditioning 1–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Analog Ou[...]

  • Page 8

    EVM Modes 1-2 This user ’ s guide has been written to help you get the most from your evaluation module (EVM). The TLC4541 EVM is a member of the multipurpose (MP) family of serial EVMs. It provides a platform to demonstrate the performance and functionality of the TLC4541 ADC and the TL V5636 DAC. TI ’ s websites are regularly updated. They pr[...]

  • Page 9

    Analog Input Conditioning 1-3 Introduction 1.1.1 Stand-Alone Mode A unique feature of this EVM is the facility it offers the user to closely couple the ADC and DAC with a minimum of user intervention. This feature allows the serial bit stream from the digitized analog output to be fed directly to the DAC. Therefore, the signal that is fed into the [...]

  • Page 10

    2-1 Getting Started Getting Started This chapter describes how the user can modify the various options of this EVM. T opic Page 2.1 Shipping (Default Configuration) 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Jumpers 2-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 11

    Shipping (Default Configuration) 2-2 It is very important that users feel comfortable with the EVM from the beginning. T o achieve this, each unit is manufactured and shipped in a predetermined condition. This allows the user to begin evaluation of the system immediately and to have confidence that the EVM is working. T o confirm that the EVM is wo[...]

  • Page 12

    Shipping (Default Configuration) 2-3 Getting Started T able 2 – 1. Default Switch Settings Switch Settings Default Configuration Description SW1-1 On Stand-alone mode is selected, LED is on SW1-2 Off Reserved SW1-3 Off Reserved SW1-4 Off Reserved T able 2 – 2. Default Jumper Settings Jumper Settings Default Configuration Description Pins 1 – [...]

  • Page 13

    Jumpers 2-4 2.2 Jumpers The table below lists the functions that users can reconfigure along with the shipping condition. T able 2 – 3. Jumper/Function Reference Function Reference Designator Subsection Channel 0 Analog input W1, W1 1, W4, W2, W3 3.2.3 Analog output W14, W19, W18 3.2.4 Disable onboard signal generator W9 3.2.7 V oltage reference [...]

  • Page 14

    Jumpers 2-5 Getting Started 2.2.3 Channel 0 Analog Output With a one-channel DAC installed, this signal is the primary analog output (output A). With a two-channel DAC installed, the pinout of these devices effectively resolves this channel to be the secondary analog output (output B). Analog Input Configuration Channel 0 Reference Designator Funct[...]

  • Page 15

    Switches 2-6 2.2.7 Clock/Timer Routing A variety of options are available to the user . Be careful about altering these. Clock/Timer Routing Reference Designator Functional Description W21 This jumper defines the clock that the ADC and DAC use for all their timing. The user can select either the output from W23 or the output from W22 to be the base[...]

  • Page 16

    Connectors 2-7 Getting Started If SW1-1 is set to the on position, user mode is selected. In this case the user has absolute control of the data and control signals for the ADC and DAC. With SW1-1 in the on position, the logic that generates the control for SAM is disabled and plays no active part in the process. 2.4 Connectors In addition to jumpe[...]

  • Page 17

    Connectors 2-8 Reference Designator Description Pin Number Function J4 Analog input option, 26-pin 1 Channel 0 input g, DIL header 2 AGND 3 Channel 1 input 4 AGND 5 Not connected 6 AGND 7 Not connected 8 AGND 9 Not connected 10 AGND 11 Not connected 12 AGND 13 Not connected 14 AGND 15 Not connected 16 AGND 17 Not connected 18 AGND 19 Not connected [...]

  • Page 18

    Connectors 2-9 Getting Started Reference Designator Description Pin Number Function J7 EVM power 1 5 V 2 – 12 V 3 0 V 4 12 V J8 Analog output option, 1 No output g, 26-pin DIL header 2 AGND 3 Analog output for one-channel DAC 4 AGND 5 Not connected 6 AGND 7 Not connected 8 AGND 9 Not connected 10 AGND 11 Not connected 12 AGND 13 Not connected 14 [...]

  • Page 19

    Connectors 2-10 Reference Designator Description Pin Number Function J9 Analog input option 1 Noninverting input signal to dual operational amplifier , (2) g for universal o p erational-am p lifier 2 Noninverting input signal to dual operational amplifier , (2) opera ti ona l -amp lifi er evaluation board, SIL 3 Inverting input signal to dual opera[...]

  • Page 20

    ADC and DAC Direct Access 2-1 1 Getting Started 2.5 ADC and DAC Direct Access J10 and J1 1 offer users the facility to directly inspect the digital signals coming from and going to the ADC and DAC. Reference Designator Description Pin Number Signal J10 Allows the user direct access to all digital signals for the ADC 1 Digital ground gg 2 SDO 3 Digi[...]

  • Page 21

    Host Communication 2-12 2.6.1 Common Connector Reference Designator Description Pin Number Function J16 80-pin memory interface connector for ’ C5000 and ’ C6000 DSK 1 5 V y EVMs. Pins unused by this EVM are omitted for clarity . 2 5 V 11 PCI ground 12 PCI ground 21 5 V 22 5 V 29 PCI ground 30 PCI ground 31 PCI ground 32 PCI ground 41 3.3 V 42 [...]

  • Page 22

    Host Communication 2-13 Getting Started Reference Designator Description Pin Number Function J17 80-pin peripheral and control connector for ’ C5000 and ’ C6000 1 12 V DSK EVMs. Pins unused by this EVM are omitted for clarity . 2 – 12 V 3 PCI ground 4 PCI ground 5 5 V 6 5 V 7 PCI ground 8 PCI ground 9 5 V 10 5 V 35 FSX 33 CLKX 36 DX 25 PCI gr[...]

  • Page 23

    Host Communication 2-14 2.6.2 Legacy Connector J12, J13, and J15 are three 2x20 headers daisy-chained together and are collectively referred to as the legacy connector . The principle behind this arrangement is to eliminate the confused and untidy custom cabling that is typically present when connecting a legacy DSP to an EVM. This daisy-chained co[...]

  • Page 24

    Host Communication 2-15 Getting Started Consider a host cable signal assignment as shown below: Host Connector Pin No. Signal Pin No. Signal 1 NA 2 DGND 3 NA 4 DGND 5 CLKX 6 CLKR 7 TOUT 8 DGND 9 DX 10 DR 11 FSX 12 FSR 13 NA 14 DGND 15 XF 16 DGND 17 NA 18 NA 19 NA 20 CLKS The host connector mates with J12. Signals on either side of J12 are available[...]

  • Page 25

    Host Communication 2-16 For clarity , the above table can be redrawn with J12 removed. J13 J15 Pin No. Signal Pin No. Signal 2 NA 1 DGND 4 NA 3 DGND 6 CLKX 5 CLKR 8 TOUT 7 DGND 10 DX 9 DR 12 FSX 11 FSR 14 NA 13 DGND 16 XF 15 DGND 18 NA 17 NA 20 NA 19 CLKS The table below shows the signal names and pin assignments that the composite connector shown [...]

  • Page 26

    Host Communication 2-17 Getting Started All of the signals required to interface the EVM to the host are now available on either J13 or J15. This is simply a matter of wire-wrapping in the following way: J13 Wire Wrap J13 Pin No. Signal Pin No. Signal 2 NA 4 NA 6 CLKX 3 CLKX 8 TOUT 19 TOUT 10 DX 7 DX 12 FSX 11 FSX 14 NA 16 XF 1 XF 18 NA 20 NA J15 W[...]

  • Page 27

    Host Communication 2-18 All of these connectors are shown below: Reference Designator Description Pin Number Signal Name/Function J12 20-pin connector 1 J13 pin 2 2 J15 pin 1 3 J13 pin 4 4 J15 pin 3 5 J13 pin 6 6 J15 pin 5 7 J13 pin 8 8 J15 pin 7 9 J13 pin 10 10 J15 pin 9 11 J13 pin 12 12 J15 pin 1 1 13 J13 pin 14 14 J15 pin 13 15 J13 pin 16 16 J15[...]

  • Page 28

    Host Communication 2-19 Getting Started Reference Designator Description Pin Number Signal Name/Function J13 20-pin signal connector 1 ADC select signal 2 J12 pin 1 3 CLKX/transmit clock 4 J12 pin 3 5 CLKR receive clock 6 J12 pin 5 7 DX/data transmit 8 J12 pin 7 9 DR/data receive 10 J12 pin 9 11 FSX/frame sync transmit 12 J12 pin 1 1 13 FSR/frame s[...]

  • Page 29

    Host Communication 2-20 Reference Designator Description Pin Number Signal Name/Function J15 20-Pin connector 1 J12 pin 2 2 DGND 3 J12 pin 4 4 DGND 5 J12 pin 6 6 DGND 7 J12 pin 8 8 DGND 9 J12 pin 10 10 DGND 11 J12 pin 12 12 DGND 13 J12 pin 14 14 DGND 15 J12 pin 16 16 DGND 17 J12 pin 18 18 DGND 19 J12 pin 20 20 DGND[...]

  • Page 30

    A-1 Bill of Materials, Board Layout, and Schematics Bill of Materials, Board Layout, and Schematics This appendix contains the bill of materials, board layouts, and the EVM schematics. Appendix A[...]

  • Page 31

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 11 4 Block Di agram DATE: 28-Nov-2001 Block Di agram 6430333 A4 J6 J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 J4 J2 J5 +S upply Gro und -S upply VRE F P [...]

  • Page 32

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 21 4 Power & Re ference DAT E: 28-Nov-2001 Power & Re ference 6430333 A4 +S upply Gro und -S upply +VI N REF_IN -VI N +Vs -Vs +DV dd +DVdd Power VRE F P EXT _V REFP 1 2 3 FL4[...]

  • Page 33

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 31 4 Power DAT E: 28-Nov-2001 Pow er 6430333 A4 +VI N REF_IN -VI N IN 3 IN 4 PG 8 SENSE / FB 7 OUT 6 OUT 5 /ENA 2 GND 1 U6 TPS77801D D2 + C26 4.7u F D1 Green R17 1K C27 0.1u F R18 20[...]

  • Page 34

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 41 4 Referenc e DAT E: 28-Nov-2001 Referenc e 6430333 A4 +VI N VRE F P W16 EXT _REFP TP10 RV9 10k R29 10K W17 R66 4k R65 6k R67 10K +Vi n 2 NR 8 REF G ND 7 GND 4 TRIM 5 Vou t 6 Temp [...]

  • Page 35

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 51 4 ADC DAT E: 28-Nov-2001 ADC 6430333 A4 In _0 ADC_Data_out C19 10uF C22 0.1u F +AVd d VRE F P SENSE R19 0 In _1 W10 W12 CS* or CS*/ F S 1 Vref 2 AGND 3 AIN o r AIN 0 or AIN ( + ) [...]

  • Page 36

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 61 4 DAC DAT E: 28-Nov-2001 DAC 6430333 A4 AO UT _A VRE F P DAC_Data_in SCLK 2 CS* 3 FS/OUTA 4 OUT /OUT B 7 REF 6 AGND 5 Vcc 8 DIN 1 U8 SOCKETED D AC W18 B204+ 1 B203+ 2 B202- 3 B201[...]

  • Page 37

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 71 4 Output conditioning DAT E: 28-Nov-2001 DAC Out put 6430333 A4 +Vs -Vs RV11 100K R35 4.7K C52 R31 NI DAC_OUTA OUT A +Vs -Vs RV8 100K R26 4.7K C36 R22 NI DAC_OUT OUT /OUT B R21 0 [...]

  • Page 38

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 81 4 U ser connec tors D ATE: 28-N ov-2001 U ser Conn ectors 6430333 A4 CLKX DX FSX XF DR FSR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 J13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 [...]

  • Page 39

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 91 4 Dig ital Inte rface DATE: 28-N ov-2001 Di g i tal In terface 6430333 A4 DSP_DX DSP_X F ADC_D ata _out DSP_TOUT R40 33 DSP_F SX DSP_F SR DSP_CLKR J14 DSP_CLKS R46 49.9K DA C_D at[...]

  • Page 40

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 10 14 S tand Alone Mode DATE: 28-N ov-2001 S tand Alone 6430333 A4 LCL_CS _AD C* DSP_DR DSP_DX DSP_XF SAM * DSP_DX DSP_XF DA C_D ata_i n ADC_D ata _out DAC_Data_in ADC_CS* ADC_Data_o[...]

  • Page 41

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 11 14 Input configuration DA TE: 28-Nov-2001 Input Config uration 6430333 A4 W1 BNC_0 IDC_0 B204+ 1 B203+ 2 B202- 3 B201- 4 B2_OU T 5 B2_FLT 6 B2/SD 8 A201- 18 A2/ S D 11 A202- 17 A2[...]

  • Page 42

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 12 14 S ig nal Generator D ATE: 28-N ov-2001 Sig n a l Ge n e r a t o r 6430333 A4 -V s +V s R60 49.9K C17 1nF +V s +V s Te st Signal 0 Sin e Ou t 2 Tria n gle Ou t 3 S quare Out 9 V[...]

  • Page 43

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 13 14 Prot otype Area DA TE: 28-Nov-2001 Prot otype Area 6430333 A4 BB_Output_1 IN_1 BB_Output_0 IN_0 TP1 TP 2 TP3 TP 4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PT1 2 040500 Joe Pu rvis Joe [...]

  • Page 44

    12 34 A B C D 4 3 2 1 D C B A  12500 TI Boul evard . Dal l as, Texas 75243 TI TL E: SHEET : OF: FILE: SI ZE: REV: Drawn By: Engineer: DO C UMENT C O NT R O L # : 14 14 S ig nal Conditi oning DAT E: 28-Nov-2001 S ig nal Conditi oning 6430333 A4 OUT _1 IN_1 R3 NI R4 0 -V s +V s RV2 100K OUT _0 IN_0 R1 NI R2 0 -V s +V s RV1 100K C37 0.1u F C4 0.[...]