Texas Instruments TPA3200D1 manual

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Table of contents for the manual

  • Page 1

    www.ti.com FEATURES DESCRIPTION LRCK 1.0 m F Control Inputs DGND Gain Select +5V Channel Select { BCK GAIN0 VCOM DA T A FORMA T SCLK GAIN1 LR_SEL VDD SHUTDOWN VCLAMP PGND Shutdown Control +18V MUTE DEMP Z ERO A VCC 10 m F { Zero Input Flag FL T1 FL T2 22 nF COSC AGND ROSC VREF BYP ASS 220 pF 1 m F 1 m F 120 k W 0.22 m F BSN 51 W OUTN 0.22 m F BSP O[...]

  • Page 2

    www.ti.com ABSOLUTE MAXIMUM RATINGS DISSIPATION RATINGS TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS PACKAGED DEVICE [...]

  • Page 3

    www.ti.com RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 PARAMETER PIN NAME MIN MAX UNIT PVCC, VCC 8 18 V SS Supply voltage VDD 4.5 5.5 SHUTDOWN, GAIN0, GAIN1, BCK, SCLK, DATA, V IH High-level input voltage 2 LRCK, FORMAT, MUTE, DEMP V SHUTDOWN, GAIN0, GAIN1, BCK, SCLK, DATA, V IL [...]

  • Page 4

    www.ti.com FORMAT CHARACTERISTICS ELECTRICAL CHARACTERISTICS OPERATING CHARACTERISTICS TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 All specifications at T A = 25 ° C, V DD = 5 V, f S = 44.1 kHz, system clock = 384 f S and 24-bit data, unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 24 Bits Data Audio-data int[...]

  • Page 5

    www.ti.com Audio Serial Port Serial Control Port 4x/8x Oversampling Digital Filter and Function Control Multi-Level Delta-Sigma Modulator Audio Serial Port System Clock BCK LRCK DA T A FORMA T MUTE DEMP SCLK DAC and 2:1 Mux LR_SEL VCOM Gain Adjust − + + − Gain Adjust FL T1 FL T2 _ + _ + _ + _ + Deglitch Logic Deglitch Logic Gate Drive Gate Driv[...]

  • Page 6

    www.ti.com 1 BCK SCLK 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC LRCK DA T A DGND VDD LR_SEL VDD DGND VCOM GAIN0 GAIN1 SHUTDOWN PGND VCLAMP NC BSN PVCC OUTN OUTN PGND PGND FORMA T MUTE DEMP DGND ZERO DGND FL T1 FL T2 VCC VREF BYP ASS COSC ROSC AGND AGND BSP PVCC OUTP [...]

  • Page 7

    www.ti.com TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 Terminal Functions TERMINAL I/O DESCRIPTION NO. NAME 1 BCK I Bit clock input for audio data 3 DATA I Audio data input 4 LRCK I Left and right channel audio data latch enable input Select left-channel or right-channel data 7 LR_SEL I HIGH: Left channel active LOW: Right channel active [...]

  • Page 8

    www.ti.com TYPICAL CHARACTERISTICS 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 10m 10 100m 200m 1 2 T otal Hormonic Distortion Plus Noise − % P O − Output Power − W 20 Hz 1 kHz 10 kHz V CC = 12 V R L = 8  Gain = 18 dB f S = 48 kHz 24−bit, I 2 S format 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 10m 10 100m 200m 1 2 T otal Hormonic Distortion Plus Noise [...]

  • Page 9

    www.ti.com 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 20k 100 200 1k 2k 10k P O = 1 W T otal Hormonic Distortion Plus Noise − % f − Frequency − Hz V CC = 12 V R L = 8  Gain = 18 dB f S = 48 kHz 24−bit, I 2 S format P O = 5 W P O = 500 mW 0.01 20 0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 20k 100 200 1k 2k 10k T otal Hormonic Distortion Plus Noise [...]

  • Page 10

    www.ti.com 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 20 20k 50 100 200 500 1k 2k 5k 10k THD + N - T otal Harmonic Distortion + Noise - % f - Frequency - Hz V = 12 V CC R = 4 L Ù Gain = 18 dB f = 48 kHz S 24-Bit, I S format 2 P = 2 W o P = 200 mW o P = 7.5 W o −70 −60 −50 −40 −30 −20 −10 0 20 100 1 k 10 k 20 k f − Frequency − Hz PSRR ?[...]

  • Page 11

    www.ti.com 5 7 9 1 1 13 15 17 19 21 3.6 4 5 6 7 8 9 10 V CC = 18 V V CC = 15 V V CC = 12 V − Maximum Output Power − W P O Z L − Load Impedance − Ω T A = 45 ° C 5 7 9 1 1 13 15 17 19 21 3.6 4 5 6 7 8 9 10 V CC = 18 V V CC = 15 V V CC = 12 V − Maximum Output Power − W P O Z L − Load Impedance − Ω T A = 60 ° C f – Frequency –[...]

  • Page 12

    www.ti.com APPLICATION INFORMATION 1 m F 1 m F 220 pF VCC PGND and DGND connected at power supply Shutdown Control { VDD GAIN0 VCOM GAIN1 VCC 120 k W NC DGND VDD LRCK DGND BCK DA T A LR_SEL VDD SHUTDOWN PGND PGND VCLAMP BSN OUTN OUTN PGND PVCC NC 0.1 m F 1 m F 51 W 0.22 m F OUTN Ferrite Bead 1 nF OUTP Ferrite Bead Ferrite Bead 1 nF 0.22 m F 22 m F [...]

  • Page 13

    www.ti.com SYSTEM CLOCK INPUT t (SCK H) t (SCY) System Clock (SCK) t (SCK L) 2.0 V 0.8 V H L AUDIO SERIAL INTERFACE TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 APPLICATION INFORMATION (continued) The TPA3200D1 requires a system clock for operating the digital interpolation filters and multilevel delta-sigma modulators. The system clock is[...]

  • Page 14

    www.ti.com AUDIO DATA FORMATS AND TIMING DA T A t (BC H) 1.4 V BCK LRCK t (BC L) t (LB ) t (BC Y) t (DS) t (D H) 1.4 V 1.4 V t (BL ) TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 The TPA3200D1 supports I 2 S and 16-bit-word right-justified. The data formats are shown in Figure 20 . Data formats are selected using the FORMAT pin on the TPA32[...]

  • Page 15

    www.ti.com LRCK (2) I 2 S Data Format; L-Channel = LOW , R-Channel = HIGH 1/f S (= 32 f S , 48 f S, or 64 f S ) (1) 16-Bit-W ord Right Justified 1/f S (= 48 f S or 64 f S ) MSB LSB 16-Bit Right-Justified, BCK = 32 f S 16-Bit Right-Justified, BCK = 48 f S or 64 f S MSB LSB L-Channel R-Channel BCK DA T A 14 15 16 1 2 3 14 15 16 14 15 16 1 2 3 14 15 1[...]

  • Page 16

    www.ti.com REGISTER CONTROL OVERSAMPLING RATE CONTROL VCOM OUTPUT TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 The digital functions of the TPA3200D1 are controlled by 4 terminals. Table 2 shows selectable data formats, Table 3 shows de-emphasis control, Table 4 shows mute control, and Table 5 shows channel-output select. Table 2. Data For[...]

  • Page 17

    www.ti.com CLASS-D OPERATION Traditional Class-D Modulation Scheme 0 V −12 V +12 V Current OUTP Differential V oltage Across Load OUTN TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 This section focuses on the class-D operation of the TPA3200D1. The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differe[...]

  • Page 18

    www.ti.com TPA3200D1 Modulation Scheme 0 V −12 V +12 V Current OUTP OUTN Differential V oltage Across Load 0 V −12 V +12 V Current OUTP OUTN Differential V oltage Across Load Output = 0 V Output > 0 V TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 The TPA3200D1 uses a modulation scheme that still has each output switching from ground [...]

  • Page 19

    www.ti.com Maximum Allowable Output Power (Safe Operating Area) 5 7 9 1 1 13 15 17 19 21 3.6 4 5 6 7 8 9 10 V CC = 18 V V CC = 15 V V CC = 12 V T A = 25 ° C, 10% THD Maximum Z L − Load Impedance − Ω − Output Power − W MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE P O Driving The Output Into Clipping P O(10% THD)  P O(1% THD)  1 . 25 (1) O[...]

  • Page 20

    www.ti.com 1 nF Ferrite Chip Bead OUTP OUTN Ferrite Chip Bead 1 nF 4 or Greater W 0.22 µ F 15 µ H 15 µ H OUTP OUTN 4 Ω Ferrite Chip Bead Ferrite Chip Bead 1 nF 1 nF 0.22 µ F 1 µ F 0.1 µ F 0.1 µ F 33 µ H 33 µ H OUTP OUTN 8 Ω Ferrite Chip Bead Ferrite Chip Bead 1 nF 1 nF 0.47 µ F SHORT-CIRCUIT PROTECTION TPA3200D1 SLOS442A – MAY 2005 [...]

  • Page 21

    www.ti.com THERMAL PROTECTION THERMAL CONSIDERATIONS: OUTPUT POWER AND MAXIMUM AMBIENT TEMPERATURE T Amax  T Jmax   JA P Dissipated where : T Jmax  150  C  JA  1 derating f actor  1 0.0391  25.6  C (2) Efficiency   8 5% for an 8 −  loa d P Dissipated  P O(average)   1 Efficiency  1  Efficiency[...]

  • Page 22

    www.ti.com POWER SUPPLY DECOUPLING BSN AND BSP CAPACITORS BSN AND BSP RESISTORS VCLAMP CAPACITOR MIDRAIL BYPASS CAPACITOR VREF DECOUPLING CAPACITOR SWITCHING FREQUENCY f s  6.6 R OSC C OSC (5) TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 The typical output voltage, measured across the load, is also given in Table 6 at each of the gain s[...]

  • Page 23

    www.ti.com SHUTDOWN OPERATION USING LOW-ESR CAPACITORS PRINTED-CIRCUIT BOARD (PCB) LAYOUT TPA3200D1 SLOS442A – MAY 2005 – REVISED JULY 2005 The TPA3200D1 employs a shutdown mode of operation designed to reduce supply current (I CC ) to the absolute minimum level during periods of non-use for battery-power conservation. The SHUTDOWN input termin[...]

  • Page 24

    PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) TPA3200D1DCP NRND HTSSOP DCP 44 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPA3200D1DCPG4 NRND HTSSOP DCP 44 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPA3200D1DCPR NRND H[...]

  • Page 25

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPA3200D1DCPR HTSSOP DCP 44 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 1[...]

  • Page 26

    *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA3200D1DCPR HTSSOP DCP 44 2000 346.0 346.0 41.0 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 2[...]

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  • Page 29

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders[...]