Intel PXA27X manual

Intel® PXA27x Process or Family Power Requirements Application Note Order Num ber: 2800 05 -002[...]

ii Applicati on Note INFORMA TION IN THIS DOCUMENT I S PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LIC ENSE, EXPRESS OR IM PLIED, BY ESTOPPEL O R OTHERWISE, TO ANY INTELL ECTUAL PROPERTY RIGH TS I S GRANTED BY THIS DOCUMENT . EXCEPT AS PROVIDED IN INTEL'S TERMS AND CON DITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSU MES NO LIABILITY WHA TSO[...]

Ap pl ica tio n No te iii Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Co nten ts Cont en ts 1.0 Introduct ion ..... ...... .......... .......... ....... ....... ...... ....... ....... ...... ....... ....... ...... .......... .......... ....... ....... ...... . 5 1.1 Naming C onvent ions .... ....... ...... ....... ....... ...... ...[...]

iv Application Note Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts Con tent s 7.2 nBATT _FAULT ...... ....... ...... ....... ....... ...... ....... ....... ...... ....... ....... ...... ....... .......... .......... ....... .. 32 8.0 Power Ma nagement Int egrated C ircuit Require ments ......... .......... ...... ....... ....... ...... .[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 5 1.0 Introduction The I ntel® PXA 27x Process or Family (PXA27x processo r) is a highly integrate d sys tem-on-chip opti m i zed f o r h a ndheld battery- powered devices such as PDAs and 2.5 G o r 3G cell phon es. The PXA 27x pro cessor is ideal for p roduct s requ[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 6 Application Note The terms run m o de and no rm al m ode are us ed interchangeab ly , although nor mal mode comprises both the run -mode and tur bo-m ode settin gs. 2.0 Intel® PXA27x Processor Pow er Supply Domains V iewed ex ternall y , the main o r backup ba ttery power s ten pow er -su[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 7 Figure 1. I n tel® PXA27x Proces sor Internal and External Pow er Domains SRAM 0 VCC_ R0 SRAM 1 VCC_ R1 SRAM 2 VCC_ R2 SRAM 3 VCC_ R3 RT C 32.768 k CPM 32.768 k PXT AL 13 M TXT A L 32.768 k PW R_I 2 C 13 M Tim er 13 M SSPs 13 M PWM s 13 M I 2 C 32.842 M ICP 48.000 [...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 8 Application Note 2.1 Power Domain s and S ystem V o lt age/C urrent Requ ireme nt s The fo llowin g sectio ns doc ument th e p ower r equirem ents for the PXA2 7x pro cesso r, but do not includ e exter nal support, me m o ry , o r oth er peripheral comp onents. The pow er consum ption valu[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 9 T a ble 2. Intel ® PXA2 7x Proc es sor V ol t ag e Doma ins (Shee t 1 of 2) V oltage Description VCC _BA TT BA TTERY VOL T A GE: V oltage-limited pow er from the main battery , or di rectly from a back up battery , at nominal 3.0 V (±25%). V CC_BA TT must be suppl[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 10 Application Note 2.1.2 Power Supply Configuration in a Minimal System For m inimal sy s t ems, only five (four if VCC_US IM is disab led ) reg ulator s are re quire d to pow er the PXA27x pro cessor an d its in p ut/outpu t interfaces , as shown in Ta b l e 3 . VCC_IO Fixed 3.0 V or 3.3 V[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 11 More comp lex syste m s mi ght requ ire fur the r sepa ration o f supply do mains and addit iona l regu lators. Indepen dent PXA27x po wer d omains provide flexibil ity w hen su pport ing pe ripherals with dif fer ent I /O volt ages, w hich makes i t possib le to r[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 12 Application Note Note : The f igur es in Ta b l e 4 whe re taken f rom a sys tem wit h no enhance d power manag ement optim ization suc h as Intel W ireless Speeds tep (which allows c ontrol over the PXA27x p rocessors low power mode s an d dynamically selectab le frequenc y and voltage c[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 13 For each I/ O d o m ai n, max imum current draw and power use is highest at the 3.3 V su pply as sho wn. For lower vol tage s (2.5 V , or 1. 8 V) maximu m curr ent draw an d power use is re duced fo llo win g the P=CV 2 F rela tionsh ip. Note : Use these specif ica[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 14 Application Note these sup plies must come up at the requi red voltage to oper ate reliably an d to avoid damage to the external com ponents. VCC_ IO must be the hi ghest potential o f the system I /O supplies 1 . VCC _IO can be co nnected to a ny of VCC_LC D, V CC_MEM, VCC_US IM, VCC_U S[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 15 The system sche m at ic in Fi gur e 2 sho ws one rec ommende d config uratio n for c onnect ing the PXA27x process or directly t o the backup battery . In s uch a co nfiguration , the r egulate d main batter y powers VCC_B A TT through regulato r U7, and the backu [...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 16 Application Note Figure 2. T ypica l Battery and External Regulator Co nfiguration PXA27x Processor[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 17 3.0 Int el® PXA27x Proces sor Low Pow er O per ating Mode s Th e P XA27x pro cess or provid es severa l low -powe r opera ting mod es th at tempo raril y suspen d or powe r d o wn th e core or per ipherals to reduce p ow e r consumption. The external pow er suppli[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 18 Application Note 4.0 Power Controller Interface Signals The PX A27x proc esso r has an inter nal powe r mana ger uni t (PMU) a nd a set of I/O signal s for communicatin g with an external po wer man agement integrat ed circuit (PMI C). These signals are active f or initi al power up, cert[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 19 4.1 Power Enable (P WR_EN) PWR_EN i s an acti ve-high outp ut from th e PXA27x proce ssor (inpu t to th e PMIC) that e nables t he exter nal core power s u pplies (VCC_C ORE, VCC_SRAM , and VCC_PLL) . De-asser ting PWR_EN infor ms the externa l regulator that th e [...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 20 Application Note 4.4 P ower Manager I 2 C Dat a (PWR_SDA) / GPIO<4>) The PWR_S DA signa l is the power manager I 2 C data signal to the ex ternal PMIC. I t function s like an open-dr ain signal so either co m p onent can pull it dow n to a logic-low leve l. 4.5 S ystem-Lev el Consid[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 21 ass ertio n of nRESET for a mi nimum of 5 0 ms. This typ e of reset wo uld be used on ly for a s evere and other wise unrecoverabl e hardware or softw are problem, becau s e i t com pletely resets the s tate of th e process or and may result in lo st data. Refer to[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 22 Application Note The PX A27x proc esso r has a low-powe r DC-to -DC c onvert er th at is enab led by so ftwar e wh ile in sleep or deep-s leep mode. Enabling the low -power DC-to -DC converter further reduces power consu mption by shu tting of f the high- power r egulato rs on the PMI C, [...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 23 5.1.2 Initial Power U p and Deep Sleep Exit S equence As sh own in Fig ure 2 , the ext ernal powe r manage ment inte grate d circuit (PMIC ) supplies both high -volt age (I/O) and low -volta ge (internal ) power to the PXA 27x pro cessor . The ex ternal vo ltage re[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 24 Application Note Note : The n RESET signal must be ass erted earlier in the reset seq uence for the processo r . Refer to the Intel® PXA2 7x Pr ocessor Family Elec trical, Mechani cal, and Therm al Specifi cation fo r pow er-on reset t iming sp ecifications. The seque nce for initi al ( [...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 25 1 . The PMI C a ss ert s nRES ET . 2. The PXA27x processor a sserts the nRESET_OUT 1 sig nal. The time between nRESET asser tion and nRESET_ OUT as sertion depen ds on whet her th is event t he P XA27x pr ocesso r was previous ly runnin g or wheth er this is an ini[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 26 Application Note Note : 1 ) nRE SET _OU T asse rti on is soft war e progr am mab le du rin g proce sso r rese ts. Re fe r to the Inte l® PXA27x Pro cessor Family Developer’ s Manual . Figure 4. Intel® PXA27x Proce ssor Power Manage r S lee p Reset St ate Diagram No rma l Ru n Mode Dee[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 27 5.2 Slee p and D eep Slee p Th e sle ep and deep- sleep mode s reduce power co nsumpti on by pow ering do wn most un its in the PXA27x pro cessor. Howev er, the real-time clo ck, timekee ping oscillato r (32.768 kHz), a nd PMU circu its remain active. The proc esso[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 28 Application Note Th e p rocess or comma nds ent ry into slee p m ode by de-ass ertin g PWR_EN to the PMIC once th e PMIC and system are prepar ed. The PMIC respon ds by turni ng off the specif ied set of supplies alon g w ith V CC_COR E, V CC_PL L, an d VCC _SRA M. Fo r ent ry in to s lee[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 29 Note : If the P MIC d oes not d isable VC C_CORE , VC C_PL L, or VCC_ SRA M whe n PW R_EN i s de - asser ted, the PM IC must not di sable a ny of the reg ulators c ontrolled b y SYS_EN when SYS _EN is de-asse rted t o ensure that supply sequen cing requirem ents ar[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 30 Application Note • I 2 C progr ammab le outpu t voltage ram p rate with a defau lt/res et ram p rate of 1 0mV/ µ s . Refe r to t he Intel ® PXA27x Processor Family EM TS fo r ramp ra te speci fic ations The VCC_ CORE regul ator mu st suppor t a minim um set of the se six outp ut volta[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 31 6.3 Power Ma nager I 2 C In ter fa ce The P XA27x proces sor commu nicates with the PM IC using the I 2 C ser ial bus. The flexible I 2 C control ler in the processor can pre-lo ad a bu f fer with a serie s of comma nds, or multi-byt e comm ands of an y size, u p t[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 32 Application Note Sys tem design ers ca n incl ude a s oftware -contro lled thr eshol d level d etect ion fo r nV DD_F AUL T to allow an optio nal SDRAM k eep-alive cap ability . 7.2 nBA TT_F AUL T nBA TT_F AUL T indicat es tha t the main ba ttery is lo w or has been removed from the devic[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 33 8.2 Fea tures o f a PM IC The basic features o f a PM IC f or use w ith the PXA2 7x processo r includ e: • Multipl e chann els of regula ted pow er output • Dyna mic vol tage manag ement ( DVM) ca pabil ity for t he PXA27x pr oce ssor c ore s upply • Debo unc[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 34 Application Note • USB on -the-g o char ge pump whi ch genera tes + 5.0 V (opti onal) The followin g analog/mixed-sig nal features are requ ired in many handheld or batter y-powered systems , and it is a good idea to provide them in a highly inte grated PMIC: • Power supp ly for LCD p[...]

Inte l® P XA27 x P rocesso r Fa mily Pow er Re quirem ents Ap pl ica tio n No te 35 8.3.3 DVM Control and S t atus Register 3 The Co ntrol a nd St atus registe rs con tain the G O bit which, once set , act ivates t he voltage ch ange requ ested by the new vol tage in DVM Contr ol regi ster 1 , at the ramp ra te s p ecified in DVM Contr ol regi ste[...]

Intel ® PXA2 7x Proc essor Fa mily Po wer Req uiremen ts 36 Application Note[...]