National Instruments DIO 6533 manual

DIO 6533 User Manual High-Speed Digital I/O Boards for PCI, PXI, CompactPCI , AT, EISA, or PCMCI A Bus Syst ems July 1997 Edition Part Number 321464B-01 © Copyright 1997 National Instrument s Corporation. All rights reserved.[...]

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Important Information Warranty The PCI-DIO-32HS, PXI-6533, AT- DIO-32HS, and DAQCard-6533 d evices are warranted against defects in materials and workmanship for a period of one year from the dat e of s hipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be d[...]

© Nationa l Instruments Corporation v DIO 6533 Us er Manua l Table of Cont ents About This M anual Organization of This Manual .............. ............ ..... ...... ...... ........... ..... ...... ...... ........... ...... x i Conventions Used in This Manual.................. ................. ........... ................. ................. x i[...]

T able of Cont ents DIO 653 3 User Manu al vi © Natio nal In strume nts C orporati on AT Device Configu ration .................. ................. ................. ........... ................. ............. 2-5 Bus Interface ................. ................. ................. ................. ........... ................. .. 2-5 Plug and Pla[...]

T able of Cont ents © National Instru ments Corpor ation vii DIO 6533 Us er Manual Timing Connections....................... ................. ................. ........... ................. ................. 4 -13 Pull-Up and Pull- Down Connections ............. ................. ................ ................. ............ 4-13 Power Connecti[...]

T able of Cont ents DIO 653 3 User Manu al viii © Natio nal In strume nts C orporati on Appendix A Specific ation s Appendix B Optional Adapter De scriptio n Appendix C Customer Communication Glossary Index Figures Figure 1-1. The Relationship Between the Prog ramming Environment, NI-DAQ, and Your Hardware ............... ................. .......[...]

T able of Cont ents © Nationa l Instruments Corporation ix DIO 653 3 Use r Manual Figure 5-11. Level-ACK Mode Outp ut Timing ....................... ........... ................. ...... 5-13 Figure 5-12. Leading-Edge Mode Input ............ ............ ................ ................. ............ 5-15 Figure 5-13. Leading-Edge Mode Output ....[...]

© National Instruments Corporat ion x i D IO 6 53 3 Us e r M an ua l About This Manual T h is m a n u al d e sc r i b e s the e l e c tri c al a n d m e c h a n i ca l a sp e cts of the DI O 6 533 (f o rmerly calle d D I O - 32HS ) family o f devices, a n d c ontains inf o rmatio n c o ncer ning thei r ope rati o n a n d p ro g ram m i n g. Unle s[...]

About This Ma nual DIO 6533 User Manual xi i © Natio nal In strume nts Corp orati on • Appendi x B, Op tional Adapter De s cription , de scribes the optiona l 68-to- 5 0- p in DIO 65 3 3 d e v ice a da pter. • Appendi x C, Cu stomer Communicatio n , c o ntai n s f or m s y o u can use to req u est h el p fr o m Na ti o nal Instr u ments o r to[...]

About This Ma nual © National Instruments Corporat ion xiii D IO 6 53 3 Us e r M an ua l • Getting Started w ith SCXI —I f you are using SCXI, this is the first manual y ou sho uld r ead. I t giv es an o ve rview of the SC XI sy stem and conta ins the most co mmonly ne eded infor mation for t he modules, chassis, and sof tware. • Your SCXI h[...]

About This Ma nual DIO 6533 User Manual xi v © Natio nal In strume nts Corp orati on Customer Communication National Instrum ents wa n ts to r ece i v e yo u r comments o n o u r p ro d uc ts a n d manuals. We a re i n terested in the ap p licati o ns you develop wi th o ur pr o ducts, and we want to help if you h a v e problems with the m. To mak[...]

© National In strum ents Corp oration 1-1 D IO 6 5 3 3 U s er M an u al Chapter 1 Introduction T h i s chapt e r d e scr ibe s t h e DI O 6533 ( D IO- 32 H S) d e v i ces , l ist s wha t you n eed to get star te d , descri bes optional e q uip m e n t, a n d e x pla i n s how to u npack y our d evice. About the DIO 6533 Devices T h a n k y o u for[...]

Chapter 1 Int roduction DIO 6533 User Manual 1 -2 © Na t ion al I ns tr um en ts C or por at ion Each 653 3 devic e contain s th e N ational Instr uments DAQ-DI O c hip, pr o viding two indepe ndent c h a n nels of d i g ita l i n put and o utput, p attern genera ti o n, and hands h a k i n g. E ac h c h a n nel o f fers t h e f o ll o wing f u n [...]

Chap ter 1 Int roducti on © National In strum ents Corp oration 1-3 D IO 6 5 3 3 U s er M an u al PXI specific features ar e implemented on the J2 connector of the CompactPCI b us. Table 1-1 lists the J2 pin s use d by yo ur PXI-6 533 devic e. Your PXI devi ce is comp atible w ith any Co mpactPCI chassis with a sub-bus that does not drive these li[...]

Chapter 1 Int roduc tion DIO 6533 User Manual 1 -4 © Na t ion al I ns tr um en ts C or por at ion ❑ One of the fo llowing software packages an d documentation: NI-DAQ for PC co mpatibles LabVIE W for Window s LabWindow s/CVI Componen tWork s Virt ualB ench ❑ Appropriate cable: PSHR68-68M (DAQC ard-6533 only) Shielded or r ibbon ca ble (for all[...]

Chap ter 1 Int roducti on © National In strum ents Corp oration 1-5 D IO 6 5 3 3 U s er M an u al Virtual B e n c h fea t u res virtua l instrum ents that c ombine DA Q pr o ducts, softwar e, and your com puter to crea t e a st a nd- alone instrument with the added benefi t of the processing, d i splay, and storage capab i litie s of yo u r comput[...]

Chapter 1 Int roduc tion DIO 6533 User Manual 1 -6 © Na t ion al I ns tr um en ts C or por at ion Figu re 1-1. The Re lationsh ip Between t he Prog ramming Environm ent, NI-D AQ, and Your Hardware You can use your 6533 device, together with other AT (1 6-bit ISA), PCI, PC, EISA, DAQCa rd, and DAQ Pad Series DAQ h ardware, with NI-DAQ software for [...]

Chap ter 1 Int roducti on © National In strum ents Corp oration 1-7 D IO 6 5 3 3 U s er M an u al Optional Equipment National Instr u ment s offers a v ariet y of pr od u ct s to u s e with y o ur 65 3 3 d e v ice, i n clu d ing cable s , c on n ector blocks, and o the r accessor ies, as f o ll o ws: • Cables and cable assemblies, shie l d ed an[...]

Chapter 1 Int roduc tion DIO 6533 User Manual 1 -8 © Na t ion al I ns tr um en ts C or por at ion Unpacking Your 65 33 de vice is ship ped in a n antistatic pac kage to pr even t electrostatic dam age to the device. E lec trostatic disc harge can da mage seve ral comp onent s on the device . To av oid s uch da mage in hand ling the device, take th[...]

© National In strum ents Corp oration 2-1 D IO 6 5 3 3 U s er M an u al Chapter 2 Installation and Configuration This c hapter exp lai ns how to insta ll and co nfigure y our D IO 653 3 device. Software Installation Install your softwa re befor e you install your 653 3 device. Re fer to the appropria te release notes indicated below for spe cific [...]

Chapter 2 Ins tallati on and Configura tion DIO 6533 User Manual 2 -2 © Na t ion al I ns tr um en ts C or por at ion 4. T o uch the meta l part insi d e yo u r c omp u ter to d isc h arge an y static electricit y t h at mig h t be o n y our c lothe s o r bo d y. 5 . I n s e r t t h e PCI - DIO-3 2 HS i n t o a 5 V PCI slot. It m a y b e a tight fi[...]

Chap ter 2 Ins tallatio n and Conf iguratio n © National In strum ents Corp oration 2-3 D IO 6 5 3 3 U s er M an u al 7. V i suall y verify the ins t allation. 8. Plug i n an d turn on th e PXI or Comp a c tPCI chassis. Installing th e AT-DIO-32HS You can install an AT -DIO-32H S in an y availab l e AT (16-bi t ISA ) or EIS A expa nsion slo t in y[...]

Chapter 2 Ins tallati on and Configura tion DIO 6533 User Manual 2 -4 © Na t ion al I ns tr um en ts C or por at ion Figu re 2-1. DAQCard -6533 C ompleted Installa tion Your 65 33 de vice is insta lled. T he d evice is now ready f or sof tware configura tion. PCI, PXI, and DAQCar d Device Configuration The PCI- D IO-32 HS, PXI -6533, and D AQC ard[...]

Chap ter 2 Ins tallatio n and Conf iguratio n © National In strum ents Corp oration 2-5 D IO 6 5 3 3 U s er M an u al AT Device Configuration The plug and pla y feature of the AT-DIO-3 2HS makes it complete ly softwar e configu rable. You ca n use software to co nfigure th e base I/O address, DM A cha nnels, an d in terrupt lev els. Bus Interface [...]

Chapter 2 Ins tallati on and Configura tion DIO 6533 User Manual 2 -6 © Na t ion al I ns tr um en ts C or por at ion Base I/O Address Selection The AT-DI O-32HS de vice can be configur ed to use a base ad dress in the rang e of 10 0 to 3E 0 he x. The A T-D IO-32 HS oc cupie s 1 6 b ytes of address spa ce and must be located on a 16- byte bounda ry[...]

Chap ter 2 Ins tallatio n and Conf iguratio n © National In strum ents Corp oration 2-7 D IO 6 5 3 3 U s er M an u al 240 to 25 F AT-DIO-3 2F – def ault 260 to 27 F Lab-PC/P C+ – defaul t 278 to 28 F AT Parall el Print e r Port 2 (L PT 2) 279 Reserved fo r Plug and Play o perat ion 280 to 29 F WD Et herCa rd+ – defaul t 2A0 to 2BF — 2E2 to[...]

Chapter 2 Ins tallati on and Configura tion DIO 6533 User Manual 2 -8 © Na t ion al I ns tr um en ts C or por at ion Table 2-2 shows the PC AT interrupt assignments. 3C0 to 3C F Enhanced Gra phics Adapter, VGA 3D0 to 3DF Color/Graphics Monitor Adap ter, VGA 3E0 to 3EF — 3F0 to 3F7 Disk ette C ontroll er 3F8 to 3FF Serial Port 1 ( COM1) A79 Reser[...]

Chap ter 2 Ins tallatio n and Conf iguratio n © National In strum ents Corp oration 2-9 D IO 6 5 3 3 U s er M an u al Table 2-3 shows the PC AT 16- bit DMA chan nel assignmen ts. Note : EISA computers also have channels<0.. 3> available as 16-bit DMA channels. 3 Serial Port 2 (COM2) BSC, BSC Alternat e Clus te r (pri mary) PC Network , PC Ne[...]

© National In strum ents Corp oration 3-1 D IO 6 5 3 3 U s er M an u al Chapter 3 Hardware Overview T h is chapter p ro v i d e s an o vervie w of the ha rdwa re f unc tion s of y o ur DI O 6 533 device. Each 6 5 3 3 de vice co n tain s t h e Na tiona l I n stru m e n ts DAQ- DIO chip, a 32-bit g ener a l-pur pose d i g i tal I / O int e rfa c e. [...]

Chapt er 3 Har dware Overvi ew DIO 6533 User Manual 3 -2 © Na t ion al I ns tr um en ts C or por at ion Figur e 3-1. PCI-DIO-32 HS/PXI-65 33 Block Di agram DAQ-DIO Counters and Timers DMA/ Interrupt Requests Handshaking and Control Data Latches and Drivers Data Lines Data Lines (32) (32) MITE PCI Interface PCI I/O Channel EEPROM 20 MHz RTSI RTSI/P[...]

Chap ter 3 Har dware Overview © National In strum ents Corp oration 3-3 D IO 6 5 3 3 U s er M an u al Figur e 3-2. AT-DIO -32HS Bloc k Diagram DAQ-DIO Counters and Timers DMA/ Interrupt Requests Handshaking and Control Data Latches and Drivers Data Lines Data Lines (32) (16) A T Plug and Play Interface A T I/O Channel EEPROM 20 MHz RTSI RTSI Bus O[...]

Chapt er 3 Har dware Overvi ew DIO 6533 User Manual 3 -4 © Na t ion al I ns tr um en ts C or por at ion Figu re 3- 3. DAQCard-65 33 B lock Di agram Unstrobed I/O The 653 3 device s can pe rfor m unstrobe d I/O, w hich is ba sic digital I /O that employ s n o han dshaking or h ardw are -contro lled timing. You ca n write or r ead data di rectly to [...]

Chap ter 3 Har dware Overview © National In strum ents Corp oration 3-5 D IO 6 5 3 3 U s er M an u al Strobed I/O—Patte rn Generation and Handshaking The 6533 dev ices can also pe rform strobe d I/O. Strobed I/O is data transfer in wh ich the 6533 hard ware regula tes timing or pe rforms handshak ing function s. The 6533 dev ices have two handsh[...]

Chapt er 3 Har dware Overview DIO 6533 User Manual 3 -6 © Na t ion al I ns tr um en ts C or por at ion A variant of pattern ge neration is ch a nge de tecti o n . I n c h a n ge d et e cti o n , the 6 533 de v ice ge ne rates a n interna l re quest only w h en t h e inp u t data changes. Th i s fea t ure allows yo u t o monitor activit y on the in[...]

Chapte r 3 Hardware Overview © National In strum ents Corp oration 3-7 D IO 6 5 3 3 U s er M an u al Figu r e 3-4 s h ow s a p atte rn - det ecti o n e x a m ple. F i g u re 3- 4 . P atte rn De t ect i on Examp l e The 6533 device provides the following two types of pattern detection timing: • Compare a l l data to the input pattern immediately,[...]

Chapt er 3 Har dware Overview DIO 6533 User Manual 3 -8 © Na t ion al I ns tr um en ts C or por at ion Th e pat t ern m ask, which s e lec t s th e bi t s tha t ar e signif i can t fo r p a tt e rn detecti o n, a l s o ap p lies to cha nge d ete ctio n . T h e 65 3 3 de v ice m onitors onl y the significa nt b it s for change s . After d etecting [...]

Chapte r 3 Hardware Overview © National In strum ents Corp oration 3-9 D IO 6 5 3 3 U s er M an u al e x pected fr o m t h e perip h er al device. O ne p rotocol, b urst mo d e, also uses PCLK signals. T h e following sectio n s d escri b e t h e ha nd s hakin g pr o toc ols o ffere d by the 6 5 33 devices. Re fer to Tabl e 3- 1 for furthe r inf o[...]

Chapt er 3 Har dware Overview DIO 6533 User Manual 3- 10 © Na t ion al I ns tr um en ts C or por at ion Burst Mode T h e 65 3 3 d e v ice se n d s o r rece ive s a c loc k s i g nal t o or fro m the perip h e r a l d e vi c e over t h e PCL K lin e . Ev ery cycl e , the 65 33 d e vice a sser t s an A C K sign a l i f r e ad y for a tr a nsfer , an[...]

Chap ter 3 Har dware Overview © National In strum ents Corp oration 3-1 1 D IO 6 5 3 3 U s er M an u al Table 3- 1. 6 5 3 3 H andshak ing Protocols Proto col Peak Rates (MS/s) at Various Cable Lengths REQ and ACK Pola rity RE Q E dge That Requests Transfer Progra mmabl e Delay L ocation Comp lem entar y Protocol s 1 m 2 or 5 m Asynchronous Protoco[...]

Chapt er 3 Har dware Overvi ew DIO 6533 User Manual 3- 12 © Na t ion al I ns tr um en ts C or por at ion Starting a Ha ndshaki ng Transfer Starti ng a handsh aking tra nsfer corr ectly prot ects agains t incorrect o r missed data when the ACK and REQ lines are chan ging polarity to active-high or active-low. This is p articularly important in burs[...]

Chapte r 3 Hardware Overview © National In strum ents Corp oration 3-1 3 D IO 6 5 3 3 U s er M an u al Controll ing Lin e Polarities If you canno t control the initia l iza t ion order of the 6533 device and perip h eral devic e, you can still star t a tra nsf er relia bly if y o u sele ct the polarities o f the ACK an d RE Q lines so t hat t he p[...]

Chapt er 3 Har dware Overvi ew DIO 6533 User Manual 3- 14 © Na t ion al I ns tr um en ts C or por at ion • Dire ct-memory access (DMA) tran sfers are faster than interrupt-driven transfer s, especially for pattern genera tion. By default, the software uses DMA if available. ♦ The PCI-DI O-32HS always supp orts DMA transfer s. ♦ The PXI-65 33[...]

© National In strum ents Corp oration 4-1 D IO 6 5 3 3 U s er M an u al Chapter 4 Signal Connections T h is chapter d escri b es how to make in p u t and o u tput si g nal con n ec tions to y our DI O 65 3 3 d e v ice v ia t h e devic e I/O con n ector an d RTSI c onnec t o r . T h e I / O c o nnect o r f or t h e 6 533 device h a s 68 p i ns . Y [...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4 -2 © Na t ion al I ns tr um en ts C or por at ion Figu re 4- 1. 6533 Device I /O Connec tor Pin A ssignmen ts Note : In Figure 4-1, the * indicates that y ou can reverse the pin assignments of the ACK1 (STARTTIG1) and REQ1 pins, or the ACK2 (STARTTIG2) and REQ2 pins, with software. This can b e[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-3 D IO 6 5 3 3 U s er M an u al other dev ice’s REQ p in. W hen y ou excha nge two signals on the I/O connector, yo u also exchange them for RTSI purposes. Signal D escription s Table 4 -1 provides signa l descriptions. E ac h signa l on the 6533 device is refere nced to the G[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4 -4 © Na t ion al I ns tr um en ts C or por at ion 4, 7 STOPTRIG <1..2> Control Group 1 a nd group 2 stop trigg ers—You can use rising or falling edges on these li nes to end patte rn gen erat ion op era tio ns. When n ot configur in g the 6533 de vice for gr oup operati ons, you can use[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-5 D IO 6 5 3 3 U s er M an u al 40 CPU LL Bia s Selection Control pull-up/pull-d own selection—T his input signal selec ts whether th e 6533 dev ice pulls the timing and handshaking control lines (REQ, ACK, PCLK, and ST OPTRI G) up or do wn when undriven. If you connect CPULL [...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4 -6 © Na t ion al I ns tr um en ts C or por at ion Signal Characte ristics Followin g is a list of signa l characteristics. Charac teristic s are for a ll signals, unles s o therwise note d. For si g nal c h ar acteristics not given in this secti o n , se e A p pendi x A , Specifications . • D[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-7 D IO 6 5 3 3 U s er M an u al Control Si gnal Summ ary T h e directi o n and f u nc ti o n o f each g ro u p’s sig n al ti m i n g and hands h a k i n g line s vary, d e p en d in g on the m o de of o perati o n y o u selec t for the gr o up. Ta b l e 4-2 s h ows the directi[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4 -8 © Na t ion al I ns tr um en ts C or por at ion Board and RTSI Cl ocks T h e 6 533 device r eq u ires a fre q u e n cy ti m e b ase to r un t h e h a n dsha king logic and t o g e n erate i n ter v als for p attern ge nerati o n. The fre q uenc y t i mebase must b e 2 0 MHz. Either the 6533 d[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-9 D IO 6 5 3 3 U s er M an u al Figu re 4-2. RTSI B us Signal Connect ion ♦ PXI-6533 —RTSI trigg er lines 0 through 6 correspond t o PXI tr igger bus lines 0 t hr ough 6 . Data Signal Connections The d igital data signals ar e DIOA<0 ..7>, DI OB<0.. 7>, DI OC<[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4- 10 © Na t ion al I ns tr um en ts C or por at ion Unstrobed I/O For l o w-spee d , u nstr o bed o p er ation, y o u can c o nfi g ure each in d ividua l pin for in p ut, sta n dard out p ut, or wire d-OR out p ut. Fi g ur e 4-3 sh o ws DIOA<0. . 3 > c o nfi g ured for in p ut, D I O A<[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-1 1 D IO 6 5 3 3 U s er M an u al Figur e 4-3. Exa mple of Data Si gnal Co nnec tions LED +5 V TTL Signal +5 V DIOA<4..7> DIOB<0..3> DIOA<0..3> GND Switch I/O Connector GND +5 V Switch DPULL +5 V Open-Collector TTL 6533 Device[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4- 12 © Na t ion al I ns tr um en ts C or por at ion For unstrobed ope rations, you ha ve a choice of two types of output drivers: s tandard a nd wired- OR. A standard d river drive s its output p in to approxima tely 0 V for logic low, or +5 V for log ic hig h. A standa rd driver ha s sever al a[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-1 3 D IO 6 5 3 3 U s er M an u al Strobed applications include digita l data ac quisi t ion, digita l waveform generati o n, and da ta tra n smission to or from an exter n al device . Timing Connections T im i ng conn e c tions inclu de t h e RE Q , AC K ( ST A R T TR I G) , a n[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4- 14 © Na t ion al I ns tr um en ts C or por at ion You s h oul d co n nect DPU LL to + 5 V whe n using any wire d-OR out p ut dri v ers. In other ca ses, y o u can u se the CPULL a n d DPU LL li n es to s e lec t a pow e r-up s t at e that i s inac t iv e in yo ur a ppli c ation. For e x a mple[...]

Chapter 4 Signa l Connections © National In strum ents Corp oration 4-1 5 D IO 6 5 3 3 U s er M an u al Take the following precaution s to ensure a uniform transm i s s i on l ine a n d m inimize n o ise pic k up: • Use twisted-pair wir es to conn ect d i gi t al I/O signals to the device. Twist ea c h dig ital I/ O s i gnal wi t h a GND line. ?[...]

Chapter 4 S ignal Conne ctions DIO 6533 User Manual 4- 16 © Na t ion al I ns tr um en ts C or por at ion Figu re 4-4 . Transmi ssion Line Termin ations The following additional recommendations apply for all signal connec tions to yo ur 653 3 de vice: • Separate 6533 devic e signal lines fro m high-curre nt or high-volta ge lines. These li nes ar[...]

© National In strum ents Corp oration 5-1 D IO 6 5 3 3 U s er M an u al Chapter 5 Signal Timing This chapter provides detailed timing specifications for DIO 6533 pattern gene ration and for the various full, two-way handsh aking modes. Pattern-Generation Timing Pattern-gener ation timing is sim ilar for digital data ac quisition (input) and di git[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5 -2 © Na t ion al I ns tr um en ts C or por at ion Requ est Timing Internal Re quests Figur e 5- 2 shows internal r e qu es t timing. You c a n sel e ct a tim ebase and a n interval. The r e qu est pu l ses lo w on ce per d a ta tr ansfer . T h e dur a tion of the lo w pulse i s equa l to one timebase[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-3 D IO 6 5 3 3 U s er M an u al Figu re 5-3. Extern al Re quest Timin g Trigger Tim ing Using pattern- genera tion mode, you can config ure the 653 3 device to accept both start and stop tr iggers. The stop trigge r is the prim ary tr igge r. T he 6533 de vice can tra nsfer specified [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5 -4 © Na t ion al I ns tr um en ts C or por at ion respectively. Usin g o n ly a star t trigger, y o u ca n do p o sttr i g ge r data acqui s ition. A s top trigger enables you to do pre trigger data acqu isition, or combine d pretrigger and posttrigger data acquisition. Af ter detecting the stop trig[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-5 D IO 6 5 3 3 U s er M an u al 6533 devi ce emul ation mode is a supers et of the 82 55 and 82C5 5 protocols. Th e PCI- DIO-32 HS can hand sha ke w ith per iphe ral d evice s that use 8 255 or 8 2C55 hand shaking spec ifications. The 6533 d evice can pe rform back-to- back trans fers[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5 -6 © Na t ion al I ns tr um en ts C or por at ion In input mode , the 6533 d evice assert s the ACK sig nal low whe n ready to acc ep t d at a. The peri ph er al d ev ice can th en str obe d ata in to th e 6 53 3 device by pulsing the REQ line low. T he falling REQ signa l edge cause s the ACK signal[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-7 D IO 6 5 3 3 U s er M an u al In outp ut mode , the 6533 de vice asser ts the A CK signal low when output data is a vailab le. The perip hera l devic e ca n rec eive the da ta on the falling or rising edge of the ACK signa l, or any time in betw een. The peripher al device must resp[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5 -8 © Na t ion al I ns tr um en ts C or por at ion 8255 Emul ation Mo de Tim ing Speci fications Figure 5-7 shows the tim ing diagra m for 8 255 emulation mod e. Figur e 5-7. 8255 Em ulatio n Timi ng Parameter Description Minimum Maximum Input Parameters t r*r REQ lo w dura t io n 75 — t rr* REQ hig[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-9 D IO 6 5 3 3 U s er M an u al Other Asynch ronous Modes Besides 8255 -compatible mo de, the 653 3 device su pports severa l other asynchro nous h andsha king protoc ols: leve l-ACK m ode , le ading-e dge mode, long- pulse mode, and tra iling-edge mod e. These ha ndshaking mode s are[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 10 © Na t ion al I ns tr um en ts C or por at ion Output In outp ut mode , the 6533 de vice raises the A CK signa l afte r driving output data to in dicate new, valid output da ta. The p eripheral de vice can latch the data on the falling or rising edge of the ACK signal, or at any time before retur[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-1 1 D IO 6 5 3 3 U s er M an u al Figur e 5-9 s h ows a n outp u t transf er i n le v el-A C K m o de . F ig u re 5-9. L e ve l -A C K M ode O u t p ut Level-ACK Mode Timing Specifications Figure s 5- 1 0 a n d 5 -11 s h ow the ti m i n g d i a g ram s for le vel- ACK m ode. W ait For[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 12 © Na t ion al I ns tr um en ts C or por at ion Figu re 5-10. L evel-ACK Mode Inpu t Timin g Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— t dir(1) Inp u t data setup to REQ activ e (with REQ-edge l[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-1 3 D IO 6 5 3 3 U s er M an u al Figur e 5-11 . Level-A CK Mode O utput Tim ing Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— Output Parameters t aa* ACK pulse width 225 — t ra* REQ [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 14 © Na t ion al I ns tr um en ts C or por at ion Leadin g-Edge Mode In leading-edge mode, the 6533 dev ice and the peripheral device send each o the r p ulses on the AC K an d REQ lin es. T he le ad ing ed ge of the ACK or REQ pu lse ind icates that the 65 33 devic e or pe riphera l device is read [...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-1 5 D IO 6 5 3 3 U s er M an u al Figure 5-12 shows an input transf er in leading-edge mod e. Figur e 5-12. Lead ing- Edge Mod e Inpu t W ait For Space W ait For REQ Programmable Delay Programmable Delay W ait For REQ When REQ Asserted When 6533 Device Has Space For Data, Input Data* [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 16 © Na t ion al I ns tr um en ts C or por at ion Figur e 5- 1 3 s how s an o u t p ut tr a n sfer in lea d i n g-e d g e m o de. Fig u re 5- 1 3. Le a d i n g -Ed g e M o de Out p ut Leading-Edge Mode Timing Specifications Figure s 5- 1 4 a n d 5 -15 s h ow the timi n g d i a g ram s for le a d i n[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-1 7 D IO 6 5 3 3 U s er M an u al Figur e 5-14 . Leadi ng-Ed ge Mode Input Ti ming Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— t dir(1) Inp u t data setup to REQ activ e (with REQ-edg[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 18 © Na t ion al I ns tr um en ts C or por at ion Figure 5-15. Le ading -Edge Mode Ou tput Timing Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— Output Parameters t aa* ACK pulse width 125 — t r* a* [...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-1 9 D IO 6 5 3 3 U s er M an u al Long-Pulse Mode L o ng-pulse m ode i s a varia nt o f leadin g -edge mode . T he o n ly difference i s the effect of a da ta-sett l ing delay, if used. In long-pulse mode , a pr ogrammable delay, ra t her than delay i ng the AC K pulse , increase s t [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 20 © Na t ion al I ns tr um en ts C or por at ion Figure 5-17 . L o n g- P u l se M o de O u t p ut Long-Pulse Mode Timin g Specifications Figure s 5- 1 8 a n d 5 -19 s h ow the timi n g d i a g ram s for lo n g- p ulse m o de. W ait For Data W ait For REQ Programmable Delay Programmable Delay W ait[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-2 1 D IO 6 5 3 3 U s er M an u al Figur e 5-18. Long-P ulse Mode Inpu t T imin g Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— t dir(1) Inp u t data setup to REQ activ e (with REQ-edge [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 22 © Na t ion al I ns tr um en ts C or por at ion Figur e 5-19. Long-P ulse Mod e Ou tput Timing Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t ar ACK to next REQ 0— Output Parameters t aa* ACK pulse width 125 1 — t r*do [...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-2 3 D IO 6 5 3 3 U s er M an u al Trailing-Edg e Mod e In tr ailing -edge m ode, the 65 33 de vice and the peri pheral device send each o the r pulse s on the AC K an d REQ lines. The tr ailing ed ge of the ACK or REQ pu lse ind ica tes that the 6533 de vice or periphe ral de vice is [...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 24 © Na t ion al I ns tr um en ts C or por at ion Figure 5-20 s hows an input tra nsf er in tra ilin g-edge mod e. Figur e 5-20. Trail ing-E dge Mod e Inpu t W ait For Space W ait For REQ Programmable Delay Programmable Delay W ait For REQ When REQ Unasserted When 6533 Device Has Space For Data, Inp[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-2 5 D IO 6 5 3 3 U s er M an u al Figur e 5- 2 1 shows a write tra nsfer i n trailing edge m ode. Figure 5-21 . T ra i l i n g -E d ge M o de O u t p ut Trailing-Edge Mode Timing Specificatio ns Figure s 5- 2 2 a n d 5 -23 s h ow the ti m i n g d i a g ram s for tra iling- e d ge mo d[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 26 © Na t ion al I ns tr um en ts C or por at ion Figur e 5-22. Tra iling -Edge M ode Input Timing Parameter Description Minimum Maximum Input Parameters t rr* REQ puls e width 75 — t r*r REQ inactive duration 75 — t dir* Input data s e tup to REQ inactive (with REQ-edge latching) 0— t r*di In[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-2 7 D IO 6 5 3 3 U s er M an u al Figur e 5-23. Trail ing-Ed ge M ode O utput Ti ming Burst Mo de Burst mode is a synchronous, or clocked, protocol. The data transmitter and receiv er share a clock signal over the PCLK lin e. In ever y cloc k cycle, the 6533 dev ice asserts the ACK si[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 28 © Na t ion al I ns tr um en ts C or por at ion deasser ting the A C K or REQ sig n al, res p ectivel y . Ever y cloc k c y cle in which b o th the ACK an d REQ s i g nals ar e high transfe rs one d ata p o int. T h e 65 3 3 d e v ice ca n either drive an o u tput cloc k signa l o nto t h e PCLK l[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-2 9 D IO 6 5 3 3 U s er M an u al Figur e 5-25 . Outp ut Burs t Mode Tran sfer Exa mple PCLK ACK REQ Data Out D1 D2 D3 D4 D5[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 30 © Na t ion al I ns tr um en ts C or por at ion Figu re 5- 26. Burs t Mode Output Timing (Defau lt) Parameter Description Minimum Maximum Input Parameters t pc PCLK cycle time 50 — t pw PCLK hi gh pu lse d urati on 20 — t pl PCLK low pulse duration 20 — t rs Setup time from REQ valid to PCLK[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-3 1 D IO 6 5 3 3 U s er M an u al Figur e 5-27. Burst M ode I nput Ti ming (D efault) Parameter Description Minimum Maximum Input Parameters t rs Setup time from R E Q valid to PC LK 12 — t rh Hold tim e from PC LK to R EQ invali d 0— t dis Setup time f rom inpu t data vali d to P[...]

Chapter 5 S ignal Timing DIO 6533 User Manual 5- 32 © Na t ion al I ns tr um en ts C or por at ion Figure 5-28. Burst Mode Outp ut Timi ng (PCLK Re versed) Parameter Description Minimum Maximum Input Parameters t rs Setup time from R E Q valid to PC LK 12 — t rh Hold tim e from PC LK to R EQ invali d 0— Output Parameters t pc PCLK cycle time 5[...]

Chapter 5 Signal Timing © National In strum ents Corp oration 5-3 3 D IO 6 5 3 3 U s er M an u al Figu re 5-2 9. Burst M ode Inpu t Timing (PCLK Revers ed) Parameter Description Minimum Maximum Input Parameters t pc PCLK cycle time 50 — t pw PCLK hi gh pu lse d urati on 20 — t pl PCLK low pulse d uration 20 — t rs Setup time from REQ valid t[...]

© National In strum ents Corp oration A-1 DIO 653 3 User Ma nual Appendix A Specifications This ap pendix lists th e sp ecific ation s fo r the D IO 6533 d evice s. T hese specifi cations a re typica l at 25 ° C un less othe rwise noted. PCI-DIO-32HS, PXI-6533, AT-DIO-32HS, and DAQCard-6533 Devices Digita l I/O Numb er of c ha nn el s ...... .. .[...]

Appendix A S pecifica tions DIO 6533 User M anua l A-2 © Natio nal In strume nts Corp orati on Digital logic levels Level Min Max Input low vo ltag e 0 V 0.8 V Inpu t h igh v oltage 2 V 5 V Input low current for data lines (V in = 0.4 V) DPULL high DPULL low — — –70 µ A –10 µ A Inpu t high curr ent fo r data lines (V in = 2.4 V) DPULL hi[...]

Appendix A Spec ifications © National In strum ents Corp oration A-3 DIO 653 3 User Ma nual Ab s o l u t e m a x i n p u t v o l t a g e ra n g e ....... –0.3 t o 5 V Power -o n sta t e fo r o ut pu ts . .. .. .... .. .. .... . Tr i-st ate d, pu ll ed up or d ow n (selec tab le) Data tra ns fer s ...... .... .. .. .. ..... .. .. .. .... .. .. ..[...]

Appendix A S pecifica tions DIO 6533 User M anua l A-4 © Natio nal In strume nts Corp orati on Sample rate ( max susta inable) ........ .... System depend ent 1 Mode Triton I Chip Set Triton II Chip Set Nato m a Ch ip S e t PCI-DI O-32HS Rate s in M S/s (MB/ s) on S ample Sy stems 32-bit input 2.8 (11.2) 4 (16) 4 (16) 16-bit input 4 (8) 5 (10) 6.6[...]

Appendix A Spec ifications © National In strum ents Corp oration A-5 DIO 653 3 User Ma nual Sample rate (peak internall y timed , for small tr ansfers) .... ...... ...... ..10 MS/s Sample rate (peak external ly timed , for small tr ansfers) .... ...... ...... ..20 MS/s Sample rate (min internal ly timed) ......1 S/10 min. Sample rate (min external[...]

Appendix A S pecifica tions DIO 6533 User M anua l A-6 © Natio nal In strume nts Corp orati on Handshaking Dire ction ....... ...... .... ...... ...... ..... .... ...... In put or outp ut Modes ....... ...... .... ...... ...... ..... .... ...... .... 6 (b urst, level-A C K, leading-edge pulse, trailing-edge pulse , long pulse, and 8255 emu lation)[...]

Appendix A Spec ifications © National In strum ents Corp oration A-7 DIO 653 3 User Ma nual DAQCard- 6533 Pattern and Cha nge Det ection Patte rn-d et ect ion tr i ggers ... .. .... .. .. .... .. . S tar t or s top on p att ern Patte rn-det ectio n resol ution ..... .... ...... . 60 ns or one REQ period , depending on m ode Chang e-de tec tio n f [...]

Appendix A S pecifica tions DIO 6533 User M anua l A-8 © Natio nal In strume nts Corp orati on Bus Interfaces PCI-D IO-32 H S/P XI -65 33 ty pe .. .... .. .. . PCI mas te r and t a rget wi th onboard link ing (scatter -gather) DMA AT-DI O-32 HS t ype .. .. .. .... .. ... .... .. .. .... . AT s lave wi th dua l D M A DAQCa rd-65 33 type .... ......[...]

Appendix A Spec ifications © National In strum ents Corp oration A-9 DIO 653 3 User Ma nual Environment Oper ati ng te mp er atur e .. ..... .. .. .. .... .. .. .. . 0 to 5 5 ° C Storage t emp er atur e .... .. ..... .. .... .. .. .... .. . –20 t o 70 ° C Relat ive hu midi ty ..... .... .. ..... .. .. .... .. .. ... 5% to 9 0% n oncon de nsi n[...]

© National In strum ents Corp oration B-1 DIO 653 3 User Ma nual Appendix B Optional Adapter Descriptio n T h is appen d ix desc ribes an o p ti o nal 68-to- 5 0- p i n DI O 65 3 3 device a d a p ter. The a d a p te r c hanges t h e pino u t of t h e 65 3 3 d e v ice to m atc h t h e pino u t of an AT- DIO-3 2 F de vice. The ada pte r e n a b le s[...]

Appendix B O ptional Adapt er Description DIO 6533 User M anua l B-2 © Natio nal In strume nts Corp orati on Figur e B-1. 68-to- 50-Pin A dapte r Pin Assi gnmen ts DIOB4 DIOB0 DIOB7 DIOB5 DIOA7 DIOA1 DIOA0 DIOA4 REQ1 PCLK1 (OUT1) STOPTRIG1 (IN1) ACK1 GND GND GND GND GND DIOC6 DIOC2 DIOC3 DIOC5 DIOD2 DIOD6 DIOD3 DIOD1 DIOB1 DIOB6 DIOB2 DIOA3 DIOA2 [...]

© Nationa l Instruments Corporation C-1 DIO 6533 Us er Manua l Appendix C Customer Communication For yo ur convenience, t his ap pendix con tains form s to help you gather the inform ation ne cessary to help us solve you r technical problems and a for m you can use t o comment on t he produ ct documentation. When you contact us, we need the infor [...]

Fax-on- Demand is a 2 4-hour inf ormation retr ieval syst em containing a library of d ocuments on a wide range of tech nical information. You can access Fax-on-Demand fro m a touch-tone teleph one at (512 ) 418-1111 . You can submit technical su pport questions to the applications enginee ring team through e-mail at the Internet address listed bel[...]

Technical Support Form Photocopy this fo rm and u pdate it each time y ou make ch anges to you r software or h ardware, and use the completed copy of this form as a reference for your current configu ration. Completin g this form accurately befor e contacting National Instruments for technical support helps our applications engineers answer your qu[...]

DIO 6533 Hardware and Software Configuration Form Record the settings and revisions of your h ardware and software o n the line to the right of each item. Complete a new copy of this form each time you revi se your software or hardware conf iguration, and use this form as a reference for yo ur current con figuration. Completing this fo rm accuratel[...]

Documentation Comment Form National Instruments encou rages you t o comment on the documen tation sup plied wit h our product s. This information hel ps us provide quality products to meet you r needs. Title: DIO 6533 U ser Man ual Edition Date: July 1997 Part Number: 321464B- 01 Please comment on the co mpleteness, clarity, and organization of the[...]

© Nationa l Instruments Corporation G -1 DIO 653 3 Use r Manual Glossary Symbols °d e g r e e - n egative of, or min us Ω ohm /p e r % perce nt ±p l u s o r m i n u s + positive of, or plus Prefix Meaning Value m- m illi- 10 –3 µ- micro- 10 –6 n- nano - 10 –9 k- kilo- 1 0 3 M- m ega - 10 6[...]

Gloss ar y DIO 653 3 User Manu al G-2 © Natio nal In strume nts C orporati on A A amper es AC alternating c urrent ACK ac knowl edge signal address chara cte r code that i dent ifi es a specific locati on ( or ser ies o f l oc ation s ) in me mory ANSI American National St andards Institute asynch ronous hard ware—a pro perty of an e vent that o[...]

Glossary © Nationa l Instruments Corporation G -3 DIO 653 3 Use r Manual cros stal k an unwant ed sign al on on e channel due to an i nput on a diffe rent chan nel current drive capability the amount of curr ent a digital or analog output channel is capable of sourcing or sinking while still operating withi n voltage range specifi cations curr ent[...]

Gloss ar y DIO 653 3 User Manu al G-4 © Natio nal In strume nts C orporati on DLL dynam ic link library—a softw are module in Microsof t Windows containin g executa ble code and data tha t can be called or used by Windows ap plications or othe r DLLs. Func tions and data in a D LL are loaded a nd li nke d at run ti me w h en the y ar e refe re n[...]

Glossary © Nationa l Instruments Corporation G -5 DIO 653 3 Use r Manual ft. feet G glitch a brief, u nwan ted cha nge, or distur banc e, in a signal leve l GND ground H h hour handshaked digita l I/O a type o f strob ed digital I/O in which co ntrol signals p ass both to an d from th e di gita l de vice, timin g an d con fir ming eac h da ta tran[...]

Gloss ar y DIO 653 3 User Manu al G-6 © Natio nal In strume nts C orporati on I/O input/ou tput–the transfe r of data to/from a comp uter system involving communic ations cha nnels, op erator inte rfac e de vices , and /or data acquis ition and contro l interfaces I OH current, output high I OL current, output low IRQ interrupt re qu est signa l[...]

Glossary © Nationa l Instruments Corporation G -7 DIO 653 3 Use r Manual mux multiplexer—a switching device with multiple inputs that sequentially connects each of its inp uts to its out put, typically at high speeds, in orde r to m easure seve ral si gnals with a single analog inp ut chan nel N NI-DAQ NI dr iver soft ware for DAQ hardwar e nois[...]

Gloss ar y DIO 653 3 User Manu al G-8 © Natio nal In strume nts C orporati on PCMCIA an expans io n bus architec ture that ha s foun d widesprea d acceptan ce as a de f ac to s tand ar d in n ot eb ook -si ze co mpu t ers . It o ri gi nat ed a s a specification for add-on memory c ards written by the Person al Computer Mem ory Card I nterna tiona [...]

Glossary © Nationa l Instruments Corporation G -9 DIO 653 3 Use r Manual RGND reserved gro und rms root mean square RTSI Bus real-t ime system integration bus—the National In struments timing bus that conne ct s DA Q bo ar ds di rectly, b y mea ns of c onn ector s on top of the boards, for precis e synchronization of functions S s secon ds Ss a [...]

Gloss ar y DIO 653 3 User Manu al G-10 © Natio nal In strume nts C orporati on TTL transistor-transistor logic U unstrobed digital I/O a type of digital input or output in wh ich software reads or writes the digital line or port states directly, without using any h andshaking o r hardware-controlled tim ing functions. Also called imm ediate , nonh[...]

Glossary © Nationa l Instruments Corporation G-11 DIO 6533 Use r Manual of the output drivers can driv e the resulting conne ction low. Also called an open -collect or or op en -dra in d riv e r . word the standard number of bits that a pr ocesso r or mem ory manip ulates at one time. Micr oprocess ors typically use 8, 16, or 32-b it words. workin[...]

© National Instruments Corporat ion I-1 D IO 6 53 3 Us e r M an ua l Index Numb ers +5 V signal connecting to GND, RGND, or output pin (caution) , 4-14 desc ri pti on (t able), 4-5 8255 emul ation, 5- 4 to 5-7 input , 5-5 to 5-6 output , 5- 6 to 5-7 purpose and use, 3- 9 timing specification s (figure), 5-8 A ACK<1..2> signal. See also level[...]

DIO 6533 User Manual I -2 © Natio nal In strume nts C orporati on inter rupt channel selectio n, 2-6 to 2-9 Plug and Play mod e, 2-5 switchless d a ta acqu isition, 2-5 PCI, PXI, and DAQCard devices, 2-4 contro l signal summary, 4- 7 CPULL s igna l desc ri pti on (t able), 4-5 pull-up and pull-d own connect ions, 4- 13 to 4-14 customer co mmunicat[...]

© National Instruments Corporat ion I-3 D IO 6 53 3 Us e r M an ua l H handshak e timing, 5-4 to 5 -33 8255 emul ation, 5- 4 to 5-7 burst m o de, 5- 27 to 5 -33 leading-ed ge mode, 5-1 4 to 5-18 level- ACK mode, 5- 9 to 5-14 long-p ulse mod e, 5-19 to 5-22 trailing-edge mode, 5-2 3 to 5-27 handshak ing protocol s, 3-8 t o 3-10 8255 emul ation, 3- [...]

DIO 6533 User Manual I -4 © Natio nal In strume nts C orporati on purpose and use, 3- 9 timing specification s, 5-11 to 5-13 input timin g (figu re), 5-12 output tim ing ( fig ure) , 5-1 3 line polarities, controllin g , 3-13 long-p ulse mod e, 5-19 to 5-22 input ( figure), 5 -19 output (figure), 5-2 0 purpose and use, 3- 9 timing specificatio n s[...]

© National Instruments Corporat ion I-5 D IO 6 53 3 Us e r M an ua l control sign al summary (table), 4-7 desc ri pti on (t able), 4-3 reversi ng pi n assig nmen ts (not e), 4-2 timing conn ectio ns, 4-13 requirem ents for getting s tarted, 1-4 RGND signal (table), 4-5 RTSI bus interface, 4 -7 to 4-9 boar d a nd R T SI cl oc ks, 4 -8 RTSI triggers[...]

DIO 6533 User Manual I -6 © Natio nal In strume nts C orporati on starti ng, 3-12 to 3-13 pattern g eneration, 3- 6 to 3-8 change detection, 3-7 to 3-8 message generation , 3-8 over view , 3- 5 to 3- 6 pattern-detection triggers, 3-6 to 3-7 specifications, A-3 to A-7 handshak i ng, A- 6 to A-7 pattern and chan ge detection, A-7 patte rn gener atio[...]