Philips UM10109 manual

UM10109 P89LPC932A1 8-bit microcontr oller with tw o -c lock 80C51 core Rev . 02 — 23 Ma y 2005 User manual Documen t informa tion Inf o Content Keyw ords P89LPC932, P89LPC9 32A1 Abstract T echnical information for the P89LPC932A1 de vice.[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 2 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Contact inf o rmation F or additional inf o rmation, please visit: http://www .semiconductor s.philips.com F or sales office addresses, plea se send an email to: sales.ad dresse[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 3 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1. Intr oduction The P89LPC932A1 is a single-ch ip microcontroller designed f or applications demanding high-integ ration, low cost solutio ns over a wide r ange of perf or manc[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 4 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1.1.4 Increased ISP/IAP functionality 1.1.4.1 Support f or the watchdog timer The ISP code has been modified to set t he WDT prescaler (in WDCON) and WDL register to their maxim[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 5 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1.1.4.8 Configuration b yte protection A separate write protectio n bit has been pro vided for th e “configuration b ytes”. These by tes include UCFG1, BootStat, Boot V ecto[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 6 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Fig 2. P89LPC932A1 PLCC28 pin configur ation. Fig 3. P89LPC932A1 HVQFN28 pin configuration. P89LPC932A1F A 002aaa887 5 6 7 8 9 10 11 25 24 23 22 21 20 19 12 13 14 15 16 17 18 4 [...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 7 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1.3 Pin description T ab l e 1: Pin description Symbol Pin Ty p e Description TSSOP28, PLCC28 HVQFN28 P0.0 to P0.7 3, 26, 25, 24, 23, 22, 20, 19 27, 22, 21, 20, 19, 18, 16, 15 I[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 8 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual P0.0 to P0.7 (continued) 20 16 I/O P0.6 — P ort 0 bit 6. O CMP1 — Comparator 1 output. I KBI6 — Ke yboard input 6. 19 15 I/O P0.7 — P ort 0 bit 7. I/O T1 — Timer/count[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 9 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual P1.0 to P1.7 18, 17, 12, 11, 10, 6, 5, 4 14, 13, 8, 7, 6, 2, 1, 28 I/O , I [1] Po r t 1 : P or t 1 is an 8-bit I/O por t w ith a user-configurable output type, e xcept for three[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 10 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual P2.0 to P2.7 1, 2, 13, 14, 15, 16, 27, 28 25, 26, 9, 10, 11, 12, 23, 24 I/O Po r t 2: Port 2 is an 8-bit I/O por t with a user-configurable output type. During reset Port 2 lat[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 11 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual [1] Input/Output for P1.0 to P1.4, P1.6, P1.7. Input f or P1.5. P3.0 to P3.1 9, 8 5, 4 I/O Po r t 3 : P or t 3 is a 2-bit I/O por t with a user-confi gurable output type . Duri[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 12 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Fig 4. P89LPC932A1 block diagram. ACCELERA TED 2-CLOCK 80C51 CPU 8 kB CODE FLASH 256-BYTE D A T A RAM PORT 2 CONFIGURABLE I/Os PORT 1 CONFIGURABLE I/Os PORT 0 CONFIGURABLE I/Os[...]

© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 13 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1.4 Special function registers Remark: Special Function Registers (SF Rs) acce sses are restr icted in the f ollowing wa ys: • User must not attempt to a ccess any SFR locati[...]

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© Koninklijke Philips Electro nics N.V . 2005. All righ ts reserved. User manual Rev . 02 — 23 Ma y 2005 20 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1.5 Memory organization The various P89LPC9 32A1 memor y spaces are as f o llows: DA T A — 128 b ytes of internal data memor y space (00h: 7Fh) accessed via direct or indirec[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 21 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 2. Cloc ks 2.1 Enhanced CPU The P89LPC932A1 uses an en hanced 80C51 CPU which runs at six times the spee d of standard 80C51 de vices. A machine cycle consists of tw o CPU cloc[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 22 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The frequency of this clo ck output is 1 ⁄ 2 that of the CCLK. If the cloc k output is not needed in Idle mod e, it ma y be t ur ned off pr ior to e ntering Idle, saving addi[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 23 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual level. When system power is removed V DD will fall below the minimum specified operating v oltage . When using an oscillator fre quency above 12 MHz, in some applications, a n [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 24 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 2.8 CPU Clock (CCLK) modi fication: DIVM register The OSCCLK frequency ca n be divided down, b y an integer , up to 510 times b y configuring a dividing register , DIVM, to pro[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 25 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 3.1 Interrupt priority structure There are f our SFRs associated with the f our interrupt lev els: IP0, IP0H, IP1, IP1H. Ev er y interrupt has two bits in IPx and IPxH (x = 0, [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 26 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 7: Summary of interrupts Description Interrupt flag bit(s) V ector addr ess Interrupt enable bit(s) Interrupt priority Arbitration ranking Po w e r- down wake-up Exter n[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 27 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 4. I/O por ts The P89LPC932A1 has four I/O por ts: P or t 0, P or t 1, P or t 2, a nd P or t 3. P or ts 0, 1, and 2 are 8-bit ports and P or t 3 is a 2-bit por t. The e xact nu[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 28 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 4.1 P or t configurations All but three I/O por t pins on the P89LPC93 2A1 may be configured by software to one of f our types on a pin-by-pin basis, as shown in Ta b l e 9 . T[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 29 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual (Please refer to the P89LPC932A1 data sheet, Dynamic cha racteristics for glitch filter specifications). 4.3 Open drain out put configuration The open dr ain output configurati[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 30 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 4.4 Input-only configuration The input port configuration is shown in Figure 11 . It is a Schmitt-t r iggered input that also has a glitch suppression circuit. (Please refer to[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 31 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 4.6 P or t 0 and Analog Co mparator functions The P89LPC932A1 incorporates tw o Analog Comparator s. In order to giv e the best analog perf or mance and minimize po wer cons um[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 32 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 5. P ower monitoring functions The P89LPC932A1 incorporates po wer monitoring functions designed t o prev ent incorrect operat ion dur ing initial po wer-on and pow er loss or [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 33 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual [1] Can not be used with operation abov e 12 MH z as this requires V DD of 3.0 V or above . 5.2 P ower-on detection The P ower-On Detect has a fu nction similar to the Bro wnou[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 34 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 12: Po wer reduction modes PMOD1 (PCON.1) PMOD0 (PCON.0) Description 0 0 Nor mal mode (default) - no po wer reduction. 0 1 Idle mode. The Idle mode leav es per ipherals [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 35 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 13: Po wer Control register (P CON - address 87h) bit allocation Bit 76543210 Symbol SMOD1 SMOD0 BOPD BOI GF1 GF0 PMOD1 PMOD0 R e s e t 00000000 T able 14: Po wer Contro[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 36 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 6. Reset The P1.5/RST pin can function as either an activ e low reset inp ut or as a digital input, P1.5. The RPE (Reset Pin Enable) bit in UCFG1, when set to 1, enab les the e[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 37 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual • F or any other reset, any pre viously set flag bits that hav e not been cleared will remain set. [1] The value sho wn is for a power-on reset. Other reset sources will set [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 38 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 6.1 Reset vector F ollowing reset, the P89LPC932A1 will fetch instructions from either address 0000h or the Boot address . The Boot address is f or med by using the Boot V ecto[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 39 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 7.1 Mode 0 Putting eith er Timer into Mode 0 make s it look like an 8048 Timer , which is an 8-bit Counter with a divide-b y-32 prescaler . Figure 14 shows Mode 0 oper ation. I[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 40 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The 13-bit regist er consists of all 8 bits of THn and the low er 5 bits of TLn. The upp er 3 bits of TLn are indete rm inate and should be ignored. Setting the run flag (TRn )[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 41 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 23: Timer/Counter Control register (TCON) - address 88h) bit allocation Bit 76543210 Symbol TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 R e s e t 00000000 T able 24: Timer/Counter C[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 42 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 7.6 Timer o verflow toggle output Timers 0 and 1 can be conf igured to automatically toggle a port output whene ver a timer ov erflow occur s. The same de vice pins that are us[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 43 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual control bits ENT0 and ENT1 in the A UXR1 register , and apply to Timer 0 and Timer 1 respectively . The por t outputs will be a logic 1 pr ior to the first timer overflo w when[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 44 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 8.1 Real-time c lock source R T CS1/R T CS0 (RTCCON[6:5]) ar e used to sele ct the clock source for the RTC if either the Inter nal RC oscillator or the inter nal WD oscillator[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 45 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 010 0 0 0 Low frequency cr ystal Low frequency cr ystal /DIVM 01 10 11 Low frequency cr ystal /DIV 1 00 Low frequency cr ystal Inter nal RC oscillator 01 10 11 Inter nal RC osc[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 46 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 9. Capture/Compare Unit (CCU) This unit features: • A 16-bit timer with 16-b it reload on ov erflow • Selectable cloc k (CCU CLK), with a prescaler to divide the cloc k sou[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 47 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 9.1 CCU Cloc k (CCUCLK) The CCU runs on the CCUCLK, which can be ei ther PCLK in basic timer mode or the output of a PL L (see Figure 20 ). The PLL is designed to use a cloc k [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 48 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Up-counting: When the timer contents are FFFFH, the ne xt CCUCLK cycle will set the counter v alue to the contents of T OR2H:TO R2L. Down-counting: When the timer contents ar e[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 49 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 9.4 Output compare The f our output compare chan nels A, B, C and D a re controlled through f our 16-bit SFRs , OCRAH:OCRAL, OCRBH:OCRBL, OCR CH:OC RCL, OCRDH: OCRDL. Each outp[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 50 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual will hav e to set the associated I/O pin to th e desired output mode to con nect the pin. (Note: The SFR bits f or por t pins P2.6, P1.6, P1.7, P2.1 must be set to logic 1 in o[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 51 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual in basic timer mode. In basic timer mode, wr iting a one to TCOU2 will cause the values to be latched immediately and the v alue of TC OU2 will always read as z ero. In PWM mod[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 52 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 9.6 PWM operation PWM Operatio n has two main modes, asym me tr ical and symmetrical. These modes of timer oper ation are selected b y wr iting 10H or 11H to TMOD2 1:TMOD20 as [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 53 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual When the timer chang es directio n at the bottom, in this e xample, it counts …,00 01H, 0000H, 0001H,… The CCU Timer ov erflow interrupt flag is set in the counter CCUCLK c[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 54 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 9.8 Synchronized PWM register update When the OCRx registers a re wr itten, a bu ilt in mec hanism ensures th at the value is not updated in the middle of a PWM pulse . This co[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 55 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Setting the PLLEN bit in TCR20 st ar ts the PLL. When PLLEN is set, it will not read back a one until the PLL is in lock. At this time, the PW M unit is ready to operate and th[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 56 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 2. After the current (highest priority) e vent is serviced, wr ite a logic 0 to the correspond ing interr upt flag bit in the T IFR2 regist er to clea r the flag. 3. Read the T[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 57 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 41: CCU interrupt status encode regist er (TISE2 - address DEh) bit description Bit Symbol Description 2:0 ENCINT .2:0 CCU Interr upt Encode output. When multiple inte r[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 58 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10. U ART The P89LPC932A1 has an e nhanced U ART that is compatib le with the conv entional 80C51 U AR T except that Timer 2 ov erflow cannot be used a s a baud ra te source. T[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 59 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.3 Mode 2 11 bits are tr ansmitted (through TxD) or receiv ed (through RxD): sta r t bit (logic 0), 8 data bits (LSB first), a programmab le 9th data bit, and a stop bit (log[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 60 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.7 Updating the BRGR 1 and BRGR0 SFRs The baud ra te SFRs, BRGR1 and BRGR0 must only be loaded when the Baud Rate Generator is disa bled (the BRGEN bit in the BRGCON register[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 61 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.9 Break detect A break detect is repo r ted in the status re gister (SST A T). A break is detected when an y 11 consecutiv e bits are sensed low . Since a break condition al[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 62 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.10 More about U ART Mode 0 In Mode 0, a write to SBUF will initiate a tran smission. At the end of the transmission, TI (SCON.1) is set , which m u st be cleared in software[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 63 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.11 More about U ART Mode 1 Reception is initiated by detect ing a 1-to-0 tr ansition on RxD . RxD is sampled at a rate 16 times the prog rammed baud rate . When a transitio [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 64 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.12 More about U ART Modes 2 and 3 Reception is the sa me as in Mode 1 . The signal to load SBUF and RB 8, and to set RI, will be generated if, and only if , the f ollowing c[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 65 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.14 Break detect A break is detected when 11 consecut ive bits are sense d low and is repor ted in the status register (SST A T). Fo r Mode 1, this consists of the star t bit[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 66 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual – If DBISEL is logic 1 and INTLO is logic 0, a Tx interrupt will occur at the beginning of the STOP bit of the data cu rrently in the s hifter (which is also the la st data).[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 67 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual If double b uffering is enabled, TB8 MUST be updated bef ore SBUF is wr itten, as TB8 will be doub le-buff ered together with SBUF data. The oper ation described in the Section[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 68 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 10.20 A utomatic address recognition A utomatic address recognition is a f eature which allo ws the U ART to recognize cer tain addresses in the serial bit stream by using hard[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 69 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual inter preting the don’t-cares as ones, the broadc ast address will be FF he xadecimal. Upon reset SADDR and SADEN are loaded with 0s. This produces a giv en addre ss of all ?[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 70 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The P89LPC93 2A1 CPU inte rf ac es with the I 2 C-bus through six Special Function Register s (SFRs): I2CO N (I 2 C Control Register), I2D A T (I 2 C Data Registe r), I2ST A T [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 71 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 11.3 I 2 C contr ol register The CPU can read and write this regist er . There are two bits ar e affected b y hardware: the SI bit and the ST O bit. The SI bit is set by hardw [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 72 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 11.4 I 2 C Status register This is a read-only regist er . It contains the status code of t he I 2 C interf ace. The least three bits are alw ays 0. There ar e 26 possible stat[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 73 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The v alues for I 2SCLL and I2SCLH do not hav e to be the same; the use r can give diff erent duty cycles f or SCL by set ting these two registers . How ev er , the valu e of t[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 74 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The first b yte transmitted co ntains the slav e address of the receivin g device (7 bits ) and the data direction bit. In this case, the data direction bit (R/W) will be logic[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 75 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual After a repeated ST ART cond ition, I 2 C-bus ma y switch to the Master T ransmitter Mode. 11.6.3 Slave Receiver mode In the Sla ve Receiv er Mode, data b ytes are receiv ed fr[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 76 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 11.6.4 Slave T ransmitter mode The first b yte is received an d handled as in the Slav e Receiv er Mode. Howe ver , in this mode, the direction bit will indica te that the tran[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 77 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Fig 36. I 2 C serial interface block diagram. INTERNAL BUS 002aaa899 ADDRESS REGISTER COMP ARA TOR SHIFT REGISTER 8 I2ADR ACK BIT COUNTER / ARBITRA TION AND SYNC LOGIC 8 I2D A [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 78 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 68: Master T ra nsmitter mode Status code (I2ST A T) Status of th e I 2 C hard ware Application software response Next action taken by I 2 C hardware to/from I2D A T to [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 79 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 30h Data byte in I2D A T has been transmitted, NO T ACK has been received L o a d d a t a b y t e o r 000x D a t a b y t e w i l l b e t r a n s m i t t e d ; A CK bit will be [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 80 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 50h Data b yte has been received; A CK ha s been retur ned Read data byte 0 0 0 0 Data byte will be received; NO T ACK bit will be retur ned read data byte 0 0 0 1 Data b yte w[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 81 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 88H Previously addressed with own SLA address; Data has been received; NA CK has been retur ned R e a d d a t a b y t e o r 0000S w i t c h e d t o n o t a d d r e s s e d S L [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 82 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual A0H A ST OP condition or repeated ST AR T condition has been received while still addressed as SLA/REC or SLA/TRX N o I 2 D A T a c t i o n 0000S w i t c h e d t o n o t a d d [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 83 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 12. Serial P eripheral Interface (SPI) The P89LPC932A1 pro vides another high-spee d serial communication inte rface , the SPI interf ace. SPI is a full-duple x, high-speed, sy[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 84 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The SPI interf ace has f our pins: SPICLK, MOSI, MISO and SS : • SPICLK, MOSI and MI SO are typically tied together betw een two or more SPI de vic es. Data flows from mast e[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 85 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 73: SPI Control register (SPCTL - address E2h) bit description Bit Symbol Description 0 SPR0 SPI Clock Rate Select SPR1, SPR0: 00 — CCLK ⁄ 4 01 — CCLK ⁄ 16 10 ?[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 86 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual In Figure 38 , SSIG (SPCTL.7) f o r the slav e is logic 0, and SS is used to select the slav e. The SPI master ca n use any por t pin (including P2.4/SS ) to drive the SS pin. [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 87 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual In Figure 40 , SSIG (SPCTL. 7) bits for the sla ves a r e logic 0, and the sla ves are sele cted by the corresponding SS signals . The SPI master can use any por t pin (includi[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 88 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual [1] Selected as a por t function [2] T he MSTR bit changes to logic 0 automatically when SS becomes low in input mode and SSIG is logic 0. 12.2 Additional considerat ions f or [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 89 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual slav e and st ar t send ing data to it. T o av oid bus contentio n, the SPI beco mes a slav e. As a result of the SPI becoming a slav e, the MOSI and SPICLK pins ar e forced to[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 90 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual (1) Not defined Fig 41. SPI slave transfer f ormat with CPHA = 0. 1 2 3 4 5 6 7 8 MSB LSB DORD = 0 DORD = 1 6 1 5 2 4 3 3 4 2 5 1 6 LSB MSB MSB LSB DORD = 0 DORD = 1 6 1 5 2 4 [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 91 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual (1) Not defined Fig 42. SPI slave transfer f ormat with CPHA = 1. 12345678 MSB LSB DORD = 0 DORD = 1 6 1 5 2 4 3 3 4 2 5 1 6 LSB MSB MSB LSB DORD = 0 DORD = 1 6 1 5 2 4 3 3 4 2[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 92 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual (1) Not defined Fig 43. SPI master tran sfer form at with CPHA = 0. 12345678 MSB LSB 6 1 5 2 4 3 3 4 2 5 1 6 LSB MSB MSB LSB DORD = 0 DORD = 1 6 1 5 2 4 3 3 4 2 5 1 6 LSB MSB 0[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 93 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 12.7 SPI c lock prescaler select The SPI cloc k prescalar selection uses the SPR1-SPR0 bits in the SPCTL register (s ee Ta b l e 7 3 ). 13. Analog comparators T wo analog compa[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 94 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual When each compar ator is first enabled , the comparator output and interrupt flag are no t guarant eed to be stable f or 10 microseconds . The corresponding compar ator interru[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 95 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 13.2 Internal reference v oltage An inter nal reference voltage , Vre f , may supply a default ref erence wh en a single comparator inp ut pin is used. Please refer to the P89L[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 96 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 13.6 Comparators configuration e xample The code shown b elow is an exa mple of initializing one comparator . Comparator 1 is configured to use the CI N1A and CMPREF inputs , o[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 97 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 14. Ke ypad interrupt (KBI) The K eypad Inte rr upt function is intended primarily to allow a single interrupt to be generated when P or t 0 is equal to or no t equal to a cer [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 98 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual [1] The K eypad Interrupt must be enabled in order for the settings of the KBMASK register to be eff ective. 15. W atchdog timer (WDT) The watchdog timer subsystem protects the[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 99 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Figure 49 sho ws the wat c hdog timer in w atchdog mode. It consists of a prog rammable 13-bit prescaler , and an 8-bit do wn counter . The down counter is cloc ked (decr e men[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 100 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual these two SFRs will not take eff e ct. T o av oi d a watchdog reset, th e w atchdog timer needs to be f ed (via a special sequence of softwar e action called the f eed sequenc[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 101 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual The maximum number of tclks is: (3) Ta b l e 8 9 shows sample P89 LPC932A1 timeout values . tclks 2 57 + () () 255 1 + () 1 1048577 = + = T able 87: Watchdog Tim er Control re[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 102 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 15.3 W atchdog c lock sour ce The watchdog timer system has an on-chip 400 KHz oscillator . The watchdog timer can be clock ed from either the watchdog oscillator or from PCLK[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 103 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 15.4 W atchdog Timer in Timer mode Figure 49 shows the W atchdog Timer in Timer Mode. In th is mode, any changes to WDCON are written to the shad ow register after one w atchd[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 104 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 15.5 P ower -down operation The WDT oscillator will continue to r un in power-do wn, consum ing approximately 50 µ A, as long as the WDT oscillator is selected as the clock s[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 105 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 16.1 Software reset The SRST bit in A UXR 1 gives software the oppor tunity t o reset the proces sor completely , as if an external res et or watchdog reset had occu rred. If [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 106 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Byte Mode: In this mode data can be rea d and written to one b y te at a ti me. Data is in th e DEED A T register and the ad dress is in the DEEADR register . Each write requi[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 107 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Note that if DEED A T is written pr ior to a wr ite to D EEADR (if DEECON[5:4] = ‘00’), a Data EEPROM write operation will commence . The user must take ca ution that such[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 108 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 1. Wr ite to DEECON with ECTL1/ECTL0 ( D EECON[5:4]) = ‘10’ and correct b it 8 address to EADR8. (No te that if the correct values are alrea dy writ ten to DEECON , there [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 109 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual • Internal fix ed boot ROM, contain ing low-le vel In-Applicat ion Programming (IAP) routines that can be ca lled from the end ap plication (in addition to IAP-Lite) . • D[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 110 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual • FMADRL, FMADRH (Flash memo r y address low , Flash me mor y address high). Used to specify the b yte address within th e page register or specify the p age within user cod[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 111 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual • Write the address of the ne xt byte to be prog rammed to FMADRL, if desired. (Not needed f or contiguous byt e s since FMADRL is auto-incremented) . All b y tes to be prog[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 112 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual ;* R5 = page address LSB(byte ) * ;* R7 = pointer to data buffe r in RAM(byte) * ;* Outputs: * ;* R7 = status (byte) * ;* C = clear on no error, se t on error * ;*************[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 113 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual FMCON = LOAD; //load command, clears pa ge reg FMADRH = page_ hi; // FMADRL = page_ lo; //write my page addre ss to addr regs for (i=0;i<64;i=i+1) { FMDATA = dbytes[ i]; } [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 114 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.8 P ower on r eset code execution The P89LPC932A1 co ntains two special Flash elements: the BOO T VECTOR an d the Boot Status Bit . F o llowing reset, the P89 LPC932A1 exam[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 115 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.10 In-system pr o gramming (ISP) In-System Prog ramming is perf or med without removing the microcontroller f rom the system. The In-System Programming f acility c onsists [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 116 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 97: In-sy stem Programmi ng (ISP) he x record formats Record type Command/data function 00 Program User Code Memor y Page :nnaaaa00dd..ddcc Where: nn = number of b ytes[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 117 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 03 Miscellaneous Read Functi ons :01xxxx03sscc Where xxxx = required field b ut value is a ‘don’t care’ ss= subfunction code cc = checksum Subfunction codes: 00= UCFG1 0[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 118 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.12 In-application programming (IAP) Se veral In-Application Programming (IAP) calls are a vailab le f or use by an application program to per mit selective erasing and prog[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 119 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual IAP functions which write or erase code memory require an authorization k ey be set b y the calling routine prior to perf or ming the IAP function call. This author ization ke[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 120 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual If the Conf iguration Write Protect bit ( CWP) in BOOTST A T .6 is a logic 1 , write s to the configuratio n bytes are disab led. If the Configuration Write Protect bit (CWP) [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 121 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual T able 99: IAP function calls IAP function IAP call parameter s Program User Code P age (requ ires ‘ke y’) Input par ameters: A CC = 00h R3= number of bytes to prog ram R4[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 122 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual Misc. Read Input paramete rs: A CC = 03h R7= register address 00= UCFG1 01= reser ved 02= Boot V ector 03= Status Byte 04= reser ved 05= reser ved 06= reser ved 07= reser ved [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 123 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.17 User configuration b ytes A number of u ser-configurab le f eatures of the P89LPC932A1 m ust be defined at power-up and there f o re cannot be set by the program af ter [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 124 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.18 User security by tes This device has three sec urity bi ts associated with each of it s eight secto rs, as shown in T able 103 4 WDSE W atchdog Sa f ety Enable bit. Refe[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 125 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 18.19 Boot V ector register 18.20 Boot status register T able 105: Effects of Security Bits EDISx SPEDISx MO VCDISx Effects on Programming 000N o n e . 0 0 1 Secur ity violati[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 126 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 5 A WP Activate Write Protection bit. When this bit is cleare d , the inter nal Write Enable flag is forced to th e set state, thus writes to the flash memor y a re alwa ys en[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 127 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual 19. Instruction set T able 110: Instruction set summar y Mnemonic Description Bytes Cycles Hex code ARITHMETIC ADD A,Rn Add register to A 1 1 28 to 2F ADD A,dir Add direct byt[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 128 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual ORL A,@Ri OR indirect memor y to A 1 1 46 to 47 ORL A,#data OR immediate to A 2 1 44 ORL dir ,A OR A to direct byte 2 1 42 ORL dir ,#data OR imme diate to direct byte 3 2 43 X[...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 129 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual MO VX A,@Ri Mov e external data(A8) to A 1 2 E2 to E3 MO VX A,@DPTR Mov e external data(A16) to A 1 2 E0 MO VX @Ri,A Mo ve A to e xter nal data(A8) 1 2 F2 to F3 MO VX @DPTR,A [...]

© Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 130 of 133 Philips Semiconductors UM10109 P89LPC932A1 User man ual JZ rel Jump on accum ulator = 0 2 2 60 JNZ rel J ump on accumulator ≠ 0 227 0 CJNE A,dir ,rel Compare A, direct jne relative 3 2 B5 CJNE A,#d,rel Compare A, immediate jne re[...]

Philips Semiconductors UM10109 P89LPC932A1 User man ual © Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 131 of 133 20. Disc laimers Life support — These products are not designed for use in li fe support appliances, de vices, or systems wher e malfunction of these pro ducts can reasonab [...]

Philips Semiconductors UM10109 P89LPC932A1 User man ual © Koninklijke Philips Electro nics N.V . 200 5. All rights r eserved. User manual Rev . 02 — 23 May 2005 132 of 133 continue d >> 22. Contents 1 Introd uction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Compar ison to the P89LPC932 device. . . . . . . 3 1.1.1 Byte-er[...]

© Koninklijke Philips Electronics N.V . 2005 All rights are rese rved. Reproduction in whole or in part is prohibited with out the prior written cons ent of the copyr ight owner. Th e information pr esented in this document does not form part of any quotation o r contract , is believed to be accur ate and relia ble and may be changed without notic[...]