Renesas SH7343 manual

Revision Date: Nov. 02, 2005 Renesas Microcomputer Deve lopment Environment System SuperH TM Family E10A-USB for SH7343 HS7343KCU01HE Rev.1.00 SuperH TM Family E10A-USB Emulator Additional Document for User’s Manual Supplementary Information on Using the SH7343 REJ10J1147-0100[...]

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1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technolo g y Corp. product best suited to the customer's application; they do not convey any license under any intellectual property ri g hts, or any other ri g hts, belon g in g to Renesas Technolo g y Corp. or a third party. 2. Renesas Tech[...]

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i Contents Section 1 Connecting the Emul ator with the User System ................................1 1.1 Components of the Emulator ............................................................................................ 1 1.2 Connecting the Em ulator with the User System ............................................................... 2 1.3 Ins[...]

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1 Section 1 C onnecting t he Emulator with the User System 1.1 Components of the Emulator The E10A-USB emul ator support s the SH7343. Ta ble 1.1 lis ts the components of t he emulat or. Table 1.1 Comp onents of th e Emulator Classi- fication Component Appearance Quan- tity Remarks Hard- ware Emulator box 1 HS0005KCU01H: Depth: 65.0 mm , Width: 97.[...]

2 1.2 Connecting the Emulator with the User System To connect the E10A-USB emulator (he reinafter referre d to as the emulator), t he H-UDI port connector must be ins talled on the user s ystem to connect the user s ystem interface cable. When designing the user system, ref er to the recommen d ed circuit between the H-UDI port connector and the MP[...]

3 1.3 Installing the H-UDI Port Connector on the User System Table 1.3 show s the recommended H-UD I port connect ors for the em ulator. Table 1.3 Recommended H-UDI Port Connectors Connector Type Number Ma nufacturer Specifications DX10M-36S Screw type 36-pin conne ctor DX10M-36SE, DX10G1M-36SE Hirose Electri c Co., Ltd. Lock-pin ty pe 14-pin conne[...]

4 1. Input to or output from the user system. 2. The symbol (/) means that the si g nal is active-low. Notes: H-UDI port connector (Pin 1 mark) (top view) Unit: mm 4.8 M 2.6 x 0.45 9.0 0.3 3.9 H-UDI port connector (front view) 3. The emulator monitors the GND si g nal of the user system and detects whether or not the user system is connected. 4. Wh[...]

5 Pin 1 mark Notes: 1. Input to or output from the user system. 2. The symbol (/) means that the si g nal is active-low. 3. The emulator monitors the GND si g nal of the user system and detects whether or not the user system is connected. 25.0 23.0 6 x 2.54 = 15.24 (2.54) 0.45 Pin 1 Pin 8 Pin 7 Pin 14 Pin 1 mark H-UDI port connector (top view) H-UD[...]

6 1.5 Recommended Circuit between th e H- UDI Port Connector and the MPU 1.5.1 Recommended Circuit (36-Pin Ty pe) Figure 1.3 shows a recommended circuit for connection between the H-UDI and AUD port connectors (36 pins) and t he MPU when the emulat or is in us e. Notes: 1. Do not connect an ything to t he N.C. pins of the H-UDI port connector. 2. T[...]

7 When the circuit is connected as shown in figure 1. 3, the switches of the emulato r are set as SW 2 = 1 and SW3 = 1. F or details , refer to section 3.8, Setting t he DIP Swi tches, in the SuperH TM Family E10A-US B Emulator U ser’s Manual. VccQ 1 AUDATA0 AUDATA2 AUDATA1 AUDATA3 TCK TMS AUDSYNC N.C. N.C. RESET TDI TDO TRST ASEBRK / BRKACK UVCC[...]

8 1.5.2 Recommended Circuit (14-Pin Ty pe) Figure 1.4 shows a recommended circuit for connection between the H-UDI and AUD port connectors (14 pins) and t he MPU when the emulat or is in us e. Notes: 1. Do not connect an ything to t he N.C. pins of the H-UDI port connector. 2. The MPMD pin must be 0 when the emul ator is connected a nd 1 when the e[...]

9 When the circuit is connected as shown in figure 1. 4, the switches of the emulato r are set as SW 2 = 1 and SW3 = 1. F or details , refer to section 3.8, Setting t he DIP Swi tches, in the SuperH TM Family E10A-US B Emulator U ser’s Manual. 1 TCK TMS RESET TDI TDO TRST ASEBRK / BRKACK GND GND GND GND (GND) 2 3 4 5 6 7 8 9 11 10 12 13 14 TCK TM[...]

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11 Section 2 Softwar e Specificati ons w hen Using the SH734 3 2.1 Differences between th e SH7343 and the Emula tor 1. When the emu lator system is initiated , it initializes the gen eral registers and part of the control registers as s hown in table 2.1. The initial va lues of the actu al SH7343 registers are undefi ned. When the emulator is init[...]

12 3. Low-Power S tates (Sleep, Soft ware Standby, Module S tandby, U Standb y, and R St andby) For low-power consumption, t he SH7343 has sleep, softw are standby, m odule stand by, U standby, and R standby stat es. The sleep, software st andby, and mo dule st andby states are switched using the SLEEP instruction. W hen the emulat or is used, the [...]

13 8. Cache Operation during Us er Program Break When cache is enabled, the e mulator acce sses the memory by the following met hods: • At memory write: Writes thro ugh the cache, then is sues a single write t o outside. The LR U is not updat ed. • At memory read: Reads memory fr om the cache. The LR U is not updated. Therefore, when memory rea[...]

14 12. Memory Access duri ng Break In the enabled MMU, when a memory is accessed and a TLB error occu rs during b reak, it can be selected whether the TLB e xception is c ontrolle d or the program j umps to the user exception handl er in [TLB Mo de] in the [Confi guration] di alog box. When [TLB miss exception is en able] is selected, a “Communi [...]

15 • Verify In the [IO] wi ndow, the ve rify function of the input value is disabled. 15. Ill egal Instruct ions If illegal instru ctions are executed by STEP-type command s, the emulator cannot go to the next program c ounter. 16. [Reset CPU] and [R eset Go] in the [Debug] Menu When a reset is iss ued from [Reset CPU] or [Reset Go] in the [Debu [...]

16 2.2 Specific Functions for the Em ulator when Using the SH7343 2.2.1 Event Cond ition Func tions The emulator is used t o set 12 event conditions (C h1 to Ch12) and the software trace. Tabl e 2.4 lists the conditio ns of Event Cond ition. Table 2.4 T ypes of Event Cond itions Event Condition T ype Description Address bus condition (A ddress) Bre[...]

17 Table 2.5 Di alog Boxes f or Setting E vent Condition s Func tion Dialog Box Addr ess Bus Con ditio n (Addres s) Data Bus Con ditio n (Data) ASID Con ditio n (ASID) Bus State Con ditio n (Bus Status) Window Addr ess Con ditio n (Windo w addres s) System Bus LDTLB Inst ruct ion Break Count Con ditio n (Count) Branch Con ditio n (Branc h Trace) So[...]

18 Table 2.5 Di alog Boxes f or Setting E vent Condition s (cont) F u n c t i o n Dialog Box Addr ess Bus Con ditio n (Addres s) Data Bus Con ditio n (Data) ASID Con ditio n (ASID) Bus State Con ditio n (Bus Status) Window Addr ess Con ditio n (Windo w addres s) System Bus LDTLB Inst ruct ion Break Count Con ditio n (Count) Branch Con ditio n (Bran[...]

19 Sequential Setting : In the emulator, seq uential setting of an Event Co ndition is enabled. Table 2.6 Sequent ial Event Condit ions Type Event Condition Description [CPU Sequential Event] Page 2 Channel Sequential Ch2 -> 1 Halts a pro gram when a c ondition i s satisfied i n the order of Event C ondition 2, 1. An event cond ition mus t be se[...]

20 Table 2.6 Sequent ial Event Condit ions (cont) Type Event Condition Description [CPU Sequential Event] Page (cont) CPU Extend Expands the [C PU Sequentia l Extend] pa ge. The sequential sett ing is enabled with any combinatio n. For details, r efer to sect ion 2.2.1, Seq uential Br eak Extension Sett ing, in thi s manual. SystemBu s Sequential E[...]

21 Sequential Break Extensio n Setting: Figure 2.1 [CPU Sequent ial Extend] Page (a) Indicates the channel name for setting condi tions. (b) Selects a condition that is satis fied before the chan nel which sets up condition s. When a channel name is s elected, it is required that the condition of the c hannel selected here must have already been sa[...]

22 Usage Exa mple of Sequentia l Break Extensio n Setting: A tutorial program provi ded for the product is used as an example. For the tutorial program , refer to section 6, Tutorial, in the SuperH TM Fa mily E10A-USB Emulator User’s Manual . The conditions of Event Condition are set as fo llows: 1. Ch1 Breaks address H’00001068 when the condit[...]

23 Figure 2.2 [Source] Window at Execu tion Halted (Se quential B reak)[...]

24 2.2.2 Trace Functions The emulator su pports the trac e functions li sted in table 2.7. Table 2.7 Tr ace Functions Function Internal Trace AUD Trace Memory Output Trace Branch trace Supported (eight branches) Support ed Supported Range memory access tr ace Supported (e ight event s) Supported Supported Software trace Supported (eight event s) Su[...]

25 Branch Trace Functions: The branch s ource and desti nation addr esses , their source lines, branch types, and types of acces sed bus mast ers are displayed. [Setting Met hod] Select the check box in the [B ranch] group box in the [Branch trace] pa ge of the [Branch trace] dialog box t hat opens by do uble-cli cking on the C h12 (Branc h) column[...]

26 Range Memory Access T race Functions: The memory access within the specified range is acquired by a trace. The rea d cycle, write cycle, or read/write cycle can be se lected as the bus type, ASID value, or bus cycle for trace acquisition. [Setting Met hod] (i) To open the [Event condition 5] o r [Event condition 6] dialog box, double-click on th[...]

27 (iii) Open the [ASID] page, remove the check mark of the [Don’t care] check box, and enter the ASID value to b e set. When the ASID val ue is not se t as a condition, do not remo ve the check mark of the [Don’t care] check box. (iv) Open the [Bus s tate] page and specify th e bus type an d bus cycle that are to be s et. Figure 2.5 [B us Stat[...]

28 Software Trace Func tion: Note: This function ca n be suppo rted with SHC /C++ compiler (manufacture d by Renes as Technology Corp .; includin g OEM and bundle p roducts) V 6.0 or later. However, SHC /C++ compiler (incl uding OEM and bundle products ) V8.0 or l ater is needed when ins tructions ot her than th ose compatible wi th SH4 are out put[...]

29 AUD Trace Functions: This fun ction is operational when the AUD pin of the device is connected to the emulator. It i s activated by selecting the [AUD trace] radio button in the [Trace type] group box of the [Trace mode] page. S et the trace con dition to be us ed. Table 2.9 shows the AUD trace acqu isition mode that can be set in each trace fun[...]

30 To set the AUD trace acquisition mode, click the [T race] window with the right mouse but ton and select [Setting] from the pop -u p menu to display the [Acqui sition] dialog box. The AUD trace acquisition mode can be s et in the [Trace Mode 1] or [Trace Mode 2] gro up box in the [T race Mode] page of the [Acquisi tion] dialog bo x. Figure 2.6 [[...]

31 Notes on AUD Trace: 1. When the trace display is per formed durin g us er program execution, the m nemonics, operands , or source is n ot displayed. 2. The AUD branch trace functio n outputs the diff erences between newly o u tput branch source addresses and pre viously outp ut branch sour ce addres ses. The window trace function outp uts the di[...]

32 Memory Output Trace Functio ns: This function is activated b y selecting the [Use Memor y trace] radio button in the [ Trace type] grou p box of the [Tra ce mode] page. In this fun ction, write the trace data in the specified user memory range. Specify the start address to o utput a trace for the [Start] e dit box in t he [User memory area ] gro[...]

33 To set the memory-output trac e acquisition mode, click the [ Trace] window with the right mous e button and s elect [Setti ng] from the po p-up menu to displ ay the [Acquis ition] dialo g box. The AUD trace acquisition mod e can be set in the [Trace Mode 1] or [Trace Mode 2] group box in the [Trace Mode] page of the [Acquisition] dialog box. Fi[...]

34 Notes: 1. The memor y range for which trace is out put is the address on the system bus and not supported for the MMU or cache. 2. In the memory range for outp ut, do not specify t he ranges that the user program has been downloaded or t he user program acces ses. 3. The range for trace output m ust be 1 MB or les s. 2.2.3 Notes o n Using the JT[...]

35 command setti ng is disabled. The ASID value of the SH73 43 PTEH regist er during comm and input is used. When VPMAP_SET comman d se tting is enabled, a BREAKPOINT is s et t o a physical address into which address translati on is made according to the VP_MAP table. However, for addres ses out of the range of the VP_MAP table, the add ress to whi[...]

36 2.2.5 Notes on Se tting the [Event Conditi on] Dialog Box an d the B REAKCONDITION_ SET Command 1. When [Go to cu rsor], [St ep In], [Step Over] , or [Step Out ] is se lected, the setti ngs of Event Conditi on 3 are disa bled. 2. When an Even t Condition is satisfied, em ulation may stop after two or more instru ctions have been executed. 3. If [...]

37 2.2.8 Performance Me asurement Function The emulator su pports the per formance measurement function. 1. Sett ing the performance meas urement conditions To set the performance measurement conditions , use t he [Performa nce Analysis] dial og box and the PERFORMANCE_SET command. When a channel line on the [Performance Analysis ] window is cl ick[...]

38 Note: Fo r the command lin e syntax, refer to the online help. (a) Specifying the measur ement s tart/end conditions Set the performan ce measurement conditions in th e [Action] page after conditions h ave been set in t he [Event Conditi on] dialog bo x that is ope ned by dou ble-clicking C h1 to Ch6 an d Ch8 to Ch12 on t he [Event Condit ion] s[...]

39 Figure 2.9 [A ction] Page Note: PA1 or PA2 cann ot be set fo r Ch8 and Ch9.[...]

40 (b) Measurement tolerance • The measured value in cludes tolerance. • Tolerance will be generated before or after a break. For details , see table 2.14. (c) Measurement items Items are measured in the [P er formance Analysi s] dialog bo x for each channel from Ch1 t o Ch4. A maximu m of four condi tions can be speci fied at the same time. Ta[...]

41 Table 2.12 Measurement Items Classification Type Measur ement Item Option Note Disabled None Not measured. CPU performance Cycle Elapsed cycles AC Except for power-on perio d; counted by t he CPU c lock. Cy cles exec uted in privileged m ode PM The number of privileged- mode cycl es among t he number of ela psed cycle s. Cycles f or asser ting t[...]

42 Table 2.12 M easu rement Items (cont) Classification Type Measur ement Item Option Note CPU performance (cont) Stalled cycle Cycles stalled in f ull- trace mode (w ith multi-count s) SFM All items are counted independent ly. Cycles stalled in full- trace mode (w ithout multi-count s) SF This item i s not count ed if the stall cyc le is gener ate[...]

43 Table 2.12 M easu rement Items (cont) Classification Type Measur ement Item Option Note Instructi on bus performance (cont) Instructi on (cont) Number of instruct ion cache miss ICM The number of cache mi sses by an instru ction cac he access (th e number of accesses to t he outside of the CPU core d ue to a cac he miss). Number of internal- RAM[...]

44 Table 2.12 M easu rement Items (cont) Classification Type Measur ement Item Option Note Operand bus performance (cont) Access count (cont) Number of intern al- RAM acce ss for operand fetch (WRITE) (XY-RAM or L memory) XLW The number of accesses to XY memory in t he SH7343 durin g memory access (writ e) of an operand. (Accesses via the XY bus an[...]

45 Table 2.12 M easu rement Items (cont) Classification Type Measur ement Item Option Note Operand bus performance (cont) Waited cycle Wai ted cy cles f or operand fetch (READ) WOR The number of w ait cycles b y a memory acces s (read) of an operand. Wai ted cy cles f or operand fetch (WRITE) WOW The num ber of wait cy cles by a memory access (writ[...]

46 Table 2.13 shows the measurement i tems and methods that are mainly us ed. Table 2.13 Main Measurement Items Main Measurem ent Item Measurement Method Elapsed t ime Number of e lapsed cycles x CPU clo ck cycle s Number of e xecution instr uctio ns Number of va lid instr uctions i ssued + num ber of ca ses of simultaneo us execution of two instru[...]

47 Each measurement conditio n is also counted wh en con ditions in table 2.14 are ge nerated. Table 2.14 Perf ormance Measu rement Conditions to be Co unted Measurement Condition Notes No cachi ng due to the settings of T LB cacheab le bit Counted for accessing th e cacheab le area. Cache-on coun ting Accessing the non- cacheable area is coun ted [...]

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SuperH ™ Family E10A-USB Emulator Additional Document for User's Manual Supplementary Information on Using the SH7343 Publication Date: Rev.1.00, November 2, 2005 Published by: Sales Strategic Planning Div. Renesas Technology Corp. Edited by: Customer Support Department Global Strategic Communication Div. Renesas Solutions Corp. © 2005. Ren[...]

Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Refer to " http://www.renesas.com/en/network " for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) [...]

SuperH TM Family E10A-USB Emulator Additional Doc ument for User’s Manual Supplementar y Information on Using the S H73 43[...]