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® SUPER P3TDDR USER’S MANUAL Revision 1.0a S UPER[...]

The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: Fo[...]

Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER P3TDDR motherboards. The SUPER P3TDDR supports single or dual Pentium ® III FCPGA 500 MHz-1.26 GHz+ processors, including low power Pentium III ® processors, at Front[...]

S UPER P3TDDR User’s Manual iv Table of Contents About This Manual ...................................................................................................... ii i Manual Organization ................................................................................................... i ii Chapter 1: Introduction 1- 1 Overview ..........[...]

v Table of Contents Wake-On-Ring ......................................................................................... 2-10 Fan Headers ........................................................................................... 2 - 1 1 Chassis Intrusion .................................................................................... 2-11 2 [...]

S UPER P3TDDR User’s Manual vi 4 -9 Exit Setup ....................................................................................................... 4-25 Appendices: Appendix A: AwardBIOS POST Messages ......................................................... A - 1 Appendix B: AwardBIOS POST Codes ...............................................[...]

Chapter 1: Introduction 1-1 Introduction Chapter 1 Introduction 1 - 1 Overview Checklist Congratulations on purchasing your computer motherboard from an ac- knowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the[...]

S UPER P3TDDR User's Manual 1-2 Contacting Supermicro Headquarters Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: + 1 (408) 503-8008 E-mail: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web site: www.supermicro.com Europe Address: Super Micro [...]

Chapter 1: Introduction 1-3 Introduction SUPER P3TDDR Figure 1-1. SUPER P3TDDR Image[...]

S UPER P3TDDR User's Manual 1-4 Figure 1-2. SUPER P3TDDR Layout (not drawn to scale) S UPER P3TDDR PCI 3 SCSI LED PCI 2 ULTRA III SCSI CH B PCI 1 ULTRA III SCSI CH B ULTRA III SCSI CH A SCSI RAID SUPER I/O WOL1 WOM1 JBT1 JP8 SPKR BATTERY USB 2/3 JP10 IDE #1 IDE #2 FLOPPY AT I Rage XL JPA2 JPA1 JP2 JPL2 JPL1 JP10 JP3 JPWAKE JP7 JP6 Chassis Fan [...]

Chapter 1: Introduction 1-5 Introduction P3TDDR Quick Reference Jumpers Description Default Setting JBT1 CMOS Clear Pins 1-2 (Normal) JPA1/2 SCSI Ch A/B Termination Open (Enabled) JPL1/2 LAN 1/2 Enable/Disable Closed (Enabled) JPWAKE Keyboard Wake-Up Pins 1-2 (Disabled) JP2 SCSI Enable/Disable P ins 1-2 (Enabled) JP 3 VGA Enable/Disable Pins 1-2 (E[...]

S UPER P3TDDR User's Manual 1-6 VT8653T DDR Vli nk Host Nort h 552BGA VT8233 Vlink 133/10 0/ 66 M H z Host Bus 3D G rap hics Controller Pe ntium III FCPGA/PPGA CPUs PCI Slots 266 MHz Memory Memory Bus AG P Bus Clock Bu ffer Clock Gene rator GCL K MCLK H C LK /PC LK PCI Bus ATA 33/ 66/10 0 MII/LAN 6x USB LPC SMBus Power Plane & Peripheral C[...]

Chapter 1: Introduction 1-7 Introduction Motherboard Features CPU • Single or dual Intel ® Pentium TM III FCPGA 500 MHz-1.26+ GHz proces- sors (including low power Pentium TM III processors) at Front Side (system) Bus speeds of 133/100/66 MHz Note: Please refer to the support section of our web site for a complete list of supported processors. Y[...]

S UPER P3TDDR User's Manual 1-8 ACPI/PC 98 Features • Microsoft ® OnNow • Real-time clock wake-up alarm • Main switch override mechanism • External modem ring-on Onboard I/O • AIC-7899 for dual channel Ultra160 SCSI • 2 IDE bus master interfaces support UDMA/100 • 1 floppy port interface (up to 2.88 MB) • 2 Fast UART 16550A co[...]

Chapter 1: Introduction 1-9 Introduction 1- 2 Chipset Overview The VIA Apollo Pro 266T chipset is a high performance, cost-effective and energy-efficient chipset for the implementation of AGP/V-Link/PCI/LPC com- puter systems based on 64-bit, 370-pin Pentium III (66/100/133 MHz FSB) processors. VIA's Apollo Pro 266T chipset consists of two maj[...]

S UPER P3TDDR User's Manual 1-10 1-3 PC Health Monitoring This section describes the PC health monitoring features of the SUPER P3TDDR motherboard. Seven Onboard Voltage Monitors for the CPU Core, Chipset Voltage, +3.3V, ± ± ± ± ± 5V and ± ± ± ± ± 12V The onboard voltage monitor will scan these seven voltages continuously. If a volta[...]

Chapter 1: Introduction 1-11 Introduction CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS. This allows the user to define an overheat tempera- ture. When this temperature is exceeded, both the overheat fan and the warning LED are triggered. System Resource Alert This feature[...]

S UPER P3TDDR User's Manual 1-12 ages the Plug and Play BIOS data structures while providing a processor architecture-independent implementation that is compatible with both Win- dows 98, Windows NT and Windows 2000. You can check to see if ACPI has been properly installed by looking for it in the Device Manager, which is located in the Contro[...]

Chapter 1: Introduction 1-13 Introduction External Modem Ring-On Wake-up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state. Note that external modem ring-on can only be used with an ATX 2.01 (or above) compliant power supply. Wake-On-LAN (WOL) Wake-On-LAN is defined as the ability of a ma[...]

S UPER P3TDDR User's Manual 1-14 1-6 Super I/O The functions of the disk drive adapter for the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/ 765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and in[...]

Chapter 2: Installation 2-1 Chapter 2 Installation 2- 1 Static-Sensitive Devices ElectroStatic Discharge (ESD) can damage electronic components. To pre- vent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions • Use a wrist strap [...]

2-2 S UPER P3TDDR User’s Manual 2-2 Processor Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. The following pages cover the installation procedures. You should install the processor in the motherboard first, then install the motherboard in the chassis, then the memory and add-on cards,[...]

Chapter 2: Installation 2-3 2-3 Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Chassis may include a variety of mounting fasteners made of metal or plastic. Although a chassis may have both types, metal fasteners are the most highly recommended because they ground the motherb[...]

2-4 S UPER P3TDDR User’s Manual Figure 2-2. Installing DDR-RAM into DIMM Slot 2-4 Installing DIMMs CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Memory Module Installation (See Figure 2-2) 1. Insert each DDR-RAM memory module vertically into its slot. Pay attention to the two notches along [...]

Chapter 2: Installation 2-5 2-5 I/O Port/Control Panel Connector Locations The I/O ports are color coded in conformance with the PC99 specification to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. I/O Port Locations and Definitions To Remove: Use your thumbs gently to pus[...]

2-6 S UPER P3TDDR User’s Manual Front Control Panel JF1 contains header pins for various front control panel connectors. See Figure 2-4 for the pin definitions of the power and reset switches and the overheat, NIC1 and 2, hard disk drive and power LEDs. Refer to Sections 2-6 for connector pin definitions. Figure 2-4. Front Control Panel Connector[...]

Chapter 2: Installation 2-7 2-6 Connecting Cables The primary power supply connec- tor on the P3TDDR meets the SSI (Superset ATX) 24-pin specifica- tions, however, it also supports an ATX 20-pin connector. Refer to Table 2-1a for pin definitions. (Also see Figure A below for con- nector orientation). If a 20-pin connector is used, please refer to F[...]

2-8 S UPER P3TDDR User’s Manual Reset Button The Reset connector is located on pins 3 and 4 of JF1. This connec- tor attaches to the hardware reset switch on the computer case. See the table on the right for pin definitions. Power Button The PW_ON connector is located on pins 1 and 2 of JF1. Momen- tarily contacting both pins will power on/off th[...]

Chapter 2: Installation 2-9 Power LED The Power LED connector is lo- cated on pins 15 to 16 of JF1. See the table on the right for pin defini- tions. HDD (Hard Disk Drive) LED The IDE hard drive LED connector is located on JF1. Attach the IDE hard drive LED cable to pins 13 and 14 of JF1. See the table on the right for pin definitions. Pin Numb er [...]

2-10 S UPER P3TDDR User’s Manual Wake-On-LAN (WOL1) The Wake-On-LAN header is des- ignated as WOL1. This function allows your computer to receive and be "woken up" by an incoming call when in the suspend state. See the table on the right for pin definitions. You must enable the LAN Wake-Up setting in BIOS to use this function. (You must[...]

Chapter 2: Installation 2-11 Fan Headers The CPU, thermal control and chassis fan headers are desig- nated CPU Fan1, CPU Fan2, Over- heat Fan, Chassis Fan1, Chassis Fan2 and Chassis Fan3, respec- tively. See the table on the right for pin definitions. Fan Head er Pin Defi nit i ons Pin Number 1 2 3 D e fin itio n Ground (bl ack) +12V (r ed) Tachome[...]

2-12 S UPER P3TDDR User’s Manual 2- 7 Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be used to choose between optional set- tings. Jumpers create shorts be- tween two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. On a 2-pin [...]

Chapter 2: Installation 2-13 CMOS Clear Refer to the table on the right for instructions on how to clear CMOS. Always remove the AC power cord from the system be- fore clearing CMOS. Note: For an ATX power supply, you must completely shut down the sys- tem, remove the AC power cord, then use JBAT1 to clear CMOS. Replace JBT1 back to the pin 1-2 pos[...]

2-14 S UPER P3TDDR User’s Manual SCSI Enable/Disable Jumper JP2 is used to enable or dis- able the onboard SCSI. See the table on the right for jumper set- tings. Jumper Posi ti on 1-2 2-3 D e fin itio n Enabl ed Disabl ed S C S I E n a b le /D is a b le Jump er Set ti ngs ( JP2) VGA Enable/Disable Jumper JP3 is used to enable or dis- able the on[...]

Chapter 2: Installation 2-15 2-8 Parallel Port, Floppy/Hard Disk Drive and SCSI Connections Note the following when connecting the floppy and hard disk drive cables. • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1. • A single floppy disk drive ribbon cable has 34 wires a[...]

2-16 S UPER P3TDDR User’s Manual IDE Connectors There are no jumpers to config- ure the onboard IDE interfaces IDE1 and IDE2. Refer to the table on the right for pin defini- tions. You must use the ATA100/66 cable included with your system to benefit from the ATA100/66 technology. Floppy Connector The floppy connector is located on J9. Refer to t[...]

Chapter 2: Installation 2-17 Ultra Wide SCSI Connector Refer to the table below for pin definitions for the Ultra Wide SCSI connectors. The connectors are located at JA1, JA2 and JA3. Pin Number Functi on 1 G N D 2 G N D 3 G N D 4 G N D 5 G N D 6 G N D 7 G N D 8 G N D 9 G N D 10 G N D 11 G N D 12 G N D 13 G N D 14 G N D 15 G N D 16 G N D 17 T e rm [...]

2-18 S UPER P3TDDR User’s Manual 2-9 Installing Software Drivers After all the hardware has been installed you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. After inserting this CD into your CDROM drive, the display shown in Figure 2-5 should appear. (If th[...]

3-1 Chapter 3: Troubleshooting Chapter 3 Troubleshooting 3- 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the "Technical Support Procedures" and/or "Returning Merchandise for Service" section(s) in this c[...]

3-2 S UPER P3TDDR User’s Manual 3-2 Technical Support Procedures Before contacting Technical Support, please take the following steps. Also, note that as a motherboard manufacturer, Supermicro does not sell directly to end-users, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any p[...]

3-3 Chapter 3: Troubleshooting 3. If you still cannot resolve the problem, include the following information when contacting Supermicro for technical support: • Motherboard model and PCB revision number • BIOS release date/version (this can be seen on the initial display when your system first boots up) • System configuration An example of a [...]

3-4 S UPER P3TDDR User’s Manual Question: After flashing the BIOS my system does not have video. How can I correct this? Answer: If the system does not have video after flashing your new BIOS, it indicates that the flashing procedure failed. To remedy this, first clear CMOS per the instructions in this manual and retry the BIOS flashing proce- du[...]

3-5 Chapter 3: Troubleshooting 3- 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number sho[...]

3-6 S UPER P3TDDR User’s Manual Notes[...]

Chapter 4: Award BIOS 4-1 Chapter 4 AwardBIOS 4-1 Introduction This chapter describes the AwardBIOS for the P3TDDR. The Award ROM BIOS is stored in a Flash chip and can be easily upgraded using a floppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this m[...]

S UPER P3TDDR User's Manual 4-2 4-2 Running Setup *Optimal default settings are in bold text unless otherwise noted. The BIOS setup options described in this section are selected by choos- ing the appropriate text from the Main BIOS Setup screen. All displayed text is described in this section, although the screen display is often all you need[...]

Chapter 4: Award BIOS 4-3 Main BIOS Setup Menu Main Setup Features Date/Time Set the system date and time. Key in the correct information in the "mm", "dd" and "yy" fields. Press the "Enter" key to save the data. Drive A/Drive B These settings allow the user to set the type of floppy disk drive installed in t[...]

S UPER P3TDDR User's Manual 4-4 IDE HDD Auto-Detection Press the <Enter> key to activate the "IDE HDD Auto-Detection" function, which will allow BIOS to automatically detect the status of the IDE HDD installed in the system, such as the size and number of cylinders. IDE Primary Master This option allows the user to determine th[...]

Chapter 4: Award BIOS 4-5 IDE Primary Master/Slave UDMA This is available only when your IDE drive supports UDMA and the operating environment also includes a UDMA drive. If your IDE hard drive and your system software both support UDMA, select Auto to enabled BIOS support. The options for this setting are " Auto " and "Disabled"[...]

S UPER P3TDDR User's Manual 4-6 4-4.1 Advanced BIOS Features When the required item in the "Advanced BIOS Features" is highlighted, press the <Enter> key to activate the selection, as shown below: 4-4 Advanced BIOS Setup Choose Advanced BIOS Setup from the Award BIOS Setup Utility main menu with the Left/Right arrow keys. You s[...]

Chapter 4: Award BIOS 4-7 Auto Detect DIMM/PCI CLK If enabled, this feature will allow the BIOS automatically to detect the status of the DIMM/PCI clock. The settings are " Enabled " and "Disabled". Init Display First This setting allows the user to determine which device will be first displayed when the sytem boots up - a devic[...]

S UPER P3TDDR User's Manual 4-8 Typematic Rate (Chars/Sec) You may change this setting only if the Typmatic Rate Setting is enabled. This setting allows the user to set the number of times a key stroke repeats itself in a second when the key is held down. The options are " 6 ", "8", "10", "12", "15&[...]

Chapter 4: Award BIOS 4-9 4- 4. 2 Advanced Chipset Features This section covers the functions used for configuring the system based upon the special features offered by the VIA Apollo 266 chipset. The chipset manages the operations of major components of the board. Normally, the default settings for the Advanced Chipset Features listed in the secti[...]

S UPER P3TDDR User's Manual 4-10 Host & AGP Bridge Control This section documents the AwardBIOS management of the bus links between host and bridge devices. Memory Parity / ECC Check "Enabled" adds a parity check to the boot-up memory tests. Select "Enabled" only if the system DRAM contains parity. Settings are " E[...]

Chapter 4: Award BIOS 4-11 PCI Delayed Transition If "enabled", the PCI signal transition will be delayed. The settings are "Enabled" and " Disabled ". On-Chip IDE Channel 10/11 If "Enabled", the BIOS support of onchip IDE 10/11 will be activated. The settings are " Enabled " and "Disabled"[...]

S UPER P3TDDR User's Manual 4-12 When the above menu appears, select the items and press the <Enter> key to display the options: 4-4.3 Integrated Peripherals When the item "Integrated Peripherals" is highlighted, press the <Enter> key to activate the following sub-menu screen: Onboard FDC Controller Select "Enabled&q[...]

Chapter 4: Award BIOS 4-13 Onboard Serial Port 1 This option allows the user to set the address and the corresponding IRQ for Serial Port 1. The settings are "Disabled" " 3F8/IRQ4 ", "2F8/IRQ3", "3E8/ IRQ4", "2E8/IRQ3" and "Auto". Onboard Serial Port 2 This option allows the user to set th[...]

S UPER P3TDDR User's Manual 4-14 Parallel Port Mode This option sets the mode for the onboard Parallel Port. The settings are "SPP", "EPP", " ECP " and "ECP+EPP". EPP Mode Select This option allows the user to select the EPP mode. The settings are "EPP 1.9" and " EPP 1.7 ". ECP Mode U[...]

Chapter 4: Award BIOS 4-15 4- 4. 4 Hardware Monitors When the item "Hardware Monitors" is highlighted, press the <Enter> key to activate the sub-menu, shown below: CPU Warning Temperatures This item allows the user to set the CPU temperature threshold. When the CPU temperature reaches the set threshold temperature, an alarm will sou[...]

S UPER P3TDDR User's Manual 4-16 4-4.5 Pr ocessor Features When the item "Processor Features" is highlighted, press the <Enter> key to activate the sub-menu, shown below: CPU L1 Cache Set this option to "Enabled" to activate the CPU L1 cache. The settings are " Enabled " and "Disabled". CPU L2 Cach[...]

Chapter 4: Award BIOS 4-17 4-5 PnP/PCI Configurations Highlight the item "PnP/PCI" on the main menu bar to activate the following screen: CPU L2 Cache ECC Checking Set this option to "Enabled" to activate the ECC checking of the CPU L2 cache. The settings are "Disabled" and " Enabled ". Processor Number Featu[...]

S UPER P3TDDR User's Manual 4-18 PCI Slot 1/2/3 IRQ Select This feature allows the user to determine the PCI interrupts or (by choosing "Auto") allows the system to make such a determination. The setting options are " Auto ", "3", "4", "5", "7", "9", "10" and "[...]

Chapter 4: Award BIOS 4-19 PCI/VGA Palette Snoop For best system performance, this item has been pre-set to "Disabled" by the manufacturer. The settings are "Enabled" and " Disabled ". Assign IRQ for VGA The "Enabled" setting allows the AwardBIOS to assign an IRQ for the VGA devices. The settings are " E[...]

S UPER P3TDDR User's Manual 4-20 ACPI Function This item allows you to Enable and Disable the Advanced Configuration and Power Management. The settings are " Enabled " and "Disabled". ACPI Suspend Type This item allows the user to determine the ACPI Suspend type. The settings are " S1 (POS) " and "S3 (STR)&qu[...]

Chapter 4: Award BIOS 4-21 Video Off Option This option sets the status of video device and monitor when the system is in the Suspend Mode. When set to "Always On", the video device and the monitor will always be on when the system is in the suspend mode. When set to " Suspend-Off ", the video device and the monitor will be turn[...]

S UPER P3TDDR User's Manual 4-22 4- 7 Boot-up Devices When the Item "Boot" is highlighted on the main menu bar, you should see the following screen: Award BIOS attempts to load the operating system from devices specified by the users in a user-specified sequence. Boot ROM Order This item allows the user to set the order of the boot-u[...]

Chapter 4: Award BIOS 4-23 First Boot Device This item allows the user to set the first boot-up device. The settings are " Floppy ", "LS120", "HDD-0", "SCSI", "CDROM", "HDD-1", "HDD-2", "HDD-3", "ZIP100", "LAN" and "Disabled". Second Boot D[...]

S UPER P3TDDR User's Manual 4-24 4-8 Security Setup When the Item "Security" is highlighted on the main menu bar, you should see the following screen: Set Supervisor's Password When the item "Set Supervisor Password" is highlighted on the above screen, hit the <Enter> key. When prompted, type a password in the di[...]

Chapter 4: Award BIOS 4-25 4-9 Exit Setup Select "Exit" from the Main Menu bar to activate the following screen:[...]

S UPER P3TDDR User's Manual 4-26 Save & Exit Setup When the item "Save & Exit" is highlighted, press the <Enter> key. If you then highlight the letter "Y" and press <Enter>, you will save the changes you've made in the BIOS program (CMOS) and exit Setup. Your system should then continue with the boo[...]

Appendix A: AwardBIOS Post Messages APPENDIX A A-1 Appendix A AwardBIOS POST Messages During the Power-On Self-Test (POST), the BIOS will check for errors. If an error is found and a correction is needed, the BIOS will activate an alarm or display a message. If a message is displayed, it will be accompanied by the following: PRESS F1 TO CONTINUE, C[...]

S UPER P3TDDR User’s Manual A-2 DISKETTE DRIVES OR TYPES MISMATCH ERROR - RUN SETUP The type of diskette drive installed in the system is different from the CMOS definition. Run Setup to reconfigure the drive type correctly. DISPLAY SWITCH IS SET INCORRECTLY The display switch on the motherboard can be set to either monochrome or color. This indi[...]

A-3 Appendix A: AwardBIOS POST Messages Memory Address Error at ... Indicates a memory address error at a specific location. You can use this location along with the memory map for your system to find and replace the bad memory chips. Memory parity Error at ... Indicates a memory parity error at a specific location. You can use this location along [...]

S UPER P3TDDR User’s Manual A-4 FLOPPY DISK(S) fail (80) ® Unable to reset floppy subsystem. FLOPPY DISK(S) fail (40) ® Floppy Type dismatch. Hard Disk(s) fail (80) ® HDD reset failed Hard Disk(s) fail (40) ® HDD controller diagnostics failed. Hard Disk(s) fail (20) ® HDD initialization error. Hard Disk(s) fail (10) ® Unable to recalibrate [...]

Appendix B: AwardBIOS POST Codes B-1 This section lists the POST (Power On Self Testing) Codes for the Award BIOS. POST (hex) Description CFh Test CMOS R/W functionality. C0h Early chipset initialization: -Dis able sha dow RA M -Disable L2 cache (so cket 7 or belo w) -Program basi c chipset registers C1 h De t e ct me mo r y -Au to-detection of DRA[...]

S UPER P3TDDR User’s Manual B-2 POST (hex) Description 0Fh Reserved 10h Auto detect flas h type to load appropriate flash R/W codes into the run time area in F000 for ESCD & DMI support. 11h Reserved 12h Use w alking 1’s algorithm to chec k out interface in CMOS circuitry . Also s et real-tim e clock power s tatus, and then check for overri[...]

Appendix B: AwardBIOS POST Codes B-3 2Dh 1. Initialize multi-language 2. Put information on screen display, including Aw ard title, CPU type, CP U speed …. 2Eh Reserved 2Fh Reserved 30h Reserved 31h Reserved 32h Reserved 33h Reset keyboard exce pt Winbo nd 977 series Super I/O chips. 34h Reserved 35h Reserved 36h Reserved 37h Reserved 38h Reserve[...]

S UPER P3TDDR User’s Manual B-4 POST (hex) Description 58h Reserved 59h Initialize the combined Tr e nd Anti-Virus code. 5Ah Reserved 5Bh (Optional Feature) Show message for entering AWDFLA SH . EXE from FDD (o p tional) 5Ch Reserved 5Dh 1. Initialize Init_Onboard_Super_I O switch. 2. Initialize Init_Onboard_AUDIO switch. 5Eh Reserved 5Fh Reserve[...]

Appendix B: AwardBIOS POST Codes B-5 POST (hex) Description 80h Reserved 81h Reserved 82h 1. Call chipset power m anagement hook. 2. Recover the text font used by EPA logo (not for full s creen logo) 3. If pass word i s set, as k f or passw ord. 83h Save all data in stack back to CMOS 84h Initialize ISA PnP bo ot devices 85h 1. USB final Initializa[...]

S UPER P3TDDR User’s Manual B-6 Notes[...]

Appendix C: AwardBIOS Beep Codes C-1 This section lists the Award BIOS Error Beep Codes. Beep Code Error Message Description 1 short beep System boot. 2 short beeps Incorrect CMOS setting. 1 long + 1 short DRAM error. 1 long + 2 short VGA error. 1 long + 3 short Keyboard error. 1 long + 9 short ROM error. Long beeps Memory module error. High beeps [...]

S UPER P3TDDR User’s Manual C-2 Notes[...]