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Compaq M-LVDS manual

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Table of contents for the manual

  • Page 1

    Multipoint-Low V oltage Dif fer ential S ignaling (M-L VDS) E valuation Module April 2004 High Performance Analog User ’ s G uide SLLU039B[...]

  • Page 2

    IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orde[...]

  • Page 3

    EVM IMPORT ANT NOTICE T exas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EV ALUA TION PURPOSES ONL Y and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of[...]

  • Page 4

    EVM W ARNINGS AND RESTRICTIONS It is important to operate this EVM within the supply voltage range of 3 V to 3.6 V . Exceeding the specified supply range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the supply range, please contact a TI field representative prior to connecting the input pow[...]

  • Page 5

    v Read This First Preface How to Use This Manual This document contains the following chapters: - Chapter 1 — The M-L VDS Evaluation Module - Chapter 2 — T est Setup - Chapter 3 — Bill of Materials, Board Layout, and PCB Construction - Appendix A — Schematic Related Documentation From T exas Instruments and Others - Introduction to M-L VDS [...]

  • Page 6

    vi[...]

  • Page 7

    Running Title — Attribute Reference vii Chapter Title — Attribute Reference Contents 1 The M-L VDS Evaluation Module 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Overview 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 8

    Running Title — Attribute Reference viii Figures 1 − 1. M-L VDS Unit Interval Definition 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 − 2. Expanded Graph of Receiver Dif ferential Input V oltage Showing T ransition Region 1-4 . . . . 1 − 3 Point-to-Point Simplex Circuit 1-5 . . . . [...]

  • Page 9

    1-1 The M-L VDS Evaluation Module The M-L VDS Evaluation Module This document describes the multipoint low-voltage differential-signaling (M-L VDS) evaluation module (EVM) used to aid designers in development and analysis of this new signaling technology . The T exas Instruments SN65ML VD200A, SN65ML VD201, SN65ML VD202A, SN65ML VD203, SN65ML VD204[...]

  • Page 10

    Overview 1-2 The M-L VDS Evaluation Module 1.1 Overview The EVM comes with all the production devices in T able 1 − 1. The SN65ML VD201 and SN65ML VD207 are installed on the circuit board, and ca n easily be replaced with the other devices supplied. The M-L VDS devices evaluated with this EVM are in the SN75ALS180 and SN75176 footprint. Use of th[...]

  • Page 11

    M-L VDS Standard TIA/EIA − 899 1-3 The M-L VDS Evaluation Module The EVM has been designed with the individual driver and receiver section (SN75ALS180 footprint, U1) on one half of the board and the transceiver section (SN75176 footprint, U2) on the other half (see Figure 3 − 1). The EVM as delivered incorporates two 100- Ω termination resist[...]

  • Page 12

    M-L VDS EVM Kit Contents 1-4 The M-L VDS Evaluation Module T able 1 − 2. Receiver Input V oltage Threshold Requirements Receiver T ype Low High T ype-1 − 2.4 V ≤ V ID ≤ − 0.05 V 0.05 V ≤ V ID ≤ 2.4 V T ype-2 − 2.4 V ≤ V ID ≤ 0.05 V 0.15 V ≤ V ID ≤ 2.4 V Figure 1 − 2. Expanded Graph of Receiver Differential Input V oltage S[...]

  • Page 13

    Configurations 1-5 The M-L VDS Evaluation Module 1.4 Configurations The M-L VDS EVM board allows the user to construct various bus configurations. The two devices on the EVM allow for point-to-point simplex, parallel-terminated point-to-point simplex, and two-node multipoint operation. All of these modes of operation can be configured through onboa[...]

  • Page 14

    Configurations 1-6 The M-L VDS Evaluation Module 1.4.2 Multidrop A multidrop configuration (see Figure 1 − 5) with two receiver nodes can be simulated with the EVM. T o get additional receiver nodes on the same bus requires additional EVMs. M-L VDS controlled driver transition times and higher signal levels help to accommodate the multiple stubs [...]

  • Page 15

    Configurations 1-7 The M-L VDS Evaluation Module Figure 1 − 7. T wo-Node Multipoint Circuit T U1 U2 T 1.4.4 EVM Operation With Separate Power Supplies The EVM has been designed with independent power planes for the two devices. The two devices can be powered with independent supplies or with a single supply . Sending and receiving data between ba[...]

  • Page 16

    Recommended Equipment 1-8 The M-L VDS Evaluation Module Figure 1 − 8. EVM Configuration for Including a Ground Potential Difference V oltage Between Nodes PS1 PS2 PS3 Jumpers removed from W7, W8, W9, W10 W9 W7 W8 W10 J13 J14 J17 J18 + − + − + − 1.5 Recommended Equipment - 3.3 Vdc at 0.5-A power supply or multiple power supplies (with both d[...]

  • Page 17

    2-1 T est Setup T est Setup This chapter describes how to setup and use the M-L VDS EVM. T opic Page 2.1 T ypical Cable T est Configurations 2-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 T est Results 2-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chapter 2[...]

  • Page 18

    T ypical Cable T est Configurations 2-2 T est Setup 2.1 T ypical Cable T est Configurations Each of the following test configurations is a transmission line consisting of a twisted-pair cable connected on the 2-pin connectors (P1, P2, or P3). T able 2 − 1 shows the possible configurations. In addition to the different transmission topologies, the[...]

  • Page 19

    T ypical Cable T est Configurations 2-3 T est Setup 2.1.2 Point-to-Point Parallel T erminated Simplex T ransmission 1) Connect a twisted-pair cable from P1 to P2. 2) V erify resistor R4 and R7 are installed. 3) Remove resistors R5 and R6. This properly terminates the transmission line at both ends. 4) Enable the driver by connecting the jumper on W[...]

  • Page 20

    T ypical Cable T est Configurations 2-4 T est Setup Figure 2 − 3. T wo-Node Multipoint T ransmission R16 100 P3 R3 49.9 R5 100 U1 R7 100 R6 100 J2 9 10 5 P2 T wisted Pair Cable Input Signal R14 49.9 R4 100 U2 R15 100 U1 J8 11 12 2 7 6 4 Input Signal R13 453 J7 TP3 R2 453 J1 Output Signal TP1 TP4 3 W1 V CC Jumper 1 3 W4 V CC Jumper 2 W3 Jumper V C[...]

  • Page 21

    T est Results 2-5 T est Setup 2.2 T est Results The test configurations described in Section 2.1 were used to simulate point- to-point simplex, parallel-terminated point-to-point simplex, and two-node multipoint. The test results are shown in the following figures. A T ektronix HFS9003 was used to generate input signals, and a T ektronix TDS784D wa[...]

  • Page 22

    T est Results 2-6 T est Setup signal on TP1, R2 is shorted. T ype-2 behavior is again observed on the SN65ML VD207 receiver output. T race three shows the differential voltage on the bus. Note that the bus volt- ages are nominal M-L VDS levels of 1.1 V PP due to the lower load seen by the current driver . Figure 2 − 5. Parallel T erminated Point-[...]

  • Page 23

    3-1 Bill of Materials, Board Layout, and PCB Construction Bill of Materials, Board Layout, and PCB Construction This chapter contains the bill of materials, board layout of the M-L VDS, and describes the printed-circuit board. T opic Page 2.1 Bill of Materials 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 24

    Bill of Materials 3-2 Bill of Materials, Board Layout, and PCB Construction 3.1 Bill of Materials T able 3 − 1. M-L VDS EVM Bill of Materials Item No. Qty . Reference Designation Description MFG Part # Not Installed 1 2 C1, C2 Capacitor , SMT1206, 50 V , 10%, 0.01 µ F AV X 12101C103JA TMA 2 4 C5, C6, C9, C10 Capacitor , SMT1206, 16 V , 10%, 1 µ[...]

  • Page 25

    Board Layout 3-3 Bill of Materials, Board Layout, and PCB Construction 3.2 Board Layout Figure 3 − 1. Assembly Drawing GND01 VCC01 VCC GND VCC01 GND01 GND VCC VCC GND GND01 VCC01 TEXAS INSTRUMENTS A/W NO. # 6424409B PW A. EVM. SN65ML VD SERIAL NO. MADE IN U.S.A. GND VCC VCC01 GND01 GND01 VCC01 GND VCC U1 J10 J9 J8 J7 J6 J4 J3 J2 J1 J17 J15 J13 J1[...]

  • Page 26

    Board Layout 3-4 Bill of Materials, Board Layout, and PCB Construction The second layer of the EVM has the separate ground planes. These are the reference planes for the controlled impedance traces on the top layer . Figure 3 − 3. Second Layer The third layer of the EVM has the power planes. These are matched to the ground planes to reduce radiat[...]

  • Page 27

    Board Layout 3-5 Bill of Materials, Board Layout, and PCB Construction The bottom layer of the EVM contains bulk and decoupling capacitors to be placed close to the power and ground pins on the device. Figure 3 − 5. Bottom Layer C9 C8 C7 C5 C4 C3 C10 C6 C2 C1 VCC GND VCC01 GND01[...]

  • Page 28

    PCB Construction 3-6 Bill of Materials, Board Layout, and PCB Construction 3.3 PCB Construction Information in this section was obtained from the following source: - Electromagnetic Compatibility Printed Circuit Board and Electronic Module Design, VEC workshop, V iolette Engineering Corporation. Characteristic impedance is the ratio of voltage to c[...]

  • Page 29

    PCB Construction 3-7 Bill of Materials, Board Layout, and PCB Construction Figure 3 − 6. T race Configurations in Printed-Circuit Boards MICROSTRIP STRIPLINE Board Material W h t W t W S Stripline construction is the preferred configuration for differential signaling. This configuration reduces radiated emissions from circuit board traces due to [...]

  • Page 30

    PCB Construction 3-8 Bill of Materials, Board Layout, and PCB Construction T able 3 − 2 shows the layer stack up of the EVM with the defined trace widths for the controlled impedance etch runs using microstrip construction. T able 3 − 2. EVM Layer Stack Up Differential Model Single-Ended Model Material T ype: FR 406 Layer No. Layer T ype Thickn[...]

  • Page 31

    A-1 Schematic Schematic This Appendix contains the EVM schematic. Appendix A[...]

  • Page 32

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