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Cypress CY7C1018DV33 manual

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Table of contents for the manual

  • Page 1

    1-Mbit (128K x 8) S t atic RAM CY7C1018DV33 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 38-05465 Rev . *D Revised November 8, 2006 Features • Pin- and function-compatible with CY7C1 018 CV33 • High speed —t AA = 10 ns • Low Active Power —I CC = 60 mA @ 10 ns • Low C[...]

  • Page 2

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 2 of 9 Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) S torage T emperature ............. .............. ...... –65°C to +150°C Ambient T emperature with Power Applied ........... ............................ ...... –55°C to +125°C Supply V ol[...]

  • Page 3

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 3 of 9 Cap acit ance [3] Parameter Description T est Conditions Max. Unit C IN Input Capacitance T A = 25°C, f = 1 MHz, V CC = 3.3V 8 p F C OUT Output Capacitance 8 pF Thermal Resist ance [3] Parameter Description T est Conditions 400-Mil Wide S OJ Unit Θ JA Thermal Resistance (Junction to Ambient) [...]

  • Page 4

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 4 of 9 AC Switching Characteristics Over the Opera ting Range [5] Parameter Description –10 (Industrial) Unit Min. Max. Read Cycle t power [6 ] V CC (typical) to the first access 100 µ s t RC Read Cycle Time 10 ns t AA Address to Data V al id 10 ns t OHA Data Hold from Address Change 3 ns t ACE CE [...]

  • Page 5

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 5 of 9 Dat a Retention Characteristics (Over the Operating Range) Parameter Description Conditions Min. Max. Unit V DR V CC for Data Retention 2 V I CCDR Data Retention Current V CC = V DR = 2.0V , CE > V CC – 0.3V , V IN > V CC – 0.3V or V IN < 0.3V 3m A t CDR [3] Chip Deselect to Data R[...]

  • Page 6

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 6 of 9 Write Cycle No. 1 (CE Controlled) [16, 17] Write Cycle No. 2 (WE Controlled, OE HI GH During Write) [16, 17] Switching W aveforms (continued) t WC DA T A V ALID t AW t SA t PWE t HA t HD t SD t SCE t SCE CE WE DA T A I/O ADDRESS t HD t SD t PWE t SA t HA t AW t SCE t WC t HZOE DATA IN VALID NOT[...]

  • Page 7

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 7 of 9 Write Cycle No. 3 (WE Controlled , OE LOW) [1 1, 17] T ruth T able CE OE WE I/O 0 –I/O 7 Mode Power H X X High-Z Power-down S tandby (I SB ) L L H Data Out Read Active (I CC ) L X L Data In Write Active (I CC ) L H H High-Z Selected, Outputs Disabled Active (I CC ) Ordering Information Speed [...]

  • Page 8

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 8 of 9 © Cypress Semi con duct or Cor po rati on , 20 06 . The information con t a in ed he re i n is su bject to change wit hou t notice. Cypr ess S em ic on duct or Corpo ration assu mes no resp onsib ility for th e u se of any circuitry o ther than circui try embodied in a Cypress prod uct. Nor do[...]

  • Page 9

    CY7C1018DV33 Document #: 38-05465 Rev . *D Page 9 of 9 Document History Page Document Title: CY7C1018DV33, 1-Mbit (128K x 8) St atic RAM Document Number: 38-05465 REV . ECN NO. Issue Date Orig. of Change Description of Change ** 201560 See ECN SWI Advance Information da ta sheet for C9 IPP *A 238471 See ECN RKF DC parameters modified as per EROS (S[...]