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Cypress CY8C24123A manual

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  • Page 1

    CY8C24123A CY8C24223A, CY8C24423A PSoC ® Programmable System-on-Chip™ Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-12028 Rev . *I Revised December 1 1, 2008 Features ■ Powerful Harvard Architecture Processor ❐ M8C Processor S peeds to 24 MHz ❐ 8x8 Multiply , 32-[...]

  • Page 2

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 2 of 56 PSoC ® Functional Overview The PSoC family consists of many Mixed-Signal Array wi th On-Chip Controller devices. T hese devices are designe d to replace multiple traditional M CU-base d system components with a low cost single-chip p rogrammable device. PSoC devices[...]

  • Page 3

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 3 of 56 Analog System The Analog System consists of s ix configurabl e blocks, each consisting of an opamp circuit that allows the creation of complex analog signal flows. Ana log peripherals are very flexible and can be customized to support spec ific application requiremen[...]

  • Page 4

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 4 of 56 Additional System Resources System Resources, some of which a re listed in the previous sections, provide additio nal capability useful to complete systems. Additional resources include a multip lier , decimator , switch mode pump, low voltage detection, and power on[...]

  • Page 5

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 5 of 56 Development T ools PSoC Designer is a Microsoft ® Windows-ba sed, integrated development environment for th e Programmable System-on-Chip (PSoC) devic es. The PSoC Designe r IDE and application runs on Windows NT 4.0, Windows 2000, Wi ndows Millennium (Me), or Windo[...]

  • Page 6

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 6 of 56 Debugger The PSoC Designer Debugger s ubsystem provides hardware in-circuit emulation, allowi ng t he designer to test the program in a physical system while providi ng an internal view of the PSoC device. Debugger commands allo w the designer to read and program and[...]

  • Page 7

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 7 of 56 The next step is to write your main program, and an y sub-routine using PSoC Designer ’s Application Editor subsystem. The Application Editor incl udes a Proj ect Manag er that allows you to open the project source code fi les (including all ge nerated code files) [...]

  • Page 8

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 8 of 56 Pinout s This section describes, lists, and illustra tes the CY8C24x23A PSoC device pins and pi nout configurati ons. Every port pin (label ed with a “P”) is capable of Digital IO. However , Vss, Vdd, SMP , and XRES are not capable of Digital IO. 8-Pin Part Pinou[...]

  • Page 9

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 9 of 56 20-Pin Part Pinout T able 4. Pin Definitions - 20-Pin PDIP , SSOP , a nd SOIC Pin No. Ty p e Pin Name Description Figure 6. CY8C24223A 20-Pin PSoC Device Digit al Analog 1 IO I P0[7] Analog Column Mux Input 2 IO IO P0[5] Analog Column Mux Input and Column Output 3 IO[...]

  • Page 10

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 10 of 56 28-Pin Part Pinout T able 5. Pin Definitions - 28-Pin PDIP , SSOP , a nd SOIC Pin No. Ty p e Pin Name Description F igure 7. CY8C24423A 28-Pin PSoC Device Digit al Analog 1 IO I P0[7] Analog Column Mux Input 2 IO IO P0[5] Analog Column Mux Input and column output 3 [...]

  • Page 11

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 1 1 of 56 32-Pin Part Pinout T able 6. Pin Definitions - 32-Pin QFN** Pin No. Ty p e Pin Name Description Figure 8. CY8C24423A 32-Pin PSoC Device Digita l Analog 1 IO P2[7] 2 IO P2[5] 3 IO I P2[3] Direct Switched Capacitor Block Input 4 IO I P2[1] Direct Switched Capacitor B[...]

  • Page 12

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 12 of 56 56-Pin Part Pinout The 56-pin SSOP part is for the CY8C24000A On-Chip Debug (OCD) PSoC device. Note This part is only used for in-circuit debugging. It is NOT available for productio n. T able 7. Pin Defini tions - 56-Pin SSOP Pin No. Ty p e Pin Name Descriptio n Di[...]

  • Page 13

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 13 of 56 34 IO P1[6] 35 IO P5[0] 36 IO P5[2] 37 IO P3[0] 38 IO P3[2] 39 IO P3[4] 40 IO P3[6] 41 Input X R E S Active high ex ternal reset with internal pull down. 42 OCD HCLK OCD high-speed clock output. 43 OCD CCLK OCD CPU clock output. 44 IO P4[0] 45 IO P4[2] 46 IO P4[4] 4[...]

  • Page 14

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 14 of 56 Register Reference This section lists the registers of the CY8C24x23 A PSoC device. For detailed register information, refer the PSoC Programmable Sytem-on-Chip Reference Manual . Register Conventions Abbreviation s Us ed The register conventions specific to th is s[...]

  • Page 15

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 15 of 56 T able 9. Register Map Bank 0 T able: Us er Space Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access PRT0DR 00 R W 40 ASC10CR0 80 RW C0 PRT0IE 01 RW 41 ASC10CR1 81 R W C1 PRT0GS 02 RW 42 ASC10CR2 82 R W C2 PRT0DM2 03 [...]

  • Page 16

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 16 of 56 3E 7E BE CPU_SCR1 FE # 3F 7F BF CPU_SCR0 FF # T able 9. Register Map Bank 0 T able: Us er Space (continued) Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access Blank fields are Reserved and must not be accessed. # Acce[...]

  • Page 17

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 17 of 56 37 ACB01CR2 77 RW B7 CPU_F F7 RL 38 78 B8 F8 39 79 B9 F9 3A 7A BA FA 3B 7B BB FB 3C 7C BC FC 3D 7D BD FD 3E 7E BE CPU_SCR1 FE # 3F 7F BF CPU_SCR0 FF # T able 10. Register Map Ban k 1 T able: Config ura tion Space (continued) Name Addr (1,Hex) Access Name Addr (1,Hex[...]

  • Page 18

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 18 of 56 Electrical Specifications This section presents the DC and AC electric al specifications of the CY 8C24x2 3A PSoC device. For the latest electrical specific ations, check if you have the most recent da ta sheet by visiting the w eb at http://www .cyp ress.com/psoc .[...]

  • Page 19

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 19 of 56 Absolute M aximum Ra tings Exceeding maximum ratings may shorten the useful li fe of the device. User guidelines are not teste d. Operating T emperature T able 12. Absolute Maximum Ratings Symbol Description Min Ty p Ma x Unit s Notes T STG S torage T emperature -55[...]

  • Page 20

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 20 of 56 DC Electrical Characterist ics DC Chip-Level Specificatio ns Ta b l e 1 4 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 °[...]

  • Page 21

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 21 of 56 DC General Purpose IO Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3[...]

  • Page 22

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 22 of 56 DC Operational Amplifi er Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V [...]

  • Page 23

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 23 of 56 T able 18. 3.3V DC Ope rational Amplifier Specifications Symbol Description Min Ty p Ma x Units Notes V OSOA Input Offset V oltage (absolute value) Power = Low , Opamp Bias = High Power = Medium, Opamp Bias = High High Power is 5 V olts Only – – 1.65 1.32 10 8 m[...]

  • Page 24

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 24 of 56 DC Low Power Comparator Specifications Ta b l e 2 0 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V an[...]

  • Page 25

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 25 of 56 DC Analog Output Bu ffer Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V t[...]

  • Page 26

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 26 of 56 DC Switch Mode Pu mp Specifications Ta b l e 2 4 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V and -[...]

  • Page 27

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 27 of 56 Figure 13. Basic Switch Mode Pump Circuit Δ V PUMP_Line Line Regulation (over V BA T range) – 5 – %V O Configuration listed in footnote . a V O is the “Vdd V alue for PUMP T r ip ” specified by the VM[2:0] setting in the DC POR and L VD S pecifi cation, T a[...]

  • Page 28

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 28 of 56 DC Analog Refe rence Specificatio ns The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3[...]

  • Page 29

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 29 of 56 – RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 0.5V) P2[4] + P2[6] - 0.075 P2[4] + P2[ 6] - 0.009 P2[4] + P2[6] + 0.057 V – RefHi = 3.2 x BandGap Not Allowed – RefLo = Vdd/2 - Band Gap Not Allowed – RefLo = BandGap Not Allowed – RefLo = 2 x BandGap - P2[6[...]

  • Page 30

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 30 of 56 DC Analog PSoC Block Specifications Ta b l e 2 9 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V and -[...]

  • Page 31

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 31 of 56 DC Programming Specifications Ta b l e 3 1 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V and -40 ° [...]

  • Page 32

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 32 of 56 AC Electrical Characterist ics AC Chip-Level Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ?[...]

  • Page 33

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 33 of 56 T able 32. 2.7V AC Chip-Level Specifications Symbol Description Min Ty p Max Unit s Notes F IMO12 Internal Main Oscillator Frequency for 12 MHz 11 . 5 12 12.7 a,b,c MHz Trimmed for 2.7V operation using factory trim values. See Figure 12 on page 18. SLIMO mode = 1. F[...]

  • Page 34

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 34 of 56 Figure 14. PLL Lock Timing Diagram Figure 15. PLL Lock for Low Gain Setting Timing Diagram Figure 16. External Cr ystal Oscillator St ar tup Timing Diagram Figure 17. 24 MHz Period Jitter (IMO) Timing Diagram Figure 18. 32 kHz Period Jitter (ECO) Timing Diagram 24 M[...]

  • Page 35

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 35 of 56 AC General Purpose IO Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3[...]

  • Page 36

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 36 of 56 AC Operational Amplifier Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V t[...]

  • Page 37

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 37 of 56 T able 37. 2.7V AC Ope rational Amplifier Specifications Symbol Description Min Ty p Max Unit s T ROA Rising Settling Time from 80% of Δ V to 0.1% of Δ V (10 pF load, Unity Gain) Power = Low , Opamp Bi as = Low Power = Medium, Opamp Bias = High – – – – 3.9[...]

  • Page 38

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 38 of 56 When bypassed by a capacitor on P2[4], the noise of the anal og g r ound signal distributed to e ach bl ock is reduced by a factor o f up to 5 (14 dB). This is at frequencies above the corner frequency defined by the on-chip 8.1k re sistance and the external capacit[...]

  • Page 39

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 39 of 56 AC Low Power Comparator Specifications Ta b l e 3 8 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V an[...]

  • Page 40

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 40 of 56 T able 40. 2.7V AC Digit al Block Specifications Function Description Min Ty p Max Units Notes All Functions Maximum Block C locking Frequency 12.7 MHz 2.4V < Vdd < 3.0V Ti m e r Capture Pu lse Wi d th 100 a – 0 – 0 ns Maximum Frequency , With or Without C[...]

  • Page 41

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 41 of 56 AC Analog Output Buffer Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to[...]

  • Page 42

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 42 of 56 AC External Clock Specifications The following tables li st the guaranteed maximum and minimum sp ec ifications for the voltage and tempera ture ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V [...]

  • Page 43

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 43 of 56 AC Programming Specifications Ta b l e 4 7 lists the gu aranteed maximum and minimum specific ations for the voltage an d temperature ranges: 4.75V to 5 .25V and -40 ° C ≤ T A ≤ 85 ° C, 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C, or 2.4V to 3.0V and -40 ° [...]

  • Page 44

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 44 of 56 Figure 22. Definition for T iming for Fast/S ta ndard Mode o n the I 2 C Bus T SUST OI2C Setup T ime for ST OP C ondition 4.0 –0 . 6 – μ s T BUFI2C Bus Free T ime Between a STOP and ST ART Condition 4.7 –1 . 3 – μ s T SPI2C Pulse Width of spikes are suppre[...]

  • Page 45

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 45 of 56 Packaging Information This section illustrates the packaging spec ification s for the C Y8C24x23A PSoC device , along with th e thermal impedances fo r eac h package and the typical package capacit ance on crystal pins. Important Note Emulation tools may re quire a [...]

  • Page 46

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 46 of 56 Figure 24. 8- Pin (150-Mil) SOIC Figure 25. 20-Pin (300-Mil) Molded DIP 0.0075[0.190] 0.0098[0.249] 1. DIMENSIONS IN INCHES[MM] MI N. RECTANGULAR ON MATRIX LEADFRAME SEATING PL ANE PIN 1 ID 0.230[ 5.842] 0.244[ 6.197] 0.157[3.987] 0.150[3.810] 0.189[4.800 ] 0.196[4.[...]

  • Page 47

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 47 of 56 Figure 26. 20-Pin (210-Mil) SSOP Figure 27. 20-Pin (300-Mil) Mo lded SOIC 51-85077 *C 51-85024 *C [+] Feedback[...]

  • Page 48

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 48 of 56 Figure 28. 28-Pin (300-Mil) Molded DIP Figure 29. 28-Pin (210-Mil) SSOP 51-85014 *D 51-850 79 *C [+] Feedback[...]

  • Page 49

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 49 of 56 Figure 30. 28-Pin (300-Mil) Mo lded SOIC Figure 31. 32-Pin (5x5 mm) QFN 51-850 26 *D 32 X = 138 MI L Y = 138 MI L AD X, Y for this product is 3.53 mm, 3.53 mm ( +/- 0.1 1 mm) TOP VIEW C N BOTTOM VIEW SEATING PLANE N 2 2 1 1 0°-12° PIN1 ID SIDE VIEW 0.20 R. Ø 3.50[...]

  • Page 50

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 50 of 56 Figure 32. 32-Pin Sawn QFN Package Important Note For information on the preferred dimensions for mo unting QFN packages, see the followi ng application note at http://www .amkor .com/pro ducts/notes_papers/MLF AppNote.pdf. Figure 33. 56-Pin (300-Mil) SSOP 32L QFN 5[...]

  • Page 51

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 51 of 56 Thermal Impedances Cap acitance on Cry st al Pins Solder Reflow Peak T emperature The following table lists the minimum solder reflow peak temperature s to achieve goo d solderability . T able 50. Thermal Impedan ce s per Package Package T y pical θ JA * 8 PDIP 123[...]

  • Page 52

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 52 of 56 Development T ool Selection This section presents the development tools available for all current PSoC device familie s including the CY8C24x23A fa mily . Sof tware PSoC Designer ™ At the core of the PSoC development software suite is PSoC Designer . Used by thous[...]

  • Page 53

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 53 of 56 CY3210-PSoCEval1 The CY3210-PSoCEval1 kit features an eva luation board and the MiniProg1 programming unit. The evalu ation board incl udes an LCD module, pote ntiometer , LEDs, and plenty of bread - boarding space to meet all of your evaluation nee ds. The kit incl[...]

  • Page 54

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 54 of 56 Ordering Information The following table lists the CY8C24x23A PSoC device’s key p ackage features and ordering cod es. Note For Die sales information, contact a local Cypress sales office or Field Applications Engineer (F AE). Ordering Code Definitions T able 54. [...]

  • Page 55

    CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-1202 8 Rev . *I Page 55 of 56 Document History Page Document Title: CY8C24123A, CY8C24223A , CY8C2 4423A PSoC ® Programmable Sy stem-on-Chip™ Document Number: 38-12028 Rev . ECN Orig. of Change Submission Date Description of Change ** 236409 SFV See ECN New silicon and new document – Prelim[...]

  • Page 56

    Document Number: 38-12028 Rev . *I Revi sed December 1 1, 2008 Page 56 of 56 PSoC Designer™, Programmable System-on-Chip ™, an d PS oC Exp re ss™ are tra demarks a nd PSo C® is a registe red t rade mark of Cypress S emi con ductor Corp. A ll o the r tr a dem a rks o r re gi ster e d trademarks refe renced herein are property of the respect i[...]