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Cypress STK12C68-5 manual

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Table of contents for the manual

  • Page 1

    STK12C68-5 (SMD5962-94599) 64 Kbit (8K x 8) AutoS tore nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-51026 Rev . ** Revised March 02, 2009 Features ■ 35 ns and 55 ns access times ■ Hands off automatic STORE on power down with external 68 µF capacitor ■ STOR[...]

  • Page 2

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 2 of 18 Pinout s Pin Definitions Pin Name Alt IO T y p e Description A 0 –A 12 Input Address Inputs . Used to select one of the 8,192 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Outpu t Bidirectiona l Data IO Lines . Used as input or output lines dependin g on ope ration. WE W Inpu[...]

  • Page 3

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 3 of 18 Device Operation The STK12C68-5 nvSRAM is made up of two functional compo- nents paired in the same physical cell. These ar e an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferre[...]

  • Page 4

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 4 of 18 Figure 4. Aut oStore In hibit Mode If the power supply drops fast er than 20 us/volt before Vcc reaches V SWITCH , then a 2.2 ohm resistor must be connected between V CC and the system supply to avoid mome ntary excess of current between V CC and V CAP . AutoStore Inhibit [...]

  • Page 5

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 5 of 18 4. Read address 0x1FFF , V ali d READ 5. Read address 0x10F 0, V alid READ 6. Read address 0x0F0E, Initiate RECALL cycle Internally , RECALL is a two step procedure. First, the SRAM data is cleared; then, the nonvo latile information is transferred into the SRAM cells. Aft[...]

  • Page 6

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 6 of 18 Best Practices nvSRAM products have been used e ffectively for over 15 years. While ease-of-use is o ne of the product’s main system values, experience gained working with hundreds of applica- tions has resulted in the following suggestions as best practices: ■ The non[...]

  • Page 7

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 7 of 18 Maximum Ratin gs Exceeding maximum ratings may shorten the useful life of the device. These user guid elines are not tested. S torage T emperature ................ .............. .. . –65 ° C to +150 ° C T emperature under Bias .............. ............... –55 ° C[...]

  • Page 8

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 8 of 18 Dat a Retention and Endurance Parameter Descriptio n Min Unit DA T A R Data Retention 100 Y ears NV C Nonvolatile STORE Operations 1,000 K Cap acit ance In the following table, the capacitance parameters are listed. [6] Parameter Description T e st Conditio ns Max Unit C I[...]

  • Page 9

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 9 of 18 AC Switching Characteristics SRAM Read Cycle Parameter Description 35 ns 55 ns Unit Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access T ime 35 55 ns t RC [7] t AVAV, t ELEH Read Cycle T ime 35 55 ns t AA [8] t AV Q V Address Access Time 35 55 ns t DOE t[...]

  • Page 10

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 10 of 18 SRAM Write Cycle Parameter Descriptio n 35 ns 55 ns Unit Min Max Min Max Cypress Parameter Alt t WC t AVAV W rite Cycle T ime 35 55 ns t PWE t WL WH, t WLEH Write Pulse Width 25 45 ns t SCE t EL WH, t ELEH Chip Enable T o End of Write 25 45 ns t SD t DVWH, t DVEH Dat a Se[...]

  • Page 11

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 1 1 of 18 AutoS tore or Power Up RECALL Parameter Alt Description STK12C68-5 Unit Min Max t HRECALL [13] t REST ORE Power up RECALL Duration 550 μ s t STORE [14, 15 , 16 ] t HLHZ ST ORE Cycle Duration 10 ms t DELA Y [9, 15] t HLQZ , t BLQZ Time Allowed to Co mplete SRAM Cycle 1 ?[...]

  • Page 12

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 12 of 18 Sof tware Controlled STORE/RECALL Cycle The software controlled ST ORE/RECALL cycle follows. [18] Parameter Alt Description 35 ns 55 ns Unit Min Max Min Max t RC [14] t AVAV ST ORE/RECALL Initiation Cycle T ime 35 55 ns t SA [17] t A VEL Addre ss Setup Time 0 0 ns t CW [1[...]

  • Page 13

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 13 of 18 Hardware STORE Cycle Parameter Alt Description ST K12C68-5 Unit Min Max t STORE [9, 14] t HLHZ STORE Cycle Duration 10 ms t DHSB [14, 19] t RECOVER, t HHQX Hardware STORE High to Inhibit Off 700 ns t PHSB t HLHX Hardware ST ORE Pulse Widt h 15 ns t HLBL Hardware STORE Low[...]

  • Page 14

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 14 of 18 S peed: 35 - 35 ns 55 - 55 ns Package: C = Ceramic 28-pin 300 mil DIP (gold le ad finish) Part Numbering Nomen clature STK12C68 - 5 C 35 M T emperature Range: M - Military (-55 to 125°C ) K L = Ceramic 28-pin LLC = Ceramic 28-pin 300 mil DI P (Solder dip fi nish) Retenti[...]

  • Page 15

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 15 of 18 Ordering Information Spee d ( ns ) Ordering Code Package Diagram Package T ype Operating Ran ge 35 STK12C68-5C35 M 001-51695 28-pi n CDIP (300 mil) Military STK12C68-5K35M 001-51695 28-pi n CDIP (300 mil) STK12C68-5L35M 001-51696 28-pi n LCC (350 mil) 55 STK12C68-5C55 M 0[...]

  • Page 16

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 16 of 18 Package Diagrams Figure 15. 28-Pin (300-Mil) Side Braze DIL (001-51 695) 001-51695 ** [+] Feedback[...]

  • Page 17

    STK12C68-5 (S MD5962-94599) Document Number: 001-51026 Rev . ** Page 17 of 18 Figure 16. 28-Pad (350-Mil) LCC (001-51696) Package Diagrams (continued) 1. A L L D IM E N S IO N AR E IN IN CH E S AN D M ILLIM E TE R S [M IN /M A X] 2. JEDEC 95 O UTLINE# M O-041 3. PACKAGE WEIGHT : TBD 001-51696 ** [+] Feedback[...]

  • Page 18

    Document Number: 001-51026 Rev . ** Revised March 02, 2009 Page 18 of 18 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this document may be the trademarks of thei r respective holders. STK12C68-5 (SMD5962-94599) © Cypress Semiconducto r Corporatio n, 2[...]