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Cypress STK22C48 manual

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Table of contents for the manual

  • Page 1

    STK22C48 16 Kbit (2K x 8) AutoS tore nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-51000 Rev . ** Revised January 30, 2009 Features ■ 25 ns and 45 ns access times ■ Hands off automatic STORE on power down with externa l 68 µF capacitor ■ STORE to QuantumT r[...]

  • Page 2

    STK22C48 Document Number: 001-51000 Rev . ** Page 2 of 14 Pin Configurations Figure 1. Pin Di agram - 28-Pin SOI C T able 1. Pin Definitions Pin Name Alt IO T ype Description A 0 –A 10 Input Address Inputs. Used to select one of the 2, 048 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bidirect io na l Dat a IO Lines . Used as input or output li[...]

  • Page 3

    STK22C48 Document Number: 001-51000 Rev . ** Page 3 of 14 Device Operation The STK22C48 nvSRAM is mad e up of two functional compo- nents paired in the same physical cell. These ar e an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile[...]

  • Page 4

    STK22C48 Document Number: 001-51000 Rev . ** Page 4 of 14 Figure 3. Aut oStore In hibit Mode Hardware STORE (HSB ) Operation The STK22C48 provides the HSB pin for controlling and acknowledging the STORE operations. The HSB pin is used to request a hardware ST OR E cycle. When the HSB pin is driven LOW , the STK22C48 conditionally initiates a STORE [...]

  • Page 5

    STK22C48 Document Number: 001-51000 Rev . ** Page 5 of 14 Preventing Store The STORE function is disabled by holding HSB high with a driver capable of sourcing 30 mA at a V OH of at least 2.2V , because it must ov erpower the inte rnal pull down device. This device drives HSB LOW for 20 ns at the onset of a STORE. When the STK22C48 is co nnected fo[...]

  • Page 6

    STK22C48 Document Number: 001-51000 Rev . ** Page 6 of 14 Maximum Ratin gs Exceeding maximum ratings may shorten the useful life of the device. These user guid elines are not tested. S torage T emperature ................ .............. .. . –65 ° C to +150 ° C T emperature under bias .................. ............ –55 ° C to +125 ° C Supp[...]

  • Page 7

    STK22C48 Document Number: 001-51000 Rev . ** Page 7 of 14 Cap acit ance In the following table, the capacitance parameters are listed. [5] Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V CC = 0 to 3.0V 8p F C OUT Output Capacit ance 7p F Thermal Resist ance In the following table, the thermal resis[...]

  • Page 8

    STK22C48 Document Number: 001-51000 Rev . ** Page 8 of 14 AC Switching Characteristics SRAM Read Cycle Parameter Description 25 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access Time 25 45 ns t RC [6] t AVAV, t ELEH Read Cycle T ime 25 45 ns t AA [7] t AV Q V Address Access T ime 25 45 ns t DOE t GLQV Output Enable[...]

  • Page 9

    STK22C48 Document Number: 001-51000 Rev . ** Page 9 of 14 SRAM Write Cycle Parameter Description 25 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t WC t AVAV Write Cycle T ime 25 45 ns t PWE t WL WH, t WLEH Write Pulse Width 20 30 ns t SCE t EL WH, t ELEH Chip Enab le T o End of W rite 20 30 ns t SD t DVWH, t DVEH Dat a Setup to End of Write [...]

  • Page 10

    STK22C48 Document Number: 001-51000 Rev . ** Page 10 of 14 AutoS tore or Power Up RECALL Parameter Alt Description STK22C48 Unit Min Max t HRECALL [12] t REST ORE Power up RECALL Duration 550 μ s t STORE [14, 15] t HLHZ STORE Cycle Duration 10 ms t DELA Y [13] t HLQZ , t BLQZ Time Allowed to Complete SRAM Cycle 1 μ s V SWITCH Low V oltage T rigge[...]

  • Page 11

    STK22C48 Document Number: 001-51000 Rev . ** Page 1 1 of 14 Hardware STORE Cycle Parameter Alt Description STK22C48 Unit Min Max t DHSB [13, 16] t RECOVER, t HHQX Hardware STORE High to Inhibit Off 700 ns t PHSB t HLHX Hardware STORE Pulse Width 15 ns t HLBL Hardware ST ORE Low to ST ORE Busy 300 ns Switching W aveform Figure 12. Hardware STORE Cyc[...]

  • Page 12

    STK22C48 Document Number: 001-51000 Rev . ** Page 12 of 14 Ordering Information Spee d ( ns ) Ordering Code Package Diagram Package T ype Operating Range 25 STK22C48-NF25TR 51-85026 28-pin SOIC (300 mil) Commercial STK22C48-NF25 51-85026 28-pin SOIC (300 mil) STK22C48-SF25TR 51-85058 28-pin SOIC (330 mil) STK22C48-SF25 51-85058 28-pin SOIC (330 mil[...]

  • Page 13

    STK22C48 Document Number: 001-51000 Rev . ** Page 13 of 14 Package Diagrams Figure 13. 28-Pin (300 mil) S OIC (51-85026) Figure 14. 28- Pin (330 mil) SOIC (51-85058) PIN 1 ID 0.291[7.39] 0.300[7.62] 0.394[10.01] 0.419[10.64] 0.050[1.27] TYP. 0.092[2.33] 0.105[2.67] 0.004[0.10] 0.0118[0.30] SEATING PLANE 0.0091[0.23] 0.0125[3.17] 0.015[0.38] 0.050[1[...]

  • Page 14

    Document Number: 001-51000 Rev . ** Revised January 30, 20 09 Page 14 of 14 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this document may be the trademarks of thei r respective holders. STK22C48 © Cypress Semicondu ctor Corpor ation, 2006-2009. The i[...]