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HP (Hewlett-Packard) 520 5/XX manual

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Table of contents for the manual

  • Page 1

    HP Vectra 500 Series PC Hardware and BIOS Technical Reference Manual Models: 520 5/xx 525 5/xx September 1996[...]

  • Page 2

    Notice The information contained in this document is subject to change without notice. Hewlett-Packard makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. Hewlett-Packard shall not be liable for errors contained herein or for incid[...]

  • Page 3

    3 Preface This manual is a technical reference and BIOS document for engineers and technicians providing system level support for HP Vectra 500 Series PCs for models 520 5/xx and 525 5/xx. It is assumed that the reader possesses a detailed understanding of AT- compatible microprocessor functions and digital addressing techniques. Technical informat[...]

  • Page 4

    4 Conventions The following conventions are used throughout this manual to identify specific elements: ❒ Hexadecimal numbers are identified by a lower case h. For example, 0FFFFFFFh or 32F5h ❒ Binary numbers and bit patterns are identified by a lower case b. For example, 1101b or 10011011b Bibliography ❒ System BIOS for IBM PCs, Compatibles, [...]

  • Page 5

    Contents English 5 1 HP V ectra 500 Series Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 D4051-63001 Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 6

    6 English 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 System Board Architecture . . . . . . . . . . . . . . . . . . .[...]

  • Page 7

    English 7 Devices on the Processor Local Bus (D4051-63001) . . . . . . . . . . . . . 44 Main Memory (UMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Cache Memory (D4051-63 001) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Level-1 Cache Memory . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 8

    8 English 3 System Board (P/Ns D3657-63001 and D3661-63001) Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 D3657-63 001 Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Desktop Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 9

    English 9 Superscalar Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Floating Point Unit (FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Dynamic Branch Prediction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Instruction and Data Cache . . .[...]

  • Page 10

    10 English 4 Summary of the HP/Phoenix BIOS Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 HP/Phoenix BIOS Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Updating the Sy stem ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Error D[...]

  • Page 11

    English 11 Security Menu (BIOS version: GJ.07.xx) . . . . . . . . . . . . . . . . . . . . . . . . 102 Power Menu (BIOS version: GJ.07.xx) . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Summary Configuration Screen (BIOS version: GJ.07.xx) . . . . . . . . . . 103 I/O Addresses Used by the Sy stem (BIOS version: GJ.07.xx) . . . . . . . . 104[...]

  • Page 12

    12 English Matrox MGA Millennium V ideo Controller Card . . . . . . . . . . . . . . 127 MGA Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 MGA Video Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 A vailable MGA V ideo Resolutions . . . . . . . . . . . [...]

  • Page 13

    13 1 HP Vectra 500 Series This chapter provides a description of the HP V ectra 500 Series desktop (Models 520 5/xx) and minitower (Models 525 5/xx) computers with detailed sy stem specifications. The HP V ectra 500 Series computers are Pentium processor -based, constructed around the Peripheral Component Interconnect (PCI) bus and Industry Standar[...]

  • Page 14

    14 1 HP Vectra 5 00 Series Introduction Introduction Three group types have been defined to help identify the various sy stem configurations available on the HP 500 Series desktop and minitower packages. W ithin each group, a product number and the appropriate HP V ectra 500 Series model have been associated with the HP Service Part Number . The HP[...]

  • Page 15

    15 1 HP Vectra 50 0 Series System Overview System Overview D4051-63001 Models The HP Service Part Number D4051-63001 group contains HP V ectra 500 Series models that have the following features: Unified Memory Architecture (UMA), main memory upgradable to 192 MB, and the SiS (Silicon Integrated Sy stem) 6205 video graphic controller . D4051-63001- [...]

  • Page 16

    16 1 HP Vectra 5 00 Series System Overview D3657-63001 Models The HP Service Part Number D3657-63001 group contains HP V ectra 500 Series models that have the following features: separate main memory and video memory , and an integrated 32/64 Ultra VGA video graphic controller . D3657-63001 - Desktop Models The following table shows the models and [...]

  • Page 17

    17 1 HP Vectra 50 0 Series System Overview D3661-63001 Model The HP Service Part Number D3661-63001 group contains one HP V ectra 500 Series model that has the following features: separate main memory and a Matrox MGA millennium video card. D3661-63001 - Minitower Model The following table shows the model and its associated product number . System [...]

  • Page 18

    18 1 HP Vectra 5 00 Series System Overview Level-two cache memory (optional) 256 KB synchronous cache are stan dard on the followin g models: U.S./Canada D4403, D4422A, D 4428A, D4437A, D4 439A, D4442A , D4470A, D447 5A, D4476A, D4 477A, D4478A, D 4471A, D4481A Europe D4416A, D444 1A, D4443A, D4 472A, D4473A Latin America D4425A, D442 7A Brazil D44[...]

  • Page 19

    19 1 HP Vectra 50 0 Series System Overview Comparison of HP Vectra 500 Series Desktop and Minitower Models The HP V ectra 500 Series PCs come in two packages, a desktop box and a minitower box. The following table shows the differences between the two packages. Component Desktop Minitower IDE Controller Primary channel con nectors Two connectors fo[...]

  • Page 20

    20 1 HP Vectra 5 00 Series System Overview Principal Features This section includes the principal features of the sy stem board that are available on both the desktop and minitower packages: • An Enhanced IDE controller with two channels on the PCI bus. • Rear panel connectors: ❒ 1 mouse socket ❒ 1 keyboard socket ❒ 1 display connector ?[...]

  • Page 21

    21 1 HP Vectra 50 0 Series System Overview Physical and Environmental Specifications The following tables show the phy sical and environmental specifications of the minitower and desktop computers. All the characteristi cs valid for both computers are grouped together at the end of the table. Computer Type Characteristic Description Minitower Weigh[...]

  • Page 22

    22 1 HP Vectra 5 00 Series System Overview NOTE Operating temperature and humidity ranges may vary depending upon the mass storage devices installed. High humidity levels can cause improper operation of disk drives. Low humidity ranges can aggravate static electricity problems and cause excessive wear of the disk surface. These characteristics are [...]

  • Page 23

    23 1 HP Vectra 50 0 Series System Overview Power Consumption NOTE The figures given below are valid for both the minitower and desktop computers with a standard configuration—no expansion cards and no CD-ROM driv e. For other configurations, the power consumption values will be higher. NOTE When the PC is turned off with the power button on the f[...]

  • Page 24

    24 1 HP Vectra 5 00 Series System Overview Rear Panel Connectors The external connectors on the rear panel of the computer are used to connect the mouse, keyboard and display . The 25-pin parallel port can be used for connecting a parallel printer , while the two 9-pin buffered serial ports are for serial printers. The following diagram shows the r[...]

  • Page 25

    25 1 HP Vectra 50 0 Series CD-ROM Drive Specificatio ns CD-ROM Drive Specifications WARNING To avoid electrical shock and harm to your eyes by laser light, do not open the CD-ROM drive enclosure. Do not attempt to make any adjustment to the CD- ROM drive. Refer servicing to qualified personnel only. The CD-ROM drive is a Class 1 laser product. Data[...]

  • Page 26

    26 1 HP Vectra 5 00 Series CD-ROM Drive Specifica tions[...]

  • Page 27

    27 2 System Board - (SiS Chipset) (Part Number: D4051-63001) This section describes the components and features of the SiS (Silicon Integrated Sy stem) chipset-based sy stem board. This sy stem board has the HP Service Part Number: D4051-63001.[...]

  • Page 28

    28 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview Overview The type of sy stem board described in this section uses shared memory based on UMA (Unified Memory Architecture), mea ning that there is no dedicated frame buffer used by the video controller (SiS 6205). Instead, the controller uses a portion of the sy stem memory as a [...]

  • Page 29

    29 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview Configuration • Supported Processor: P54CS. • Level-2 (L2) 256 KB cache sockets. • UMA Chipset from SiS consisting of three chips that interface between the three main buses (the Host bus, the PCI bus and the ISA bus): SiS 5511: Host/PCI bridge, L2 cache memory controller a[...]

  • Page 30

    30 2 System Board - (SiS Chipset) (Part Number: D4051-63001) System Board Architecture System Board Architecture The following diagram shows the architecture of the various components and the SiS chipset on the sy stem board.[...]

  • Page 31

    31 2 System Board - (SiS Chipset) (Part Number: D4051-63001) System Board P hysical Layout System Board Physical Layout The following sy stem board diagram will help you identify where the different components and connections are located on the board. Refer to the section Sy stem Board Switches and Jumpers (D4051-63001) on page 38 for switches and [...]

  • Page 32

    32 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset SiS Chipset The SiS chipset consists of three chips, each encapsulated in a 208-pin plastic quad flat pack (PQFP) package, that interface between the three main buses (the Host bus, the PCI bus and the ISA bus): • The PCMC chip (SiS 5511) is a combined PL/PCI bridge and cach[...]

  • Page 33

    33 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Pentium Processor Level-2 Cache Host Bridge & Memory Controller SiS 5511 CPU Interface Cache Control Memory Control UMA Arbitration Main Memory Data Path SiS 5512 Processor L ocal Bus (64 bit, 60/66 MHz) Video Controller SiS 62 05 PCI Bus (32 bit, 30/33 MHz) PCI/ISA Bridge[...]

  • Page 34

    34 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Host/PCI Bridge (SiS 5511 Chip) The SiS 5511 chip (PCMC) bridges between the host bus and the PCI local bus. This device integrates cache and memory control functions and provides bus control functions for the transfer of information between the micro-processor , cache, main m[...]

  • Page 35

    35 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Feature Summary Function Features Cache controller ❒ 8 bits or 7 bits TAG with Direct map ped organi zation. ❒ Write back mode (onl y supported by BIOS) ❒ Uses burst an d pipelin ed burst S RAMs. ❒ 64-KByte to 1 MByte cache s ummary ❒ Read/Write cycle of 3-1-1-1 usin[...]

  • Page 36

    36 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Data Path (SiS 5512 Chip) The SiS 5512 PCI Local Data buffer (PLDB) provides bidirectional data buffering among the 64-bit Host Data Bus, the 64/32-bit Memory Data Bus, and the 32-bit PCI Address/Data Bus. The PLDB incorporates three FIFOs (First In First Out) and one read buf[...]

  • Page 37

    37 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Play port. The PSIO supports two bus master IDE channels providing up to four IDE devices. The PSIO does not require any IDE buffering to be used, and therefore no IDE buffers are used. The SiS 5513 chip consists of: • A PCI bridge that translates PCI cycles onto the ISA bus[...]

  • Page 38

    38 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset System Board Switches and Jumpers (D4051-63001) The sy stem board switches and jumpers are used to configure certain aspects of the computer . SW1 Switch This switch is multi-purpose and is used to modify Flash, CMOS and password settings. Switch Default Setting OFF ON COMMENT[...]

  • Page 39

    39 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset SW2 Switch This switch is used to select the internal CPU frequency by defining the CPU Bus Frequency / CPU Frequency ratio. If the processor is upgraded, the ratio might have to be changed to adapt to the new processor . The following table includes some examples of the setti[...]

  • Page 40

    40 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Cache Jumper This jumper (J6) selects either synchronous or asynchronous cache type. If the PC is not installed with any level-2 cache, the default jumper setting is synchronous cache. The following illustration shows the two cache-type jumper settings. Space-Bar Power-On Feat[...]

  • Page 41

    41 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Processor Socket (D4051-63001) The microprocessor is packaged in a pin-grid-array (PGA), which is seated on the sy stem board in a zero-insertion-force (ZIF) socket. Memory Sockets (D4051-63001) There are six main memory module sockets available with the HP V ectra 500 Series [...]

  • Page 42

    42 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Backplane (D4051-63001) Backplane (D4051-63001) Desktop Backplane The HP V ectra 500 Series desktop backplane supports two 16-bit ISA (Industry Standard Architecture) cards, one 32-bit PCI (Peripheral Component Interconnect) card and has one combination slot for an ISA or PCI card. The fo[...]

  • Page 43

    43 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Backplane (D4051-63001) Minitower Backplane The HP V ectra 500 Series minitower backplane supports three 16-bit ISA (Industry Standard Architecture) cards, two 32-bit PCI (Peripheral Component Interconnect) cards and has one combination slot for an ISA or PCI card. The six expansion card [...]

  • Page 44

    44 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Devices on the Processor Local Bus (D4051-63001) Main Memory (UMA) The SiS 5511 chip can support single-sided or double-sided 64/72 bits (with or without parity) FP (Fast Page mode) or EDO (Extended Data Output) DRAM (dynamic random-access [...]

  • Page 45

    45 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Level-1 Cache Memory The L1 cache memory is divided into two separate banks: • L1 I-cache for instruction words. • L1 D-cache for data words. For more information about Level-1 cache, refer to “Instruction and Data Cache” on page 46[...]

  • Page 46

    46 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Superscalar Architecture The Pentium processor’ s superscalar architecture has two instruction pipelines and a floating-point unit, each capable of independent operation. The two pipelines allow the Pentium to execute two integer instruct[...]

  • Page 47

    47 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) The data cache tags (directory entries used to reference cached memory pages) are triple-ported to support two data transfers and an inquire cycle in the same clock cycle. The code cache tags are also triple-ported to support snooping (a wa[...]

  • Page 48

    48 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI Bu s Devices on the PCI Bus Graphics/Integrated Video (D4051-63001) The HP V ectra 500 Series PC uses the SiS 6205 video controller and supports video resolutions up to 1280 x 1024. Video Controller As explained earlier , the SiS 6205 video controller supports the UMA a[...]

  • Page 49

    49 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI B us Integrated Drive Electronics (IDE) Controller The IDE controller is implemented as part of the PCI/ISA bridge chip. It is driven from the PCI bus and has PCI-Master capability . It supports Enhanced IDE (EIDE) and Standard IDE (Bus Master IDE). T o use the Enhanced[...]

  • Page 50

    50 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI Bu s The BIOS uses the auto-detected drive information to select the fastest configuration supported by each installed IDE drive. Transfer Rates Versus Modes of Operation The IDE controller supports 32-bit Windows and DOS I/O transfers (many IDE controllers use Windows [...]

  • Page 51

    51 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI B us The three DMA modes allow the following transfer rates: Operated in slave mode, the IDE controller saturates the PCI bus with transfers, thus limiting the actual achieved transfer rate to less than 10 MBytes per second. Operated in master mode, though, the IDE cont[...]

  • Page 52

    52 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Devices on the ISA Bus Super I/O Chip (NS 87308 or NS 87307) The basic input/output control functions are provided by the Super I/O chip, the NS 87308 or NS 87307. The Super I/O chip is contained within a 160-pin PQFP package. The chip provides the control for the [...]

  • Page 53

    53 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Feature Summary Function Features Floppy disk controller ❒ Software compatible with the DP8473, the 765A, and the N82077 ❒ 16-byte FIFO (default d isabled) ❒ Burst and non-b urst modes ❒ Perpendicular recordin g drive supp ort ❒ New high-performance inter[...]

  • Page 54

    54 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Serial/Parallel Ports The Super I/O chip supports two serial ports and one bidirectional parallel port. The serial ports are high speed UART s with 16-Byte FIFOs, and can be programmed as COM1, COM2, COM3, COM4, or disabled. The parallel port can operate in four mo[...]

  • Page 55

    55 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Floppy Drive Controller The Floppy Drive Controller (FDC) is software and register compatible with the 82077AA, and 100% IBM compatible. It has an A and B drive-swapping capability and a non-burst DMA option. The FDC supports any combination of the following: tape [...]

  • Page 56

    56 2 System Board - (SiS Chipset) (Part Number: D4051-63001) BIOS (version: GX.07.xx ) BIOS (version: GX.07.xx) The following section is an overview of the BIOS features available with the sy stem identified by the BIOS version: GX.07.xx , installed on the HP Vectra 500 Series PC models with an HP Service Part Number: D4051-63001. For further detai[...]

  • Page 57

    57 3 System Board (P/Ns D3657-63001 and D3661-63001) The two sy stem boards described in this chapter use the Intel SB82437/8 PCI chipset. The two boards are the same except that D3657-63001 has an integrated (onboard) video controller and memory , whereas D3661-63001 uses a Matrox Millennium video card for its video controller and memory .[...]

  • Page 58

    58 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Overview Overview This section lists the 520 and 525 models and product numbers that use the two sy stem boards D3657-63001 and D3661-63001. D3657-63001 Models Desktop Models The following table lists the desktop models and products that use the D3657-63001 sy stem board. Minitower Models The f[...]

  • Page 59

    59 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Overview D3661-63001 Models Minitower Models The following table lists the minitower models and products that use the D3661-63001 sy stem board. Configuration Summary • Supported processors: P54C and P54CS. • Level-2 cache memory socket - supports 256-KB cache memory module (the module is a[...]

  • Page 60

    60 3 System Board (P/Ns D365 7-63001 and D366 1-63001) System Board Architecture System Board Architecture The following diagram shows the functional relationship between the various components on the sy stem board. 256 KB Level-Two Cache Memory (8 MB - 128 MB) Intel SB8237 1FB PCI/IS A Bridge S3 Trio 64 Video Controller I/O Decode L ogic BIOS Flas[...]

  • Page 61

    61 3 System Board (P/Ns D365 7-63001 and D366 1-63001) System Board P hysical Layout System Board Physical Layout The following diagram shows the phy sical layout of the sy stem board. * This video up grade applie s only to the models with integrated vide o controller. *[...]

  • Page 62

    62 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Principal Components and Features PCI Chipset The PCI chipset consists of four chips that interface between the three main buses (the processor’ s local (PL) bus, the PCI bus, and the ISA bus): • The PL/PCI bridge chip (SB82437FX-66) which also provides co[...]

  • Page 63

    63 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features PCI, Cache and Memory Controller (SB82437FX-66) The SB82437FX-66 device integrates cache and memory control functions and provides bus control functions for the transfer of information between the microprocessor , cache, main memory and the PCI bus. The cache [...]

  • Page 64

    64 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Data Path Unit (SB82438FX) The SB82438FX component contains a 64-bit data path between the host bus and main memory . A 4×64-bit deep buffer provides 3-1-1-1 writes to main memory . This buffer is used for: • writes from processor to main memory • level-t[...]

  • Page 65

    65 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features The PCI/ISA Bridge and IDE Controller (SB82371FB) The SB82371FB device serves as a bridge between the PCI bus and the ISA expansion bus, and incorporates a two-channel PCI IDE controller . It incorporates the logic for a PCI interface, a DMA interface, a DMA c[...]

  • Page 66

    66 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features System Board Configuration Switches The sy stem board configuration switches are used to configure certain aspects of the computer . The sy stem board switches used for configuring the PC are summarized in the following table. ISA bus controller (for SB82371FB[...]

  • Page 67

    67 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features Processor Socket The microprocessor is packaged in a pin-grid-array (PGA), which is seated on the sy stem board in a Zero-Insertion-Force (ZIF) socket. VRM Socket P54CS (133 150 and 200 MHz) Pentium processors require a 3.3V supply . Since the PC has a regulat[...]

  • Page 68

    68 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Advanced Power Management (APM) The Advanced Power Management (APM) is a standard, defined by Intel and Microsoft, for a power -saving mode that is applicable under a wide range of operating sy stems. The version APM 1.1 supports the following modes: Fully-on,[...]

  • Page 69

    69 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features HP Vectra 500 Series Minitower Backplane The HP V ectra 500 Series minitower backplane supports three 16-bit ISA (Industry Standard Architecture) cards, two 32-bit PCI (Peripheral Component Interconnect) cards and has one combination slot for an ISA or PCI car[...]

  • Page 70

    70 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Devices on the Processor Local Bus The following subsy stems are associated with the Processor Local bus: • Intel Pentium microprocessor • cache memory • main memory Pentium Processor The Pentium processor uses a 64-bit bus, and is 100% compatible with [...]

  • Page 71

    71 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Proces sor Local Bus Using the pipelines halves the instruction execution time and almost doubles the performance of the processor , compared with an Intel486 microprocessor of the same frequency . Floating Point Unit (FPU) The Floating Point Unit incorporates optimized algorithm[...]

  • Page 72

    72 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Individual pages of memory can be configured as cacheable or non- cacheable by software or hardware. They can also be enabled and disabled by hardware or software. Data Integrity The processor uses a number of techniques to maintain data integrity . It employ[...]

  • Page 73

    73 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Proces sor Local Bus The computer will execute erratically , if at all, if the configuration switches are set to operate at a higher processor speed than the processor is capable of supporting. This may cause damage to the PC. Setting the switches to operate at a slower speed tha[...]

  • Page 74

    74 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Main Memory There are six main memory module sockets on the sy stem board, enabling up to 128 MB of main memory to be installed. The sockets are arranged in three banks (A to C). Memory modules must be installed in pairs which are the same size to ensure that[...]

  • Page 75

    75 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI B us Devices on the PCI Bus The PL/PCI bridge is implemented within the Intel SB82437FX-66 chip (see page 63). It is responsible for transferring data between the Processor -Local bus and the PCI bus. As a PCI bus slave, this chip becomes the PL bus master , to generate DRAM [...]

  • Page 76

    76 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI Bu s S3 Trio 64PnP Video Controller The integrated video subsy stem consists of a PCI bus video controller and a DRAM array . The PC uses the S3 T rio 64 PnP video controller . This video controller embeds a RAMDAC, and supports video resolutions of up to 1280 x 1024. The S3 [...]

  • Page 77

    77 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI B us with two connectors. For desktop models, the primary channel cable is fitted with two connectors, and the secondary channel cable is fitted with one connector . W ith EIDE, it is possible to have a fast device, such as a hard disk drive, and a slow device, such as a CD-R[...]

  • Page 78

    78 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us Devices on the ISA Bus ThePCI/ISA Bridge chip (also known as PIIX, or as the sy stem I/O chip, SIO- A) is an Intel SB82371FB. It is responsible for transferring data between the PCI bus and the ISA expansion bus. As the ISA bus controller , the chip supports asynchronous[...]

  • Page 79

    79 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us • Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible) • Enhanced mode (Enhanced Parallel Port or EPP compatible) • High speed mode (MS/HP Extended Capabilities Port or ECP compatible). It can be programmed as LPT1 (378h, IRQ7), LPT2 (278h, IRQ5), or disabled. Fl[...]

  • Page 80

    80 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us System ROM The PC uses 128 KB of 200 ns, Flash EEPROM implemented within a single 256 K X 8-bit ROM chip. This is a ROM that can be returned to its unprogrammed state, by the application of appropri ate electrical signals to its pins, and then reprogrammed with the lates[...]

  • Page 81

    81 4 Summary of the HP/Phoenix BIOS This chapter gives an overview of the two different versions of the HP/Phoenix BIOS installed on the HP V ectra 500 Series PC models.[...]

  • Page 82

    82 4 Summary of the HP/Phoenix BIOS Overview Overview The information concerning the different versions of the HP/Phoenix BIOS installed on the HP V ectra 500 Series models described in this chapter is divided into two main sections: • The sy stem BIOS identified by the version number GX.07.xx, installed on the HP Vectra 500 Series PC models with[...]

  • Page 83

    83 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS Descrip tion Before flashing, it is necessary to disable the “Secure Mode” switch on the sy stem switches, and to type in the Sy stem Administrator Password when starting up the computer . The PCI and PnP information is erased in the process. Do not switch off the computer until the sy stem B[...]

  • Page 84

    84 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Descrip tion Little Ben Little Ben is an HP application specific i ntegrated circuit (ASIC) that is connected between the chipset and the processor . It has been designed to act as a companion to the Super I/O chip. It contains the following: • Hard and soft power control. • BIOS timer: hardwa[...]

  • Page 85

    85 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) HP/Phoenix BIOS (BIOS version: GX.07.xx) This section gives an overview of the HP/Phoenix BIOS identified by the BIOS version: GX.07.xx associated with the HP V ectra 500 Series models, HP Service Part Number D4051-63001. The information in this section includes the foll[...]

  • Page 86

    86 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Some fields disappear completely when a choice in another field makes their appearance inappropriate (for example, the “Key auto-repeat speed” and “Delay before auto-repeat” fields disappear when the user selects Yes in the “Running W indows 95” field, since t[...]

  • Page 87

    87 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses). Disabling a device in the Security Menu disables the access, does not free the resources, bu[...]

  • Page 88

    88 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) be locked , so as to prevent the exporting of data. W rites to the har d disk drive boot sector can also be locke d , for instance as a protection against viruses. Under the “Start-Up Center” sub-menu, the Setup program not only allows the user to select which devices[...]

  • Page 89

    89 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) The following summary screen is an example of a sy stem configuration. HP Vectra VE5/100 Series 3 — Copyright 1995 Hewlett-Packard — QA.01.00 Any line of text can be e ntered here as a ‘tatoo’ for the PC BIOS Version : GX.07.xx PC Serial Number : 0000A00000 CPU D[...]

  • Page 90

    90 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) I/O Addresses Used by the System (BIOS version: GX.07.xx) Peripheral devices, accessory devices and sy stem controllers are accessed via the sy stem I/O space. The 64 KB of addressable I/O space comprises 8-bit and 16-bit I/O ports (these are registers that are located in[...]

  • Page 91

    91 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) BIOS I/O Port Map (BIOS version: GX.07.xx) This section describes the HP BIOS port map. The next section provides more details about how the BIOS uses the sy stem board components mentioned in the I/O port list. I/O Address Ports Function Bits 0000-000F DMA controller 1 [...]

  • Page 92

    92 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) System Board Components (BIOS version: GX.07.xx) This section provides more details of how the BIOS uses the sy stem board components mentioned in the I/O port list. DMA Channel Controllers (BIOS version: GX.07.xx) Only “I/O-to-memory” and “memory-to-I/O” transfer[...]

  • Page 93

    93 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) The following table summarizes how the DMA channels are allocated. Interrupt Controllers (BIOS version: GX.07.xx) The sy stem has two 8259A compatible interrupt controllers. They are arranged as a master interrupt controller and a slave that is cascaded through the maste[...]

  • Page 94

    94 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Using the Setup program: • IRQ3 can be made available by disabling serial ports 2 and 4. • IRQ4 can be made available by disabling serial ports 1 and 3. • IRQ5 can be made available by disabling the parallel port 2. • IRQ7 can be made available by disabling parall[...]

  • Page 95

    95 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) T o see the tests performed during the POST , press when the initial HP “V ectra ” logo appears, and the display will switch to text mode. In this mode, a summary configuration screen will be displayed at the end of the POST . Devices, such as memory and hard disks, [...]

  • Page 96

    96 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Internal Cache Memory Test Tests the processor’s in ternal level-on e cache RAM. Test failure causes an error code to displa y and the boot p rocess to abort. Video Tests Initialize the Video Initializes the vi deo subsyste m, tests the video shadow RAM , and, if requir[...]

  • Page 97

    97 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Error Messages (BIOS version: GX.07.xx) When the PC is switched on or reset, a power -on hardware test is performed. If an error occurs, an error message is displayed. HP’ s new-style BIOS does not display POST error codes (such as 910B). These were displayed in the BI[...]

  • Page 98

    98 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Message Corrective Action an d/or Explanat ion Operating system not foun d Check whether the dis k, HDD, FDD or CD-ROM disk drive is connected. If it is connected, check that it is de tected by Setup. Check that your bo ot device is enab led on the Setup Security menu. If[...]

  • Page 99

    99 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Beep Codes (BIOS version: GX.07.xx) If a terminal error occurs during POST , the sy stem issues a beep code before attempting to display the error . Beep codes are useful for identifying the error when the sy stem is unable to display the error message. Beep Pattern Nume[...]

  • Page 100

    100 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) HP/Phoenix BIOS (BIOS version: GJ.07.xx) This section gives an overview of the HP/Phoenix BIOS identified by the version number GJ.07.xx associated with the HP V ectra 500 Series models, HP Service part numbers: D3657-63001 and D3661-63001. The information in this sectio[...]

  • Page 101

    101 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Preferences Menu (BIOS version: GJ.07.xx) The Preferences Menu has the same menu structure as the Main Menu and Power Menu. This menu allows the user to set a password to prevent unauthorized access to the computer . T o set a user password, the administrator password h[...]

  • Page 102

    102 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses). Disabling a device in the Security Menu disables the access, does not free the resources, bu[...]

  • Page 103

    103 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Summary Configuration Screen (BIOS version: GJ.07.xx) Y ou can press while the initial “V ectra” logo screen is being displayed to run the Setup program (as described in the previous sub-sections). Alternatively , you can press to view the summary configuration scre[...]

  • Page 104

    104 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) I/O Addresses Used by the System (BIOS version: GJ.07.xx) Peripheral devices, accessory devices and sy stem controllers are accessed via the sy stem I/O space. The 64 KB of addressable I/O space comprises 8-bit and 16-bit I/O ports (these are registers that are located i[...]

  • Page 105

    105 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) BIOS I/O Port Map (BIOS version: GJ.07.xx) This section describes the HP BIOS port map. The next section provides more details about how the BIOS uses the sy stem board components mentioned in the I/O port list. I/O Address Ports Function Bits 0000-000F DMA Controller 1[...]

  • Page 106

    106 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Addressing System Board Components (BIOS version: GJ.07.xx) This section provides further details of how the BIOS uses the sy stem board components mentioned in the I/O port list. DMA Channel Controllers (BIOS version: GJ.07.xx) Only “I/O-to-memory” and “memory-to-[...]

  • Page 107

    107 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) The following table summarizes how the DMA channels are allocated. Interrupt Controllers (BIOS version: GJ.07.xx) The sy stem has two 8259A compatible interrupt controllers. They are arranged as a master interrupt controller and a slave that is cascaded through the mast[...]

  • Page 108

    108 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) PCI Interrupt Request Lines (BIOS version: GJ.07.xx) PCI devices generate interrupt requests using up to four PCI interrupt request lines (INT A#, INTB#, INTC#, and INTD#). When a PCI device makes an interrupt request, the request is re-directed to the sy stem interrupt [...]

  • Page 109

    109 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Power-On Self-Test (BIOS version: GJ.07.xx) This section describes the Power -On Self-T est (POST) routines, which are contained in the PC’ s ROM BIOS, the error messages which can result, and the suggestions for corrective action. Each time the sy stem is powered on,[...]

  • Page 110

    110 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) POST Test Description System BIOS Tests LED Test Tes ts the LEDs on the con trol panel. Processor Test Tests the processor’s regis ters. Test failure causes the bo ot process to abort. System (BIOS) ROM Test Calculates an 8-bit checksu m. Test failure causes the boot p[...]

  • Page 111

    111 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) System Board Tests Test External Cache Tests the leve l-two cache. A failure caus es an error co de to display an d disables the external cache. Shadow SCSI ROM Tests for the pres ence of HP SCSI ROMs. If SCS I ROMs are detected, their contents are copie d into the sh a[...]

  • Page 112

    112 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Tests of Flexible Disk Dri ve A Flexible Disk Controller Subsystem Test Tests for proper op eration of the flexi ble disk controller. Tes t failure causes an error code to d isplay. Coprocessor Tests Internal Numeric Coprocessor Test Checks for prope r operation of the n[...]

  • Page 113

    113 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Error Messages (BIOS version: GJ.07.xx) When the PC is switched on or reset, a power -on hardware test is performed. If an error occurs, an error message is displayed. NOTE: HP’s new-style BIOS does not display POST error codes (such as 910B). These were displayed in [...]

  • Page 114

    114 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Beep Codes (BIOS version: GJ.07.xx) If a terminal error occurs during POST , the sy stem issues a beep code before attempting to display the error . Beep codes are useful for identifying the error when the sy stem is unable to display the error message. Other An error me[...]

  • Page 115

    115 5 Video Controllers This chapter gives details of the three types of video subsy stems used by the HP V ectra 500 Series computers. These video subsy stems are: the SiS 6250 and S3 T rio 64 PnP video controllers, both of which are integrated on the sy stem board, and the Matrox MGA Millennium video card.[...]

  • Page 116

    116 5 Video Controllers SiS 6205 Video Controller SiS 6205 Video Controller The SiS 6205 video controller supports UMA architecture, and therefore no dedicated video memory is loaded on the sy stem board. The shared frame buffer is located in the sy stem DRAM and the memory access bus and memory data bus. The SiS 6205 video controller offers full c[...]

  • Page 117

    117 5 Video Controllers SiS 6205 Vide o Controller Upgrading Video Memory (UMA) The default setting for the video memory is 1 MB. The video memory is resident in the main memory , so if there is 12 MB of main memory , 1 MB of this is allocated to the video memory . T o increase the amount of video memory from 1 MB up to the maximum of 2 MB, there i[...]

  • Page 118

    118 5 Video Controllers SiS 6205 Video Controller Using the HP Dynamic Video Feature T o increase the amount of video memory using the HP Dynamic video feature, follow these steps: • Click the Start button. • Select Settings, then Control Panel. • Double-click the Display icon. • Click the HP Dynamic Video tab. • Drag the Video Memory sli[...]

  • Page 119

    119 5 Video Controllers SiS 6205 Vide o Controller VESA Feature Connector (SiS 6205 Chip) The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector . The integrated v ideo controller supports an output-only VESA feature conn[...]

  • Page 120

    120 5 Video Controllers The Integrated Ultra VGA Vide o Controller The Integrated Ultra VGA Video Controller The Integrated Ultra VGA video controller is installed on the HP Vectra 500 Series PC models with part number D3657-63001. For a complete list of the computers associated with this part number, refer to “D4051-63001 Models” on page 15 S3[...]

  • Page 121

    121 5 Video Controllers The Integrated Ultra V GA Video Controll er S3 Trio 64 Video Memory The S3 T rio 64 PnP integrated video subsy stem has 1 MB of video DRAM preinstalled on the sy stem board, and provides two sockets for the installation of a pair of 512KB video DRAM chips, to upgrade to video memory to 2 MB. The installed video memory capaci[...]

  • Page 122

    122 5 Video Controllers The Integrated Ultra VGA Vide o Controller Extended V ideo Modes with 1 MB DRAM (S3 Trio 64) 03h VGA text 80 x 25 chars 16 70 31.5 25.175 03h+ VGA text 80 x 25 chars 16 70 31.5 28.322 04h VGA graph 320 x 200 4 70 31.5 25. 175 05h VGA graph 320 x 200 4 70 31.5 25. 175 06h VGA graph 640 x 200 2 70 31.5 25. 175 07h VGA text 80 [...]

  • Page 123

    123 5 Video Controllers The Integrated Ultra V GA Video Controll er 104h 6Ch graph 1024 x 768 1 6 75 60.2 80.000 105h 6D h graph 1024 x 768 256 43 (i) 35.5 44 .900 105h 6D h graph 1024 x 768 256 60 48.4 65.00 0 105h 6D h graph 1024 x 768 256 70 56.5 75.00 0 105h 6D h graph 1024 x 768 256 75 60.2 80.00 0 106h 6Eh graph 1280 x 10 24 16 45 (i) 47.7 75[...]

  • Page 124

    124 5 Video Controllers The Integrated Ultra VGA Vide o Controller 120 7c graph 1600 x 1 200 256 48.5 (i) 62 65.000 x 2 201 49 graph 640 x 4 80 256 60 31.5 25.175 201 49 graph 640 x 4 80 256 72 37.9 31.500 201 49 graph 640 x 4 80 256 75 37.5 31.500 202 4A graph 800 x 600 16 56 35.1 36.000 202 4A graph 800 x 600 16 60 37.9 40.000 202 4A graph 800 x [...]

  • Page 125

    125 5 Video Controllers The Integrated Ultra V GA Video Controll er Extended V ideo Modes with 2 MB DRAM (S3 Trio 64) Typical Windows 95 Video Resolutions (S3 Trio 64) 1. Interlaced. VESA Mode No. Extended Mode No. Interface Type Resolution No. of Colors Vertic al Refresh (Hz) Horizontal Refresh (kHz) Dot Clock (MHz) 107h 6Fh graph 1280 x 1024 256 [...]

  • Page 126

    126 5 Video Controllers The Integrated Ultra VGA Vide o Controller VESA Connector The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector . The integrated video controller supports an output-only VESA feature connector . T[...]

  • Page 127

    127 5 Video Controllers Matrox MGA Millenni um Video Controll er Card Matrox MGA Millennium Video Controller Card The Matrox MGA Millennium PCI video controller is installed in a PCI expansion slot. Its on-card MGA-2064W processor communicates with the Pentium Pro processor along the PCI bus. The Matrox MGA Millennium video controller is installed [...]

  • Page 128

    128 5 Video Controllers Matrox MGA Millenniu m Video Controller Ca rd MGA Connectors The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector . The video controller supports an output-only VESA feature connector in VGA mode[...]

  • Page 129

    129 5 Video Controllers Matrox MGA Millenni um Video Controll er Card Available MGA Video Resolutions The number of colors supported is limited by the video card and the video memory . The resolution/refresh-rate combination is limited by a combination of the display , the graphics card, and the video memory . If you attempt to set the resolution o[...]

  • Page 130

    130 5 Video Controllers Matrox MGA Millenniu m Video Controller Ca rd The following table summarizes the video resolutions which are supported. The maximum 2D resolutions for any given video memory capacity and color scale can be found from the following table: 1. 1152 ✕ 882 is not supported b y HP displays 2. The uppe r limit of refresh rate fo [...]

  • Page 131

    131 5 Video Controllers Matrox MGA Millenni um Video Controll er Card MGA Video BIOS A feature of the Matrox MGA Millennium card is the capability t o flash program the video BIOS. This is achieved as follows: 1 Set SW-1, on the Matrox card, to ON (BIOS unprotected). 2 Set the “Operating System” field in the Setup program to Others . 3 Run the [...]

  • Page 132

    132 5 Video Controllers DB15 Connector Pinout DB15 Connector Pinout The layout of the pins for the DB15 VGA Connector are the same for the three video controllers mentioned earlier in this section. 6 - Ground 11 - Not Used 12 - Data from display (DDC1) 13 - H-Sync 14 - V -Sync 15 - Not Used 7 - Ground 8 - Gr ound 10 - Ground 9 - Not Used Red -1 Gre[...]

  • Page 133

    6 Aztech AT3300 Audio Fax/Data Modem Depending on the particular HP V ectra 500 Series PC model, there may be an Aztech A T3300 audio fax/data modem installed. This modem incorporates built-in advanced communication and audio telephony features, including a capability to perform simultaneous audio playback and recording, as well as hands-free commu[...]

  • Page 134

    6 Aztech AT3300 Audio Fax/Data Modem Introduction 134 English Introduction The Aztech A T3300 audio fax/data modem operates in Plug and Play mode, therefore the hardware settings should not conflict with those of any other devices on the sy stem. The W indows 95 Device Manager can be used to check the type of modem and configuration installed on th[...]

  • Page 135

    English 135 6 Aztech AT3300 Audio Fax/Data Modem Introduction Communications Options As a data modem, the modem operates at line speeds of up to 28,800 bps. Error correction (V .42/MNP 2-4) and data compression (V .42 bis/MNP 5) maximize data transfer integrity and boost data throughput up to 115.2 kbps. The modem also operates in non-error - corre[...]

  • Page 136

    6 Aztech AT3300 Audio Fax/Data Modem Introduction 136 English • Fax modem send and receive rates of up to 14,400 bps. V .17/V .29/V .27ter and V21 channel 2, Group 3 Fax mode. • Full duplex speakerphone. • Enhanced AT, voice and class 1 & 2 fax commands. • Line quality monitoring retrain. • Recording of telephone conversation through [...]

  • Page 137

    English 137 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration European Firmware and Telephone Line Configuration The configuration of the Aztech A T3300 audio fax/data modem is specific to each country’ s telephone standards. The following t able shows the different A T3300 European firmware configuration a[...]

  • Page 138

    6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 138 English Aztech AT3300 Localisation Utility The Aztech A T3300 Localisation Utility floppy disk automatically determines which firmware country code i s configured on the Aztech A T3300 audio fax/data modem, and has the possibility to modify the configuration[...]

  • Page 139

    English 139 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration 1 Enter the letter that corresponds to the country to be configured. The message, “Please wait, reprogramming the modem” will be displayed while the Audio Fax/Data Modem is reconfigured. 2 A window will then be displayed, indicating the modem f[...]

  • Page 140

    6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 140 English 4 After installing and localizing the Aztech AT3300 audio fax/data modem, you must then re-install the Mediatrends Quip software, since its license requires the card’s identification. For details, see the Localization Instructions and Replacement I[...]

  • Page 141

    English 141 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration Enter the following A T commands to verify or change the firmware country code: When you have finished, the HyperT erminal session can be saved and used again, or you can exit without saving the session. AT Command Comments Modem Response Co mments[...]

  • Page 142

    6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 142 English[...]

  • Page 143

    143 A AT commands, 141 audio data/fax modem configuration, 137–141 current firmware country code, 138 European firmware, 137 features, 135–136 firmware code, 137 firmware country code, 137 jumper block color, 137 Localisation Utility , 138–140 localize firmware code using HyperTerminal, 140 pulse dialing, 137 audio fax/data modem communicatio[...]

  • Page 144

    144 Index R rear panel display connector, 24 keyboard socket, 24 mouse socket, 24 parallel device socket, 24 serial device connectors, 24 rear panel connectors minitower and desktop, 24 S S3 Trio 64 extended VGA modes (1 MB), 122 extended VGA modes (2 MB), 125 standard VGA modes, 121 video memory, 121 video modes, 121 S3 Trio 64 chip video controll[...]

  • Page 145

    Index 145 T Typical Windows 95 resolutions S3 Trio 64 video controller, 125 SiS 6205 video controller, 118 U UMA upgrading video memory, 117 using the HP Dynamic video feature, 118 Unified Memory Architecture system board overview, 28 V video controllers Integrated Ultra VGA, 120–125 Matrox MGA Millennium, 127–131 SiS 6205, 116–118 video mode[...]

  • Page 146

    146 Index[...]