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Intel 21143 manual

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Table of contents for the manual

  • Page 1

    Intel ® 21 143 PCI/CardBus 10/ 100Mb/s Ethernet LAN Controller Design Guid e July 2002 Order Numb er: 27858 8-001[...]

  • Page 2

    2 Design G uide Informati on in th is docum ent is p rovided in conn ection with Inte l ® products . No license, express or imp lied, by estoppe l or otherwise, to any intellectu al property rights is g ranted by this docu ment. E xcept as pro vided in Intel’s T erms an d Condit ions of Sa le for su ch product s, Inte l assumes no liability what[...]

  • Page 3

    Design G uide 3 Contents Contents 1.0 Functiona l Overview ................. ............. .................... ............ ............. .................... .......... ... ............ 5 1.1 21143 Overview ....... ...... ....... ...... ....... ...... ....... ...... ...... ....... ...... ............. ....... ...... ....... ...... ...... 5 1.2 Ne[...]

  • Page 4

    4 Design G uide Contents 9 AUI 10BA SE2 Network Conn ection ....... .................... ............ .................... ............. ................... . 17 10 21143 Ex ternal Compo nent Connec tions .................. ............ .................... ............. ................... . 20 11 LED Time-Str etcher Circ uit .............. ......[...]

  • Page 5

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 5 This desi gn guide provides a de scription o f how to imp lement 100B ASE-TX and 10BASE-T network con nections u sing the 21 143 PCI/CardBu s 10/10 0 Mb/s Ethernet LAN C ontroller (referred t o as the 21 143). While this document will not prov ide specific recommendat[...]

  • Page 6

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 6 Design G uide The 21 143 imp lements the 100BASE- T MII layer and the 100 /10 Mb/s Ethernet MAC layer . The 21 143 pro vides a dual network interf ace for both a 1 00BASE-T and a 10 Mb/s Ethern et. At the 100BASE-T p ort, the 21 143 support s the indus try-stand ard MII for any 10[...]

  • Page 7

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 7 SYM-based PHY dev ices ar e provided by GEC Ples sey*, Quality Semiconductor*, and Micro Linear*. The S YM-ba sed PH Y des ign i n clud es the foll owi ng comp onen ts: • The SYM-based PHY devices, which have a direct interface to th e SYM port of the 21 1 43 with a[...]

  • Page 8

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 8 Design G uide Ta b l e 5 lists the active SYM signals when the 21 143 SYM port is selected. T able 4. M II Signals Signal Pin Number mii_clsn 11 8 mii_crs 11 7 mii_dv 129 mii_mdc 134 mii_mdio 135 mii_rclk 128 mii_rx_err 127 mii_rxd <3:0> 133:130 mii_tclk 124 mii_txd<3:0&g[...]

  • Page 9

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 9 3.0 Network Connection The network connections of the 21 14 3 can be used i n 10BASE-T , AUI, MI I, or SYM configurations. Dif ferent method s are used to conn ect each port to the actual cable con nector . 3.1 10BASE-T T wi ste d-Pair Network Port Figur e 3 , Figure [...]

  • Page 10

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 10 Design G uide Figure 3. 1 0BASE-T Network Connection with Buff ers tp_td+ 6 tp_td++ 7 tp_td- 5 tp_td-- 4 tp_rd- 9 tp_rd- 10 21143 Transmit Path Receive Path GND GND 61.9 301 61.9 301 806 TP Filters and Chokes 78Z041 (SMD) RJ45 GND 1 2 3 6 49.9 49.9 0.01 µ F LJ-05141.WMF 8 6 4 2 [...]

  • Page 11

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 11 Figur e 4 shows the 10B ASE-T networ k connection w ithout buf fers. Th e required comp onents f or this configuration ar e as follows : • T erminating and deco upling components • T ransfo rmer module (ra tio of 1: for swing co mpensation ) • Filter transforme[...]

  • Page 12

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 12 Design G uide Figur e 5 shows the mi nimum comp one nt requi rement fo r the 10BASE-T net work c onn ection. This implementation uses a filter transformer module with a 1: transformer on th e transmit path to compensate for the vo ltage swing. The required components f or this co[...]

  • Page 13

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 13 3.2.1 Internal Optional Daughtercard Figur e 6 shows a block d iagram of a 100-Ready d esign us ing a daught er card. 3.2.2 Descript ion of 100-Rea dy Daughte rcard Block D iagram The blocks in the10BAS E-T 100-Ready block diag ram represent the followi ng componen t[...]

  • Page 14

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 14 Design G uide 3.2.3 100-R eady Ext ernal Module Design Figur e 7 shows a block diag ram of a 100- Ready design using an external mod ule. 3.2.4 Description of 10 0-Ready Ex ternal Modul e Block Dia gram The blocks in the1 00-Ready external mo dule block di agram represent th e fo[...]

  • Page 15

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 15 3.3 A UI Ne tw o rk Por t The 21 143 is fully compliant with the AUI standard. The AUI can interface with an external medium-attachment unit (MAU) and connect to alternate media, such as 10BASE2 (ThinW ire) and 10BASE5 (t hickwire). Figure 8 and Fig ure 9 show the re[...]

  • Page 16

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 16 Design G uide Figure 8. A UI 10BASE5 Network and Pin Connectio ns aui_rd+ 139 aui_rd- 140 aui_cd+ 137 aui_cd- 138 aui_td+ 142 aui_td- 143 21143 Transmit Path Receive Path GND 40.2 40.2 GND 40.2 40.2 511 Isolation Transformer Collision Path 0.01 F µ 0.01 F µ 22 pF XFMR_RD+ XFMR_[...]

  • Page 17

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 17 Figur e 9 shows the AUI 10BASE2 networ k connection . In this conf iguratio n, the AUI is n ot externally exposed. Th e required componen ts for this configu ration are as follows: • Isolati on trans form e r • T erminating and deco upling components • DC-to-DC[...]

  • Page 18

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 18 Design G uide 3.4 Media-Specific Components Ta b l e 8 lists the media-specif ic interface components for 10 BASE-T access. Ta b l e 1 0 list s the media-specific interface compon ents for 10BASE2 an d 10BASE5 access. T able 8. 1 0BASE-T Media-S pecific Components Access T ype Co[...]

  • Page 19

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 19 4.0 21 143 Requi rement s This sectio n provide s informat ion about th e external comp onent connect ions for the 21 143, and describes th e follo wing requirements: • Unused JT AG port requ irements • Current referen ce and capacitor input • Crystal connectio[...]

  • Page 20

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 20 Design G uide 4.3 C ryst al and Cryst al Oscillator Connections Figur e 10 s hows two serial clock con nections; select either the crystal connection or the crys tal oscillator connection. According to the IEEE 802 .3 standard, a 20 MHz crystal is required. The crystal frequency [...]

  • Page 21

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 21 5.0 Signal Ro uting and Pla cement The Ethernet circuitry should be kept f ree of interference from u nrelated si gnal t races. Routi ng for other signals must be kept away from the space surrounding the grouped Ethernet components. Place the Ethernet circuitry at th[...]

  • Page 22

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 22 Design G uide Intel also rec ommends th at the conn ector ’ s shield of the adapter should be connected to the PC chassis. 5.1.1 3.3 V Power Supply The 21 143 o perates with a power supply of 3. 3 V . At least eight decouplin g capacitors are rec o mmen ded a nd s houl d c ont [...]

  • Page 23

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controller Design G uide 23 6.0 Design C onsiderations This section provid es informat ion to aid t he user in desi gni ng Ethernet and Fas t Ethernet capa bilitie s onto a motherboard. In addition, i t also i ncludes des ign consi derations for FCC compl iance. 6.1 Designing the Ethernet Corne[...]

  • Page 24

    Intel ® 21 143 PC I/CardBus 10 /100Mb/s Ether net LAN Controlle r 24 Design G uide • Engineering Electromagnetic Capability , by V . Prasad Kodali 6.2.2 Suggest ions for Routing For routing in for mat ion, cons i der the follo win g sug gestio ns: • Never route any etch (power or ground) across a partition or void because the signal loses its [...]