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Intel PD672X/30/32/33 manual

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Table of contents for the manual

  • Page 1

    PD672X/30/32/33 — ZV Port Implementation Application N ote May 2001 As of May 2001, this document replaces the Basis Communications Corp. document AN-PD 10 .[...]

  • Page 2

    Application Note Informati on in this do cument i s prov ided in connect ion wit h Intel ® products . No license, expr ess or implied, by esto ppel or other wise, to any inte llectual property rights is grante d by this document. Except as provi ded in Inte l’s T erms an d Condit ions of S ale for su ch pro ducts, Inte l assumes no liability wha[...]

  • Page 3

    Application Note 3 PD672X/3 0/32/33 — ZV Port Implementation Contents 1.0 Introduction .................. ............. ............. ............ .................... ............. ............. ............ 5 2.0 Overview ................. ............. ............. ............. ................... ............. ............. ................[...]

  • Page 4

    4 Application Note PD672X/30/32/3 3 — ZV P or t Implementati on[...]

  • Page 5

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 5 1.0 Int roductio n The PD6710, PD 6722, and PD672 9 are single-chip PCMCIA interface contro l lers capable of controlling one or two PCMCIA or compact Flash sockets , respectively . They are design ed fo r use in embedded app lications and notebook systems where reduced form factor and [...]

  • Page 6

    PD672X/30 /32/33 — ZV Port Implementation 6 Application Note 2.0 Overview This application note d iscusses system design considerations asso ciat ed wit h the implementation of the ZV (Zo omed V ideo) Port when us ing the PD6722 /’29/’30, or PD6832 contr oller devices. Intended to assist th e system designer , this document highlights how var[...]

  • Page 7

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 7 Note that ZV Port imp lementation is likely to vary depending on th e platform; the Socket Ser vices software must be cust omized to address th ese variances. Cont rolling the OE (outpu t enable) inputs of the external bu ffers depends upon specific hardware des ign and software needs t[...]

  • Page 8

    PD672X/30 /32/33 — ZV Port Implementation 8 Application Note A buffer circuit placed between the PC Card bus and the VGA video port reduces the trace length to lower the loading ef fect. The ZV Port standard requires that the length of the trace between the PC Card connector and the buf fer (if use d) must be less than two inches. Buffer s are al[...]

  • Page 9

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 9 5.0 Dedicate d Socket Approa ch to ZV Po rt Implementatio n Figur e 2 shows a soluti on using the P D6722/ ’ 29/ ’ 30 / ’ 6832 Controll er and the GD7XXX Sup er VGA controller to support a single dedicated ZV Port slot. This simpl e implement a tio n does not require any external [...]

  • Page 10

    PD672X/30 /32/33 — ZV Port Implementation 10 Application Note 6.0 B uffer Imp lementat ion fo r Audi o DAC A buff er s olu tion to is olate the aud i o co ntro ller when the socket is not conf igur ed in ZV Port mode is shown i n Figu re 3 . This illustr ates how to control th e buffer enable; if the GD7XXX is used, th en one of the GPO pins can [...]

  • Page 11

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 11 7.0 ZV Port Im plementation for Socket A and B Figur e 4 sho ws th e ZV Port support for socket A and B. If using the GD7XXX, two of the GPO pins can control the b uffer output enab l es. Since there is only one V -Port, a ZV Port PC Card can be inserted in either Socket A o r Socket B[...]

  • Page 12

    PD672X/30 /32/33 — ZV Port Implementation 12 Application Note 19 A16 I UV2 O 41 103 Video data to ZV Por t 20 A15 I UV4 O 43 105 Video data to ZV Por t 21 A12 I UV6 O 45 107 Video data to ZV Por t 22 A7 I SC LK I 47 109 Audio S CLK PCM s ignal 23 A6 I MCLK I 49 1 12 A udio MCLK PCM signal 24 – 25 A[5:4] I RESERVED RFU 50,53 1 13,1 15 Tr ist ate[...]

  • Page 13

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 13 21 A 12 I UV6 O 101 176 Video data t o ZV Port 22 A7 I SCLK I 104 179 Audio SCLK PCM signal 23 A6 I MCLK I 106 181 Audio MCLK PCM signal 24 – 25 A[5:4] I RE SERVED RFU 108, 1 10 183, 185 T ristated by Controller; no connection in PC Car d 26 – 29 A[3:0] I ADDRESS[3:0] I 1 12, 1 14 [...]

  • Page 14

    PD672X/30 /32/33 — ZV Port Implementation 14 Application Note 23 A 6 I MCLK I 103 178 Audio MCLK PCM signal 24 – 25 A[5:4] I RESERVED RFU 105, 107 181, 183 T ristated by Controller; no connection in PC Card 26 – 29 A[3:0] I ADDR ESS [3:0] I 109,1 1 1, 1 13,1 16 185,187, 189, 191 Used for accessing PC Card 33 IOIS16# O PCLK O 125 201 Pixel clo[...]

  • Page 15

    PD672X/3 0/32/33 — ZV Port Implementation Application Note 15 8.0 Layou t Guidelines The VGA controller , the PC Card (PCMCIA) Contro ller , and the PC Card Sockets mus t be in clos e proximity to one another . This requirement is particu lar ly impo rt ant when the PD 6832 or PD6833 device is used along with the ZV Port for Card bus implementati[...]