Intel S5721-xxx manual

CBI/CGI CB BASIC S5721-xxx TECHNICAL REFERENCE Intel ® Pentium ® III or Intel ® Celeron ® PROCESSOR-BASED SBC[...]

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W ARRANTY The product is warranted against material a nd manufacturing defects for two years from date of delivery . Buyer agrees that if this product proves defective Chassis Pl ans is only obligated to repair , replace or refund the purcha se price of this product at Chassis Plans’ discretion. The warranty is void if the prod uct has been subje[...]

T RADEMARKS IBM , PC, VGA, EGA, OS/2 and PS/2 are tr ademarks or registered trademarks of International Business Machines Corp. AMI and AMIBIOS are trademarks or registered trademarks of American Megatrends Inc. Intel, Pentium, Cel eron and AGP are regi stered trademarks of Intel Corporation. MS-DOS and Microsoft are registered trademarks of Micros[...]

CBI/CGI Technical Reference Chassis Plans i T able of Contents Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

CBI/CGI Technical Reference Chassis Plans ii T able of Contents Specifications (continued) T emperature/Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 Mean T ime Between Failures (MTBF) . . . . . . . . . . . . . . . . . . . . . .1-12 UL Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

CBI/CGI Technical Reference Chassis Plans iii T able of Contents System BIOS (continue d) Save Settings and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14 Exit W ithout Saving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14 Key Conventions . . . . . . . . . . . . . . . . . . . . . . . . [...]

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CBI/CGI Technical Reference Chassis Plans v H ANDLING P RECAUTIONS ________________ ______________ _________________ ______________ __________ WA R N I N G : This product has compo nents which may b e damaged by electro static discharge. ________________ ______________ _________________ ______________ __________ T o protect your single board comput[...]

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Specifications CBI/CGI Technical Reference Chassis Plans 1-1 Chapter 1 Specifications I NTRODUCTION The CBI full-featured PCI/IS A processors are single bo ard computers (SBCs) which feature an Intel ® Celeron ® microprocessor or Intel ® Pentium ® II I microprocessor, Intel 440BX AGPset, 66/100MHz system an d memory buses, In tel Accelerated Gr[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-2 M ODELS ( CONTINUED ) Model # Model Name Speed CBI - BX: (continued) Intel ® Celeron ® Processor - 66MHz FSB/128K cache: (cont’d) S5721-005-x M S5721-004-x M S5721-003-x M S5721-002-x M CBI/433 CBI/400 CBI/366 CBI/333 433MHz 400MHz 366MHz 333MHz CGI - GX: Intel ® Pentium ® III Proce[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-3 M ODELS ( CONTINUED ) where xM indicates memory size (0M = 0MB memory , 8M =8MB memory , etc.) F EATURES • Intel ® Pentium ® III (FC-PGA) microprocessor • 1.0GHz, 900MHz, 850MHz, 800 MHz, 750MHz, 700MHz or 650MHz, 600EMHz, 550EMHz or 500EMHz with 256K cache and a 100MHz Front Side B[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-4 F EATURES ( CONTINUED ) • Intel Accelerated Graphics Port (AGP) VGA on-board video interface • PCI Local Bus supports off-board PCI op tion cards, PCI 10/100Base-T Ethernet controller and o n-board PCI Ultra Wide SCSI cont roller - Adaptec AIC-7880 • DRAM error checking and correcti[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-5 SBC B LOCK D IAGRAM[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-6 SBC P ROCESSOR B OARD L AYOUT[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-7 P ROCESSORS • Intel ® Pentium ® III (FC-PGA) microprocessor • 1.0GHz, 900MHz, 850MHz, 800 MHz, 750MHz, 700MHz or 650MHz, 600EMHz, 550EMHz or 500EMHz with 256K cache and a 100MHz Front Side Bus (FSB) or Intel ® Celeron ® microprocessor • 900MHz or 850MHz with 128K cache and a 100[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-8 (L1) instruction cache and 16K L1 data cache. These cache arrays run at the full speed of the processor cor e. For Celeron processors, a 12 8K unified, non-bloc king second level (L2) cache improves performance by reducing the average memo ry access time and providing fast access to recen[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-9 Specification, the PC Register ed DIMM Specification and the PC Serial Presence Detect Specification. M EMORY H OLE The SBC supports a 1MB memory hole opti on at 512KB-640KB or 15MB-16MB. E RROR C HECKING AND C ORRECTION The memory interface supports ECC modes vi a BIOS settin g for multi[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-10 The LM80 also monitors an external chassi s intrusion switch via the system hardware monitor connector (P18). A general purpose output (GPO) is also provided at the system hardware monitor connector . This signal can be used to provi de a user -defined function. The following system volt[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-11 PCI E NHANCED IDE U LTRA DMA/33 I NTERFACE (D UAL ) Dual high performance PCI Bus Master EI DE interfaces are capable of supporting two IDE T ype 4 disk drives each in a master/sla ve configuration. The interface supports Ultra DMA/33 with synchronous DMA mode tran sfers up to 33MB per s[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-12 B ATTERY A built-in lithium battery is provided, for ten years of data retention for CMOS memory . ________________ ______________ _________________ ______________ _________ CAUTION: There is a danger of explosion if the battery is inco rrectly replaced. Replace it only with the same or [...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-13 C ONFIGURATION J UMPERS The setup of the configuration jumpers on th e SBC is described below . * indicates the default value of each jumper . ________________ ______________ _________________ ______________ _________ NOTE: For two-positio n jumpers (3-post), "RIGHT" is toward [...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-14 C ONFIGURATION J UMPERS ( CONTINUED ) Jumper Description JU13 SCSI T ermination Enable (not available on BASIC model s) Install to disable on-b oard act ive termin ation for the SCSI interface. Remove to enable active termination. * JU14 Fan Speed Monitor This jumper must be removed (dis[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-15 E THERNET LED S AND C ONNECTOR ( NOT AVAILABLE ON BASIC MODELS ) The Ethernet interface has two LEDs for st atus indication and an RJ-45 network connector . S YSTEM BIOS S ETUP U TILITY The System BIOS is a Hi-Flex AMIBIOS with a ROM-resident setup utility . The BIOS Setup Utility allows[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-16 C ONNECTORS __________ _____________ _________________ ______________ ________________ NOTE: Pin 1 on the connectors is indicated by the square pad on the PCB. ________________ ______________ _________________ ______________ _________ P2 - Keylock Connector 5 pin single row header , Amp [...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-17 C ONNECTORS ( CONTINUED ) P4A - Keyboard Header 5 pin single row header , Amp #640456-5 Pin 1 2 3 4 5 Signal Kbd Clock Kbd Data Key Kbd Gnd Kbd Power (+5V fused ) with self-resetting fuse P5 - Speaker Port Connector 4 pin single row header , Amp #640456-4 Pin 1 2 3 4 Signal Speaker Data [...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-18 C ONNECTORS ( CONTINUED ) P7 - Serial Port 2 Connector (continued) Pin 7 9 Signal Data T erminal Ready-O Signal Gnd Pin 8 10 Signal Ring Indicator-I NC P8 - Parallel Port Connector 26 pin dual row header , 3M #30326-6002HB Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 Signal Strobe Data Bit 0 Da[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-19 C ONNECTORS ( CONTINUED ) P10 - External Reset Connector 2 pin header , Amp #640456-2 Pin 1 2 Signal Negative External Reset Gnd P1 1 - Primary IDE Hard Drive Connector 40 pin dual row header , Robinson Nugent #IDH-40LP-S3-TR Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Sig[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-20 C ONNECTORS ( CONTINUED ) P1 1A - Primary IDE Hard Drive Connector (continued) Pin 29 31 33 35 37 39 Signal DACK 1 MIRQ 0 Add 1 Add 0 CS 1S IDEACTS Pin 30 32 34 36 38 40 Signal Gnd IOCS16 Gnd Add 2 CS 3S Gnd P12 - Hard Drive LED Connector 4 pin single row header , Amp #640456-4 (This con[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-21 C ONNECTORS ( CONTINUED ) P13 - PCI Ultra Wi de SCSI Controller Connector (con tinued) Pin 23 24 25 26 27 28 29 30 31 32 33 34 Signal Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd WIDEPS Pin 57 58 59 60 61 62 63 64 65 66 67 68 Signal SCZBSY SCZACK ASCRST SCZMSG SCZSEL SCZCD SCZREQ SCZIO SC[...]

Specifications CBI/CGI Technical Reference Chassis Plans 1-22 C ONNECTORS ( CONTINUED ) Copyright 2003 by Trenton T echnology Inc. All righ ts reserved. P17 - Universal Serial Bus (USB) Connector 8 pin dual row header , Molex #702-46-0821 (+5V fused with self-resetting fuses) Pin 1 3 5 7 Signal +5V -USB0 USB0- USB0+ Gnd-USB0 Pin 2 4 6 8 Signal +5V [...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-1 Chapter 2 ISA/PCI Reference ISA B US P IN N UMBERI NG 62-pin ISA Bus Connector Component Side of Board 36-pin ISA Bus Connector[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-2 ISA B US P IN A SSIGNMENT S The following tables summarize pin assignment s for the Industry Standard Architecture (ISA) Bus connectors. I/O Pin Signal Name I/O I/O Pin Signal Name I/O A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1 1 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-3 ISA B US S IGNAL D ESCRIPTIONS The following is a description of the IS A Bus signals. All signal lines are TTL- compatible. AEN (O) Address Enable (AEN) is used to degate the mi croprocessor and other devices from the I/O channel to allow DMA transfers to take place. When this line is[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-4 IO16# (I) I/O 16-bit Chip Select (IO16#) si gnals the system board that the pr esent data transfer is a 16-bit, 1 wait-state, I/O cycle. It is derived from an address decode. IO16# is active low and should be driven with an open collector or tri-stat e driver capable of sinking 20 mAmp[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-5 NOWS# (I) The No Wait S tate (NOWS#) signal tells the microprocessor that it can complete the present bus cycle without inserting any add iti onal wait cycles. In order to run a memory cycle to a 16-bit device without wait cycles, NOWS# is derived from an address decode gated with a Re[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-6 T- C ( O ) T erminal Count (T-C) provides a pulse when th e terminal count for any DMA channel is reached.[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-7 I/O A DDRESS M AP * I NTERRUPT A SSIGNMENT S * * These are typical parameters, which may not reflect y our current system. Hex Range Device 000-01F 020-03F 040-05F 060-06F 070-07F 080-09F 0A0-0BF 0C0-0DF 0F0 0F1 0F8-0FF 1F0-1F8 200-207 278-27F 2F8-2FF 300-31F 360-36F 378-37F 380-38F 3A[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-8 PCI L OCAL B US O VERVIEW The PCI (Peripheral Component Interconnect) Local Bus is a high performance, 32-bi t or 64-bit bus with m ultiplexed address and data li nes. It is intended for use as an inter- connect mechanism between highly integrated peripheral c ontroller components, per[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-9 PCI L OCAL B US S IGNAL D EFINITION The PCI interface requires a minimum of 47 pins for a target-only de vice and 49 pins for a master to handle data and addressing, interface control, arbitration and system functions. The diagram be low shows the pins in fu nctional groups, with requi[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-10 PCI L OCAL B US P IN N UMBERING Component Side of Board 5-volt/32-bit PCI Connector[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-11 PCI L OCAL B US P IN A SSIGNMENT S The PCI Local Bus pin assignments shown below are for the PCI option slots on th e backplane. The PCI Local Bus specifies both 5-volt an d 3 .3-volt signaling en vironments. The following bus pin assignm ents are for the 5-volt conn ector . The 3.3-v[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-12 PCI L OCAL B US P IN A SSIGNMENT S ( CONTINUED ) I/O Pin Signal Name I/O Pin Signal Name B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 +3.3V DEVSEL# Gnd LOCK# PERR# +3.3V SERR# +3.3V C/BE1# AD14 Gnd AD12 AD10 Gnd †† A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-13 PCI L OCAL B US P IN A SSIGNMENT S ( CONTINUED ) The following pin assignme nts apply only to backplanes with 64-bi t PCI option slots. I/O Pin Signal Name I/O Pin Signal Name Connector Key Connector Key Connector Key Connector Key 64-bit s pacer 64-bit s pacer B63 B64 B65 B66 B67 B68[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-14 PCI L OCAL B US S IGNAL D ESCRIPTIONS The PCI Local Bus signals are described below and may be categorized into the following function al groups: • System Pins • Address and Data Pins • Interface Control Pins • Arbitration Pins (Bus Masters Only) • Error Reporting Pins • I[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-15 C/BE[7::4]# (optional) Bus Command and Byte Enables are multiplexed on the same pins. During an address phase (when using the DAC command and when REQ64# is asserted), the actual bus comma nd is transferred on C/BE[7::4]#; otherwise, these bits are reserved and indeterminate. During a[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-16 PA R Parity is even parity across AD[31::00] and C/BE[ 3::0]#. Parity generation is required by all PCI agents. The master drives P AR for address and write data phases; the target drives P AR for read data phases. P AR64 (opt ional) Parity Upper DWORD is the even parity bit that prot[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-17 STOP# S top indicates that the current target is requesting the master to stop the current transaction. TCK (optio nal) T est C lock is used to clock state information and test data into and out of the device during operation of the T AP (T est Access Port). TDI (optional) T est D ata[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-18 PICMG E DGE C ONNECTOR P IN A SSIGNMENT S The pin assignments shown below are for the PICMG portion of the edge connector on the processor board. These pin assignments match those of the PICMG connector of the processor slot on the backplane. I/O Pin Signal Name I/O Pin Signal Name B1[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-19 PICMG E DGE C ONNECTOR P IN A SSIGNMENT S ( CONTINUED ) I/O Pin Signal Name I/O Pin Signal Name B50 B51 Connector Key Connector Key A50 A51 Connector Key Connector Key B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 NC AD5 AD3 Gnd AD1 +5V ACK64# +5V +5V A52 A53 A54 A55 A56 A57 A58[...]

ISA/PCI Reference CBI/CGI Technical Reference Chassis Plans 2-20 PICMG E DGE C ONNECTOR P IN A SSIGNMENT S ( CONTINUED ) The following pin assignments apply only to SBCs with 64-bit PICMG connectors. Copyright 2003 by T renton T echnology Inc. All righ ts reserved. I/O Pin Signal Name I/O Pin Signal Name Connector Key Connector Key Connector Key Co[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-1 Chapter 3 System BIOS BIOS O PERATION Sections 3 throu gh 8 of this manual descri be the operation of the American Megatrends AMIBIOS and the AMIBIOS Setup Utility . Refer to Running AMIBIOS Setup later in this chapter for standard Setup screens, options and default s. The available Setup sc[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-2 the validity of the system setup informa tion stored in the system CMOS RAM. (See Running AMIBIOS Setup later in this chapter .) If AMIBIOS detects a fault, the screen displays the error condition(s) which has/hav e been detected. If no errors are detected, AMIBIOS attempts to load the syste[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-3 Password Entry The system may be configured so that the us er is required to enter a password each time the system boots or whenever an attempt is made to enter AMIBIOS Setup. The password function may also be disabled so that th e password prompt does not appear under any circumstances. The[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-4 Y ou may try again to enter the correct pass word. If you en ter the password incorrectly three times, the system responds in one of two different ways, depending on the value specified in the Password Check option on th e Advance CMOS Setup screen: 1) If the Password Check optio n is set to[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-5 R UNNING AMIBIOS S ETUP AMIBIOS Setup keeps a record of system parameters, such as date and time, disk drives, display type and other user-defined parameters . The Setup parameters reside in the Read Only Memory Basic Input/Output System (ROM BIOS) so th at they are available each time the s[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-6 AMIBIOS S ETUP U TILITY M AIN M ENU When you press <F1> in response to an error message received during the POST routines or when you press the <Del> key to enter the AM IBIOS Setup Utility , the following screen display s: AMIBIOS Setup Main Menu When the AMIBIOS Setup M ain Men[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-7 • Primary Master and Slave Disk T ypes • Secondary Master and Slave Disk T ypes • Logical Block Address (LBA) Mode • Block Mode • PIO Mode • 32Bit Mode • Boot Sector V irus Protection • Select Advanced CMOS Setup to make changes to A dvanced CM OS Setup parameters as describe[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-8 • Select Advanced Chipset Setup to make changes to Advanced Chipset Setup parameters as described in the Ad vanced Setup chapter of this manual. The following options may be mo dified: • USB Function • USB KB/Mouse Legacy Support • Port 64/6 0 Emulation • System Error Signal (SERR#[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-9 • Power Button Function • Green PC Monitor Power State • V ideo Power Do wn Mode • Hard Disk Power Down Mode • Hard Disk T ime Out • Power Saving T ype • Standby/Suspend T imer Unit • Standby T ime Out • Suspend T ime Out • Slow Clock Ratio • Display Activity • Device[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-10 • OnBoard Parallel Port • Parallel Port Mode • EPP V ersion • Parallel Port IRQ • Parallel Port DMA Channel • OnBoard IDE • Select Auto-Detect Hard Disks to have AMIBIOS automatically detect the type and parameters of each hard driv e if you have IDE drive(s). This option is d[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-11 A UTO -D ETECT H ARD D ISKS The Auto-Detect Hard Disks option allows you to have AMIBIOS auto matically detect the type of hard disk drive(s) in your syst em. The automatic detection functions on ly if you have IDE drives. The parameters are re ported on the S tandard CMOS Setup screen. AMI[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-12 This is the message whi ch displays before you have established a password or if the last password entered was the null p assword. If a password has already been established, you are asked to enter the current password before being prompted to enter the new password. T ype the new password [...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-13 The Change User Password option is similar in function ality to the Change Supervisor Password and displays the same messages, except that "user" replaces "supervisor ." If you have signed on under the user passw ord, you cannot change the supervisor password. D ISABLING[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-14 Auto Configuration with Fail Safe Settings This option allows you to load the Fail Safe default settings when yo u cannot boot your computer successfully . These settings are more likely to configure a workable comp uter . They may not provide optimal performance, but are the most st able s[...]

System BIOS CBI/CGI Technical Reference Chassis Plans 3-15 K EY C ONVENTIONS Listed below is an explanation of the keys you may use for navig ation and selection in the AMIBIOS Setup Utility: Key Task <Esc> <Tab> Arrow keys <Enter> <F2>/<F3> <F10> Plus key (+), <PgUp> Minus key (-), <PgDn> Close the c[...]

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Standard CMOS Set up CBI/CGI Technical Reference Chassis Plans 4-1 Chapter 4 S tandard CMOS Setup S T ANDARD CMOS S ETUP When you select S tandard CMOS Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displays: S tandard CMOS Setup Screen When you display the Standard CMOS Setup screen, the format is similar to the sample [...]

Standard CMOS Setup CBI/CGI Technical Reference Chassis Plans 4-2 The Help window displays allowable settings: Month : Jan - Dec Day : 01 - 31 Y ear : 1901 - 2099 There are three fields for ente ring the date. Use the left and right arrow keys or the tab key to move from one field to another; use the pl us and minus (or PgUp an d PgDn) keys to scro[...]

Standard CMOS Set up CBI/CGI Technical Reference Chassis Plans 4-3 through 1F7H, 3F6H and IRQ14 . The secondary controller uses I/O port addresses 17 0H through 177H, 376H and IRQ15. The AMIBIOS enhanced IDE (EIDE) interface can support IDE T ype 4 disk drives. This EIDE interface allows disk driv es greater than 528MB to be used. The hard disk dri[...]

Standard CMOS Setup CBI/CGI Technical Reference Chassis Plans 4-4 • Set the dr ive type to Auto to have AMIBIOS detect the drive type and parameters automatically each time the system is booted up . This option does not display the drive type on the Standard CMOS Setup screen, but does display it on the System Configuration screen shown after a s[...]

Standard CMOS Set up CBI/CGI Technical Reference Chassis Plans 4-5 sector size by boosting the write current for sectors on inner tracks. This parameter designates the track (cy linder) number where writ e precompensation begins. Sectors (Sec) designates the number of disk sectors per track. Size is the formatted capacity of the drive (in megabytes[...]

Standard CMOS Setup CBI/CGI Technical Reference Chassis Plans 4-6 A vailable options are: Off On Pr ogrammed I/O (PIO) Mode IDE PIO mode programs timing cycles betw een the IDE drive and the programmable IDE contro ller . A s the PIO m ode increases, the cycle time decreases. Set the PIO Mode optio n to Auto to have AMIBIOS select the PIO mode used[...]

Standard CMOS Set up CBI/CGI Technical Reference Chassis Plans 4-7 Select ‘ Y’ or ‘ N’ as appropriate. Y ou may have to select ‘ N’ several times to p revent the boot sector write. The following message displays if any attempt is made to format any cylinder , head or sector of any hard disk drive via the BIOS INT 13 Hard Disk Drive Serv[...]

Standard CMOS Setup CBI/CGI Technical Reference Chassis Plans 4-8 This page intentionally left blank. Copyright 2003 by T renton T echnology Inc. All righ ts reserved.[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-1 Chapter 5 Advanced Setup A DVANCED CMOS S ETUP When you select Advanced CMOS Setup from the AMIBIOS Setup Utility Main Menu, the following Setup screen displ ays: Advanced CMOS Setup Screen When you display the Adva nced CMOS Setup sc reen, the form at is similar to the sample shown above[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-2 A DVANCED CMOS S ETUP O PTIONS The descriptions for the syst em options list ed below show the values as they appear if you have not yet run Advanced CMOS Setup. Once values have been defined, they display each time Advanced CMOS Setup is run. Quick Boot This option allows you to have the[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-3 A vailable options are: Auto Floppy Hard Disk 1st Boot Device This option specifies the device type of the first boot drive from which AMIBIOS attempts to boot after AMIB IOS post routines complete. The Setup screen displays the system optio n: 1st Boot Device 1st IDE-HDD A vailable optio[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-4 The Setup screen displays the system optio n: T ry Other Boot Devices Y es A vailable options are: No Ye s Initialize I2O Devices If this option is set to Ye s , AMIBIOS initializes any attach ed I2O devices (proce ssors or storage devices). The Setup screen displays the system optio n: I[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-5 Hard Disk Access Contr ol This option specifies the read/write access wh ich is set when booting from a hard disk drive. This option is effective only if the device is accessed through the BIOS. The Setup screen displays the system optio n: Hard Disk Access Contr ol Read-Write A vailable [...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-6 The Setup screen displays the system optio n: PS/2 Mouse Support Enabled A vailable options are: Disabled Enabled System Keyboard This option indicates whet her or not a keyboard is attached to the compu ter . The Setup screen displays the system optio n: System Keyboard Present A vailabl[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-7 T wo options are available: • Select Setup to have the password prompt appear only when an attempt is made to enter the AMIBIOS Setu p program. • Select Always to have the password prompt a ppear each time the system is powered on. ________________ ______________ _________________ ___[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-8 Three options are available: • Select Disabled to disable both L1 internal cache memory on the SBC and L2 secondary cache memory . • Select Wri te T h ru to use the write-thr ough caching algorithm. • Select Wri te B a ck to use the write-back caching algorithm. External Cache This [...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-9 accessed more rapidly than ROM and the data bu s is wider to RAM. The default setting for the video BIOS segmen ts is Cached . Other 16KB ROM segment s may be shadowed in the memory area from C800H to E000H, depending upon preferen ces and system requirements. The ROM area that is not use[...]

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Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-11 A DVANCED C HIPS ET S ETUP When you select Advanced Chipset Setup from the AMIBIOS Setup M ain Menu, the following Setup screen displays: Advanced Chipset Setup Scr een When you display the Advanced Chipset Set up screen, the format is similar to the sample shown above, except the screen[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-12 A DVANCED C HIPS ET S ETUP O PTIONS The descriptions for the syst em options list ed below show the values as they appear if you have not run the Advanced Chipset Set up program yet. Once values have been defined, they display each time Advanced Chipset Setup is run. ________________ ___[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-13 A vailable options are: Disabled Enabled SERR# This option enables the System Error (SERR#) signal on the bus. The Setup screen displays the system optio n: SERR# Disabled A vailable options are: Disabled Enabled PERR# This option enables the Parity Error (PERR#) signal on the bus. The S[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-14 The Setup screen displays the system optio n: BX Master Latency Ti mer (Clks) 64 A vailable options are: Disabled 128 32 160 64 192 96 224 Multi-T ransaction Timer (Clks) This option specifies the multi-transaction latency tim ings (in PCI clocks) for devices on the SBC. The Setup screen[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-15 Three options are available: • None - No error checking or error reporting is done. • EC - Multibit errors are detected and re ported as parity errors. Single-bit errors are corrected by the chipset. Corrected bits of data from memory are not written back to DRAM system memory . • [...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-16 Graphics Apertur e Size (not available on BASIC models) This option specifies the amount of system memory which can be used by the Accel- erated Graphics Port (AGP). The Setup screen displays the system optio n: Graphics Aperture Size 64MB A vailable options are: 4 MB 64MB 8 MB 128 MB 16[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-17 The Setup screen displays the system optio n: AGP SERR Enabled A vailable options are: Disabled Enabled AGP Parity Error Response (not available on BASIC models) This option enables the Accelerated Graphics Port (AGP) to respond to parity erro rs. The Setup screen displays the system opt[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-18 A vailable options are: Disabled 3 Sysclk 1 Sysclk 2 Sysclk 4 Sysclk PIIX4 SERR# This option enables the System Error (SERR#) signal for the Intel PIIX4 chip. The Setup screen displays the system optio n: PIIX4 SERR# Disab led A vailable options are: Disabled Enabled USB Passive Release [...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-19 The Setup screen displays the system optio n: PIIX4 Delayed T ransaction Enabled A vailable options are: Disabled Enabled T ype F DMA Buffer Contr ol1/T ype FDMA Buffer Contr ol2 These options specify the DMA channels wher e T ype F buffer control is implemented. The Setup screen display[...]

Advanced Setup CBI/CGI Technical Reference Chassis Plans 5-20 This page intentionally left blank. Copyright 2003 by T renton T echnology Inc. All righ ts reserved.[...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-1 Chapter 6 Power Management Setup P OWER M ANAGEMENT S ETUP When you select Power Management Setup from t he AMIBIOS Setup Utility Main Menu, the following Setup screen displ ays: Power Management Setup Scr een When you display the Power Management Setup screen, the format is simi[...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-2 The Setup screen displays the system optio n: ACPI A ware O/S No A vailable options are: No Ye s Power Management/APM This option allows you to enable Advanced Power Man agement (APM) on your system. If this option is disabled, you cannot change any other options on the Power Man[...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-3 A vailable options are: Stand By Suspend Off V ideo Power Down Mode If the video subsystem remai ns inactive for a specified period of time, AMIBIOS conserves power by placing the subsystem into the power management state specified in this option. The period of inactiv ity before[...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-4 A vailable options are: Disabled 1 through 15, in increments of 1 minute Power Saving T ype The Setup screen displays the system optio n: Power Saving T ype POS A vailable options are: POS (Power On Suspend) Sleep Stop Clock Deep Sleep S tandby/Suspend Timer Unit This option spec[...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-5 Suspend T ime Out This option specifies the length of the period of system inactivity wh en the computer is already in Standby mode before it is placed in Suspend mode. In Suspend mode, nearly all power use is curtailed. The default for this optio n depends on the value selected [...]

Power Management Setup CBI/CGI Technical Reference Chassis Plans. 6-6 A vailable options are: Ignore Monitor Device 0 thr ough Device 8 Monitoring These options allow you to enable event monit oring for your peripherals and hard disk drives. If an option is set to Monitor and the computer is in a power-saving mode, AMIBIOS watches for activ ity on [...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-1 Chapter 7 PCI/Plug and Play Setup PCI/P LUG AND P LAY S ETUP When you select PCI/Plug and Play Setup from the AMIBIOS Setup Utilit y Main Menu, the following Setup screen displ ays: PCI/Plug and Play Setup Scr een When you display the PCI/Plug and Play Se tup screen, the format [...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-2 On Board LAN (not available on BASIC models) The Setup screen displays the system optio n: On Board LAN Enabled A vailable options are: Disabled Enabled On Board V ideo (not available on BASIC models) The Setup screen displays the system optio n: On Board V ideo Enabled A vailab[...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-3 A vailable options are: No Ye s PCI Latency Timer (PCI Clocks) This option specifies the latency of all PCI de vices on the PCI Local Bus. The settings are in units equal to PCI clocks. The Setup screen displays the system optio n: PCI Latency Timer (PCI Clocks) 64 A vailable op[...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-4 The Setup screen displays the system optio n: PCI IDE BusMaster Disabled A vailable options are: Disabled Enabled OffBoard PCI IDE Card This option specifies the PCI expansion slot on the SBC where the off-board PCI IDE controller is installed, if an y . If an off-board PCI IDE [...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-5 A vailable options are: Disabled INT A INTB INTC INTD Hardwired DMA Channels 0, 1, 3, 5, 6 and 7 These options allow you to specify th e bus type used by each DMA channel. The Setup screen displays the system optio n: DMA Channel # PnP where # is the DMA Channel number . A vaila[...]

PCI/Plug and Play Setup CBI/CGI Technical Reference Chassis Plans. 7-6 Reserved Memory Size This option specifies the size of the memory area reserved for legacy ISA adapter cards. If this option is set to Disabled , the Reserved Memory Address option is not available for modification. The Setup screen displays the system optio n: Reserved Memory S[...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-1 Chapter 8 Peripheral Setup P ERIPHERAL S ETUP When you select Peripheral Setup from the AMIBIOS Setup Uti lity Main Menu, the following Setup screen displays: Peripheral Setup Screen When you display the Peripheral Setup screen, the format is si milar to the sample shown above. The avai[...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-2 OnBoard FDC The on-board floppy drive controller may be enable d or disabled using this option. When this option is set to Auto , AMIBIOS attempts to enable any floppy drive controller on the ISA Bus. If no floppy controller is found on the ISA Bus, th e on-board floppy controller is en[...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-3 For example, if there is one of f-board serial port on the ISA Bus and its ad dress is set to 2F8H, Serial Port 1 is assigned address 3F8H and Serial Po rt 2 is assigned address 3E8H. Configuration is then as follows: COM1 - Serial Port 1 (at 3 F8H) COM2 - off-board serial port (at 2F8H[...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-4 • ECP allows the parallel port to be used with devices which adhere to the Extended Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve transfer rates of approximately 2. 5MB/second. ECP provides symmetric bi directional communication. EPP V ersion This option [...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-5 OnBoard IDE This option specifies the on-board integr ated drive electronics (IDE) controller channel(s) to be used. The Setup screen displays the system optio n: OnBoard IDE Both A vailable options are: Both Disabled Primary Secondary ________________ ______________ _________________ _[...]

Peripheral Setup CBI/CGI Technical Reference Chassis Plans 8-6 This page intentionally left blank. Copyright 2003 by T renton T echnology Inc. All righ ts reserved.[...]

CBI/CGI Technical Reference Chassis Plans A-1 Appendix A BIOS Messages BIOS B EEP C ODES Errors may occur du ring the POST (Power-O n Self T est) routines which are performed each time the system is powered on. Non-fatal errors are those which, in most cases, allow the system to continue the bootup process. The error message normal ly appears on th[...]

CBI/CGI Technical Reference Chassis Plans A-2 BIOS B EEP C ODES ( CONTINUED ) BIOS E RROR M ESSAGES If a non-fatal error occurs dur ing the POST routines perfor med each time the system is powered on, the error message will appear on th e screen in the following format: ERROR Message Line 1 ERROR Message Line 2 Press F1 to Resume Note the error mes[...]

CBI/CGI Technical Reference Chassis Plans A-3 BIOS E RROR M ESSAGES ( CONTINUED ) Message Description CH-2 Timer Error Most A T standard system boards include two timers. An error with Ti mer #1 is a fatal error , explained in BIOS Beep Codes earlier in this appendix. If an error occurs with Timer #2, this error message appears. CMOS Battery S tate[...]

CBI/CGI Technical Reference Chassis Plans A-4 BIOS E RROR M ESSAGES ( CONTINUED ) Message Description HDD Controller Failure The BIOS is not able to communicate with the hard disk drive controller . Check all appropriate connections after the system is powered off. INTR #1 Error Inte rrupt channel #1 has f ailed the POST routine. INTR #2 Error Inte[...]

CBI/CGI Technical Reference Chassis Plans A-5 ISA BIOS NMI H ANDLER M ESSAGES Message Description Memory Parity Error Memory failed. The message appears as follows: MEMORY P ARITY ERROR A T XXXXX where XXXXX is the address (in hexadecimal) at which the error has occurred. If the memory location cannot be determine d, the message is “Memory Parity[...]

CBI/CGI Technical Reference Chassis Plans A-6 P ORT 80 C ODES The following codes are presented on Port 80 H as the BIOS perfor ms its reset proc edure. Code Description Uncompressed Initialization Co de Checkpoints: D0 D1 D3 D4 D5 D6 D7 NMI is disabled. Power-on delay starting. In itialization code checksum to be ve rified next. Initializing DMA c[...]

CBI/CGI Technical Reference Chassis Plans A-7 P ORT 80 C ODES ( CONTINUED ) Code Description FC FD FF Erasing flash ROM next. Programming flash ROM next. Flash ROM programming successful. Restarting system BIOS next. Runtime code is unc ompressed in F000 shadow RA M. 03 05 06 07 08 0A 0B 0C 0E 0F 10 11 12 13 14 19 1A 23 NMI is disabled. Checking fo[...]

CBI/CGI Technical Reference Chassis Plans A-8 P ORT 80 C ODES ( CONTINUED ) Code Description 24 25 27 28 2A 2B 2C 2D 2E 2F 30 31 32 34 37 38 39 3A 3B 40 42 43 Configuration required before inter rupt vector initialization complete. Interrupt vector initialization about to begin. Interrupt vector initialization done. Clear ing password if POST diagn[...]

CBI/CGI Technical Reference Chassis Plans A-9 P ORT 80 C ODES ( CONTINUED ) Code Description 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 57 58 59 interrupts enabled (if diagnostics switch is on). Initializing data to check memory wraparound at 0:0 next. Data initialized. Checking for memory wraparound at 0:0 and finding total system memory size[...]

CBI/CGI Technical Reference Chassis Plans A-10 P ORT 80 C ODES ( CONTINUED ) Code Description 60 62 65 66 67 7F 80 81 82 83 84 85 86 87 88 89 8B 8C 8D 8F 91 95 DMA page register test passed. Performing DMA controller 1 base register test next. DMA controller 1 base register test pa ssed. Performing DMA contr oller 2 base register test next. DMA con[...]

CBI/CGI Technical Reference Chassis Plans A-11 P ORT 80 C ODES ( CONTINUED ) Code Description 96 97 98 99 9A 9B 9C 9D 9E A2 A3 A4 A5 A7 A8 A9 AA AB B0 B1 00 Initializing before passing control to adapter ROM at C800. Initialization before C800 adapter ROM gains contr ol completed. Adapter ROM check next. Adapter ROM had control and has return ed co[...]

CBI/CGI Technical Reference Chassis Plans A-12 P ORT 80 C ODES ( CONTINUED ) The System BIOS passes control to the differen t buses at the following checkpoints to do various tasks: A DDITIONAL B US C HECKPOINTS While control is in the dif f erent bus rou tines, additional checkpoints are outpu t to Port 80H as word values to identi fy the routines[...]

CBI/CGI Technical Reference Chassis Plans B-1 Appendix B Adaptec, Inc. Software License CAREFULL Y READ THE FOLLOWING TERMS AND COND ITIONS. BY USING ANY FILES FROM ADAPTEC, YOU AGREE T O BE BOUND BY THESE TERMS AND CONDITIONS. IF YOU DO NOT AGREE TO THESE TERMS AND CONDITIONS, PROMP TL Y RETU RN THE SOFTW ARE AND ALL ACCOMP ANYING ITEMS. This Lice[...]

CBI/CGI Technical Reference Chassis Plans B-2 7. EXPOR T : By using this Software, you acknowledge that the laws and regulations of the United States restrict the export and re-export of the Software. Further , you agree that you will not export or re-export the Software or media in any fo rm without the appropriate United States and foreign govern[...]

CBI/CGI Technical Reference Chassis Plans C-1 Appendix C SCSISelect Configuration Utility I NTRODUCTION This appendix provi des operating instru ctions for the Adaptec SCSISelect Config uration Utility , which allows you to view and chan ge the configurat ion se ttings for the Adaptec SCSI adapter supplied on your single board co mpu ter (SBC). It [...]

CBI/CGI Technical Reference Chassis Plans C-2 If you have made changes to the adapter settings, the following message displays: If you do not want to save your changes, select No to exit from the utility . If you made changes to the adapter settings, select Ye s to save your changes. The following message displays: Press any key to reboot the compu[...]

CBI/CGI Technical Reference Chassis Plans C-3 O PTIONS M ENU When you invoke the SCSISelect Configuration Utility , a screen similar to the following d isplays: Options Screen The two options available on this menu lead you to screens which allow you to view and/or change the adapter or device settings and to perform disk utility operations on thes[...]

CBI/CGI Technical Reference Chassis Plans C-4 C ONFIGURE /V IEW H OST A DAPTER S ETTINGS The Configure/V iew Host Ad apter option displays the current settings for t he SCSI bus interface and allows you to change these settings. When you select this option from the Optio ns Menu, a screen similar to the following displays: Configure/V iew Host Ad a[...]

CBI/CGI Technical Reference Chassis Plans C-5 priority and SCSI ID 0 has the lo west priority . For 16-bit devices, th e priority of IDs is 7 through 0, then 15 through 8,with SCSI ID 7 having t he highest priority and SCSI ID 8 having the l owest priority . All adapters (8-bit and 16-bit) have a default SCSI ID of 7, which gives th e host adapter [...]

CBI/CGI Technical Reference Chassis Plans C-6 16-bit Adapter T ermination Settings Description T ermination Adapter is at end of SCSI bus; bus has only 8-bit devices or only 16-bit devices Adapter is at end of SCSI bus; bus has both 8-bit and 16-bit dev ices. Last device must be 16-bit and be terminated. Adapter is not at end of SCSI bus; bus has o[...]

CBI/CGI Technical Reference Chassis Plans C-7 B OOT D EVICE O PTIONS The Boot Device Configuration screen displays the current settings for t he boot device and allows you to change these settings. When you select Boot Device Options from the Configure/V iew Host Adapter Settings screen, a screen similar to the following displays: Boot Device Confi[...]

CBI/CGI Technical Reference Chassis Plans C-8 SCSI D EVICE C ONFIGURATION The SCSI Device Configuration screen displays the current settin gs for each SCSI ID and allows you to change these settings. When you select this option from the Confi gure/V iew Host Adapter Settings menu , a screen similar to the following displays: SCSI Device Configurat [...]

CBI/CGI Technical Reference Chassis Plans C-9 The Initiate Sync Negotiation setting determines whether the adapter ini tiates synchronous negotiation with the SCSI device. If thi s option is set to the defaul t setting of Ye s , the adapter initiates synchronous negotiation with the SCSI device. Normally , you should leave t his option set to Ye s [...]

CBI/CGI Technical Reference Chassis Plans C-10 adapter to perform other operations on the SCSI bus while the SCSI device is tempo- rarily disconnected. When the Enable Discon nection option is set to the default setting of Ye s , the SCSI device may disconnect from the SCSI bus. The SCSI device may choose not to disconnect, however , even if permit[...]

CBI/CGI Technical Reference Chassis Plans C-11 A vailable options are: Ye s No Include in BIOS Scan This option indicates whether or not the specified SCSI device should be included in a scan of the devices which is done during bootup. Set ting this option to No for devices which are not attached saves time during boo tup since the BIOS will not sp[...]

CBI/CGI Technical Reference Chassis Plans C-12 A DVANCED C ONFIGURATION O PTIONS When you select Advanced Configuration Opti ons from the Configure/V iew Host Adapter Settings Menu, the following screen displays: Advanced Config uration Optio ns Screen The Advanced Configuration Optio ns screen disp lays the current settings for the selected adapte[...]

CBI/CGI Technical Reference Chassis Plans C-13 Reset SCSI Bu s at IC Initi alization The default for this optio n is Enabled . When the Plug and Play Scam Support option is set to Enabled , you cannot change this option to Disabled . A vailable options are: Enabled Disabled Host Adapter BIOS This option enables or disables the AIC-7880 BIOS. The BI[...]

CBI/CGI Technical Reference Chassis Plans C-14 A vailable options are: • Boot Only - Only the remo vable-media driv e designated as the boot device is treated as a hard disk driv e. This is the default option. • All Disks - All removable-media drives su pported by the AIC-7880 BIOS are treated as hard drives. This se tting has no ef fect on dri[...]

CBI/CGI Technical Reference Chassis Plans C-15 A vailable options are: Enabled Disabled BIOS Support for Bootable CD-ROM T o boot from a CD-ROM, this option must be set to Enabled . If you are booting from a hard disk or other device, m ake sure no bootab le CD-ROM is installed, or set this o ption to Disabled . A vailable options are: Enabled Disa[...]

CBI/CGI Technical Reference Chassis Plans C-16 SCSI D ISK U TILITIES The SCSI Disk Utilities screen allows you to format or verify a device on the SCSI bus. When you select SCSI Disk U tilities from the Options Menu , SCSISelect scans the SCSI bus for SCSI devices and displays a screen sim ilar to the following: SCSI Disk Utiliti es Screen This scr[...]

CBI/CGI Technical Reference Chassis Plans C-17 SCSI drives are preformatted and need not be form atted again. If a drive is not prefor- matted, you can use SCSISelect to perform a low-level format on the drive. The formatting is compatib le with most SCSI disk drives. ________________ ______________ _________________ ______________ __________ NOTE:[...]

CBI/CGI Technical Reference Chassis Plans C-18 T wo options are available: • Select Ye s to continue with the verify procedure and reassign bad blocks. If you choose to perform the verify , SCSISelect notifies you of bad blocks and prompts you to reassi gn them. Y ou may press <Esc> at any time to sto p the verification process. • Select [...]

Declaration of Conformity APPLICA TION OF COUNCIL DIRECTIVE(S) 89/336/EEC Standard(s) to which Conformity is Declared: EN55022: 1994/A2:199 7, CLASS A EN50082-2: 1995 Manufacturer: Chassis Plans, LLC 8295 Aero Place, Suite 200 San Diego, CA 92123 USA T elephone: (858) 571-4330 F AX: (858) 571-6 146 T ype of Equipment: PCI CPU Board Model Name(s): S[...]

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