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Samsung S3F401F manual

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Table of contents for the manual

  • Page 1

    Evaluation Board Manual S3F401F 16/32-BIT RISC MICROPROCESSOR Dec, 2007 REV 1.00[...]

  • Page 2

    Table of Contents Chapter 1 Evaluation Board Manual 1. Over view .................................................................................................................... .................................. 1 1.1 Feat ures ................................................................................................................... .[...]

  • Page 3

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 1 1 EVALUATION BOARD MANUAL 1. OVERVIEW S3F401F EVB (Evaluation Board) is a compact platform that is suitable for code developm ent of SAMSUNG's S3F401F 16-/32-bit RISC microcontroll er for an inverter moto r an d general purpose application. EVB is consists of s everal blocks, which can make opera[...]

  • Page 4

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 2 BT & W DT ENC0/1 Crystal or Ceramic Oscillator AHB ARM7TDMI -S CORE SRAM 20KB FLASH-ROM 256KB I/O CONTROLLER APB 12-BIT ADC IMC0/1 CLOCK MONI TO R INTERRUPT CONTROLLER ENC0/1 IMC0/1 BRIDGE TAP CONT ROLLER For JT AG SSP0/1 SSP0/1 UART0/1 UART0/1 Tim er0/1/2 /3/4/5 Tim er0/1/2 /3/4/5 Timer0/1/2/3/4/[...]

  • Page 5

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 3 1.1 FEATURES Micro-Controller S3F401F, ARM7TDMIS, 16/32-bit RISC Microcontroller External DC 7~12V Board Power Source Adjustable voltage regulator out is 3.2V Board Master Power Switch SW6 Support to protocol for RS-232 Physical interface circuit connected to st andard PC through DB9(female) UART Inte[...]

  • Page 6

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 4 1.3 BOARD COMPONEN TS The board consists of the followin gs. S3F401F Micro-controller 64LC40S and X25650 as a serial EEPROM for SSP 2 x DSUB Connector for RS-232 2 x Header groups for IMC function 1 x Buzzer 6 x Switches: IRQ x 2, Power, Reset 4 x LED: Power x1, IO Port output x 3 A regulator to gener[...]

  • Page 7

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 5 2. CONFIGURATION S3F401FX JTAG POWER BLOCK Page 1-6 IMC1 HEADE R CONNECTOR Page 1-11 MODE SETTING BLOCK Page 1-7 UART BLOCK Page 1-8 IMC0 HEA DER CONNEC TOR Page 1-11 Main OSC 7-SEGMENT Page 1-10 Buzzer 12- bit ADC BLOC K Page 1 - 12 SSP BLOCK Page 1-9 Figure 2. S3F401F Evaluation Board Top-v i e w[...]

  • Page 8

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 6 2.1 DETAILED BLOCK CONFIGURATIONS 2.1.1 Power Block 5 1 4 2 3 ① CN1, CN2, J23: Power Supply Connector CN1 : VIN CN2 : GND J23 : DC adapter connector ② U7: Adjustable Voltage Regulator 3.3V generator J VDD33, VDDCORE, VDDIO ③ SW6: Power Switch ④ DS4: Power Display LED VDD33 Power-on status di s[...]

  • Page 9

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 7 2.1.2 Mode Setting Block J9 & J10 & J11: Jumper Setting J9 J10 J11 MD[2:0] 2-3 Connection 2-3 Connection 2-3 Connection NORMAL 1-2 Connection 2-3 Connection 2-3 Connection SPGM Others Only TEST Mode[...]

  • Page 10

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 8 2.1.3 UART Block 1 2 3 ④ ① U10, U11: UART Driver IC ② P2, P3: UART Connector ③ J25 Jumper Setting TXD0 UARTTXD0 is connected t o T1IN of MAX3221. RXD0 UARTRXD0 is connected t o R1O UT of MAX3221. ④ J26 Jumper Setting TXD1 UARTTXD1 is connected t o T1IN of MAX3221 RXD1 UARTRXD1 is connected t[...]

  • Page 11

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 9[...]

  • Page 12

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 10 2.1.4 SSP Block 1 2 ① U9: SSP8 serial EEPROM (8K × 8bit) FSS0 is connected to P1.16. SW9 ON RXD0 is connected to P1.14. CLK0 is connected to P1.15. SW10 ON TXD0 is connected to P1.13. ② U8: SSP16 serial EEPROM (4K × 16bit) FSS1 is connected to P1.20. CLK1 is connected to P1.19. RXD1 is connecte[...]

  • Page 13

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 11[...]

  • Page 14

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 12 2.1.5 7-SEGMENT BLOCK 1 2 3 The assignment of 7-segment control pi ns on the S3F401F-EVB is the same like this. ① SW1 ON: This Port (P0.0~P0.7) is connected to each segme nt of 7-segment. ② SW2 ON: This Port (P1.9~P1.12) is connected to latch. ③ U3: 7-segment display[...]

  • Page 15

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 13 2.1.6 IMC BLOCK 1 2 The assignment of IMC pins on the S3F401F-EVB is the same like this. ① J20: A header pin group for MOTOR1 ② J21: A header pin group for MOTOR2[...]

  • Page 16

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 14 2.1.7 ADC BLOCK 4 5 1 23 ⑥ ① J1: ADC input connector ② J2, J3, J4: J2, J3 and J4 are selected to sample test with AIN0, AIN1 and AIN2 ③ RV1: Variable Resistor ④ J24: ADC Power Sour ce Close : When connecting (short), AVDD is same to VDD33. Open : AVDD is a second (right) pin of J2 4. So, AV[...]

  • Page 17

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 15 3. TOTAL BLOCKS’ UNIT & JUMPER SUMMURY 3.1 FUNCTION BLOCKS Block Symbols Description 7-SEGMENT U3 4Digit Segment J20 MOTOR 1 IMC J21 MOTOR 2 U14 RS-232 transceiver UART P41 RS-232 connector U7 SPI8 interface EEPROM (8K × 8bit) U8 SPI16 interface EEPROM (4K × 16bit) SSP J28 SPI block pin assig[...]

  • Page 18

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 16 3.2 JUMPER CONNECTION JP# Description Default Setting J1 ADC block pin assignm ent AIN0~AIN14 − J2 AIN0 input voltage connector Connect (Short) J3 AIN1 input voltage connector Connect (Short) J4 AIN2 input voltage connector Connect (Short) J5 SW3_INPUT VDDIO connects to INT7 Open J6 Buzzer connecto[...]

  • Page 19

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 17 3.2 JUMPER CONNECTION (Continued) JP# Description Default Setting J9 J9 J10 J11 MD[1:0] J10 2-3 2-3 2-3 NORMAL J11 MODE selection 1-2 2-3 2-3 SPGM All 2-3 connect :Normal Mode J12 Port assignment pin Port 2 Open J13 Port assignment pin Port 1 Open J14 Port assignment pin Port 0 Open J15 nTRST The JTA[...]

  • Page 20

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 18 3.3 SWITCHES SW# Description SW1 7-Segment ON: Port 0.0~0.7 connects to 7segment SW2 Latch ON: Port 1.9~1.12 con nects to latch SW3 INT7 LOW signal is generated b y SW3 SW4 INT8 HIGH signal is generated b y SW4 SW5 RESET Reset signal is generated by SW6 SW6 Power_VIN Power on switch SW7 SSP16 Port co[...]

  • Page 21

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 19 4. S3F401F-EVB REV 1.0 BOARD SCHEMATICS SCH-01 EVB TOP Block Diagram REV 1.0 SCH-02 S3F401F Micro-Controller REV 1.0 SCH-03 System Power Generation REV 1.0 SCH-04 Clock & Mode REV 1.0 SCH-05 ADC, Interrupt & BUZZER REV 1.0 SCH-06 JTAG Connector REV 1.0 SCH-07 UART Communication REV 1.0 SCH-08[...]

  • Page 22

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 20 SCH-01[...]

  • Page 23

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 21 SCH-02[...]

  • Page 24

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 22 SCH-03[...]

  • Page 25

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 23 SCH-04[...]

  • Page 26

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 24 SCH-05[...]

  • Page 27

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 25 SCH-06[...]

  • Page 28

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 26 SCH-07[...]

  • Page 29

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 27 SCH-08[...]

  • Page 30

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 28 SCH-09[...]

  • Page 31

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 29 SCH-10[...]

  • Page 32

    EVALUATION BOARD MANUAL S3F401F_BD_UM_REV1.00 30 SCH-11[...]