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Transcend Secure Digital Card SD80 manual

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Table of contents for the manual

  • Page 1

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 1 Description Secure Digital Card is a com pact, slim and high capacity storage media with c opy right protection. Designed in advanced SD specification Ve r.1.1, Transc end SD80 series now reaches a new perform ance milestone.[...]

  • Page 2

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 2 Architecture[...]

  • Page 3

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 3 Bus Operating Conditions • Gen eral Param eter Symbol Min. Max. Uni t Remark Peak voltage on all li nes -0.3 VDD+0.3 V All Inputs Input Leakage Current -10 10 µA All Outputs Output Leakage Current -10 10 µ A • Power Sup[...]

  • Page 4

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 4 • Bus Signal Lev els As the bus can be supplied wi th a variable supply volt age, all signal leve ls are related to the supply voltage. To meet the requirements of the JEDEC specification JESD8-1A, the card input and output[...]

  • Page 5

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 5 • Bus T im ing (Default) Param eter Symbol Min M ax. Unit Remark Clock CLK (All values are referred to m in (V IH ) and max ( V IL ) Clock f requency Data T ransfer Mode f PP 0 25 MHz C L ≤ 100 pF , (7 cards) Clock f requ[...]

  • Page 6

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 6 5 0 ns C L ≤ 250 pF , (21 cards) t THL 10 ns C L ≤ 100 pF , (7 cards) Clock f all time 5 0 ns C L ≤ 250 pF , (21 cards) Inputs CMD, DA T (refe renced to CLK) Input set-up time t ISU 5 ns C L ≤ 25 pF , (1 cards) Input [...]

  • Page 7

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 7 • Bus T iming (High Speed Mode) Param eter Symbol Min M ax. Unit Remark Clock CLK (All values are referred to m in (V IH ) and max ( V IL ) Clock f requency Data T ransfer Mode f PP 0 50 MHz Clock low time t W L 7 ns Clock [...]

  • Page 8

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 8 Output Delay time during Data T ransfer Mode t ODL Y 14 n s Output Hold time t OH 2.5 ns T otal Sy stem capacitance for each line C L 40 pF Reliability and Durability Tem perature Operation: -25° C / 85° C (Target spec) Sto[...]

  • Page 9

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 9 Register Information W ith in the card interface six r egist ers are def ined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only by corr esponding c om ma nds. The O CR, CID , C SD and S CR regi sters c arry the car[...]

  • Page 10

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 10 A voltage range is not suppor ted if the correspondi ng bit va lue is set to LO W . As long a s the car d is busy, the correspondin g bit ( 31) i s set to LOW . 2. CID Register The Card I Dentif ication (CID ) regi ster is 1[...]

  • Page 11

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 11 As an exam ple , the PRV bina ry value fi eld fo r prod uct revis ion “6.2 ” will be: 0110 0010 • PSN The Serial N um ber i s 32 bit s of binary num ber. • MDT The m anufactu ring da te com posed of two hexadecim al [...]

  • Page 12

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 12 3. CSD Register The foll owing section s describe t he CSD fiel ds and th e releva nt data types for th e High C apacity SD Mem ory Card. CSD Version 2.0 is applied to only the High Capacit y SD Mem or y Card. The f ield nam[...]

  • Page 13

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 13 The foll owing section s describe t he CSD fiel ds and th e releva nt data types. If not explicit ly defined otherwise, a ll bit strings a re int erpreted as binar y coded numb ers star ting wit h the le ft bit f irst. • C[...]

  • Page 14

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 14 Note that f or curre nt SD Mem ory Cards that f ield m ust be al way s 0_0110_010b (032h) whi ch is equal to 25MHz - t he m andatory m axim um o perating f re quency of SD Mem or y Card. In Hig h-Speed m ode, that f ie ld m [...]

  • Page 15

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 15 This fiel d is f ixed to 0, whic h indicates read access c rossing p hy sical block boundaries i s always disabled i n High C apacity SD Mem ory Car d. • DSR_IMP Define s if the conf igur able dr iver stag e is int egrated[...]

  • Page 16

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 16 This fiel d is f ixed to 9h, which indicates W RI TE_BL_LEN=512 Byte. • WRITE_BL_PA RTIA L This fiel d is f ixed to 0, whic h indicates partia l block read is inhibite d and only unit of bl ock acc ess is all owed. • FIL[...]

  • Page 17

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 17[...]

  • Page 18

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 18 4. RCA Register The writable 16-bit relative card address register carrie s the card address that is published by the card during the card identif icatio n. This address is used for the addressed host-card comm unica tion af[...]

  • Page 19

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 19 • SD_SPEC Describes the SD Memo ry Card Physical Layer Specif icat ion versi on support ed by this card. SD_SPEC Ph ysical Layer Specif icatio n Version Number 0 Version 1.0-1.01 1 Version 1.10 2 Version 2.00 3-15 re serve[...]

  • Page 20

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 20 Since SD Memory Card shall support at least the two bus modes 1bit or 4bit width then any SD Card shall set at least bits 0 an d 2 (SD _BUS_W IDTH="0101").[...]

  • Page 21

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 21 Mechanical Dimension[...]

  • Page 22

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 22[...]

  • Page 23

    S S S D D D 8 8 8 0 0 0 s s s e e e r r r i i i e e e s s s Rev1.2 SD80 Se cure Digital Card Transcen d Inf ormation I nc. 23[...]